static int mtk_voice_bt_close(struct snd_pcm_substream *substream)
{
	pr_debug("mtk_voice_bt_close\n");
	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
		pr_err("%s with SNDRV_PCM_STREAM_CAPTURE\n", __func__);
		AudDrv_Clk_Off();
		AudDrv_ANA_Clk_Off();
		return 0;
	}

	/* interconnection setting */
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I02,
		      Soc_Aud_InterConnectionOutput_O17);
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I02,
		      Soc_Aud_InterConnectionOutput_O18);
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14,
		      Soc_Aud_InterConnectionOutput_O02);
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I21,
		      Soc_Aud_InterConnectionOutput_O02);

	/* here start digital part */
	SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, false);
	SetDaiBtEnable(false);

	EnableAfe(false);
	AudDrv_Clk_Off();
	AudDrv_ANA_Clk_Off();

	voice_bt_Status = false;

	return 0;
}
static int mtk_pcm_I2S0dl1_start(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtime = substream->runtime;
    printk("%s\n", __func__);
    // here start digital part

    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O03);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O04);

    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);

    SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
    SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);

    EnableAfe(true);

#ifdef _DEBUG_6328_CLK
    //Debug 6328 Digital to Analog path clock and data work or not. and read TEST_OUT(0x206)
//    Ana_Set_Reg(AFE_MON_DEBUG0, 0x4600 , 0xcf00); // monitor 6328 digitala data sent to analog or not
    Ana_Set_Reg(AFE_MON_DEBUG0, 0x4200 , 0xcf00); // monitor 6328 digitala data sent to analog or not    
    Ana_Set_Reg(TEST_CON0, 0x0e00 , 0xffff);
#endif    

#if 0 // test 6328 sgen
    Ana_Set_Reg(AFE_SGEN_CFG0 , 0x0080 , 0xffff);
    Ana_Set_Reg(AFE_SGEN_CFG1 , 0x0101 , 0xffff);    
    Ana_Set_Reg(AFE_AUDIO_TOP_CON0, 0x0000, 0xffff);   //power on clock    
    //    Ana_Set_Reg(PMIC_AFE_TOP_CON0, 0x0002, 0x0002);   //UL from sinetable
    Ana_Set_Reg(PMIC_AFE_TOP_CON0, 0x0001, 0x0001);   //DL from sinetable      
#endif
    return 0;
}
示例#3
0
static int mtk_pcm_dl1Bt_stop(struct snd_pcm_substream *substream)
{

	PRINTK_AUDDRV("mtk_pcm_dl1Bt_stop\n");

	SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

	/* here to turn off digital part */
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I05,
		      Soc_Aud_InterConnectionOutput_O02);
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I06,
		      Soc_Aud_InterConnectionOutput_O02);
	SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, false);

	SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

	SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, false);
	if (GetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT) == false) {
		/* turn off DAI BT if not using */
		SetDaiBtEnable(false);
	}

	EnableAfe(false);
	RemoveMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
	AudDrv_Clk_Off();

	return 0;
}
static void StopAudioAWBHardware(struct snd_pcm_substream *substream)
{
    printk("StopAudioAWBHardware \n");

    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, false);

    // here to set interrupt
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, false);

    if (GetI2SDacEnable() == false)
    {
        SetI2SDacEnable(false);
    }

    // here to turn off digital part
#if 0 // TODO(Harvey)
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I15, Soc_Aud_InterConnectionOutput_O05);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I16, Soc_Aud_InterConnectionOutput_O06);
#else
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O05);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O06);
#endif

    EnableAfe(false);
}
示例#5
0
static void StartAudioCaptureHardware(struct snd_pcm_substream *substream)
{
    printk("StartAudioCaptureHardware \n");

    ConfigAdcI2S(substream);
    Set2ndI2SAdcIn(mAudioDigitalI2S);//To do, JY

    SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_VUL_DATA2, AFE_WLEN_16_BIT);
    SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O21);
    SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O22);

    if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC_2) == false)
    {
        SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC_2, true);
        Set2ndI2SAdcEnable(true);//To Do, JY
    }
    else
    {
        SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC_2, true);
    }

    // here to set interrupt
    SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size);
    SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);

    SetSampleRate(Soc_Aud_Digital_Block_MEM_VUL_DATA2, substream->runtime->rate);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_VUL_DATA2, true);

    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I17, Soc_Aud_InterConnectionOutput_O21);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I18, Soc_Aud_InterConnectionOutput_O22);
    EnableAfe(true);

}
示例#6
0
static int mtk_voice_close(struct snd_pcm_substream *substream)
{
    printk("mtk_voice_close \n");

    if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
    {
        printk("%s  with SNDRV_PCM_STREAM_CAPTURE \n", __func__);
        AudDrv_Clk_Off();
        AudDrv_ADC_Clk_Off();
        return 0;
    }

    //  todo : enable sidetone
    // here start digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O17);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O18);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O03);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O04);

    SetI2SAdcEnable(false);
    SetI2SDacEnable(false);
    SetModemPcmEnable(MODEM_1, false);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, false);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, false);

    EnableAfe(false);
    AudDrv_Clk_Off();
    AudDrv_ADC_Clk_Off();

    Voice_Status = false;

    return 0;
}
static int mtk_pcm_fm_i2s_close(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtime = substream->runtime;
    printk("%s rate = %d\n", __func__, runtime->rate);

    //mtk_wcn_cmb_stub_audio_ctrl((CMB_STUB_AIF_X)CMB_STUB_AIF_0);//temp mark for early porting

    SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, false);
    if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2) == false)
    {
        SetI2SASRCEnable(false);
        SetI2SASRCConfig(false, 0); // Setting to bypass ASRC
        Set2ndI2SInEnable(false);
    }

    SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, false);
    if (GetI2SDacEnable() == false)
    {
        SetI2SDacEnable(false);
    }

    // interconnection setting
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I00, Soc_Aud_InterConnectionOutput_O13);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I01, Soc_Aud_InterConnectionOutput_O14);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I10, Soc_Aud_InterConnectionOutput_O03);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I11, Soc_Aud_InterConnectionOutput_O04);


    EnableAfe(false);

    AudDrv_I2S_Clk_Off();
    AudDrv_Clk_Off();
    mPrepareDone = false;
    return 0;
}
示例#8
0
static int mtk_pcm_dl1_stop(struct snd_pcm_substream *substream)
{

    AFE_BLOCK_T *Afe_Block = &(pMemControl->rBlock);
    PRINTK_AUDDRV("mtk_pcm_dl1_stop \n");

    printk("%s \n", __func__);
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

    // here to turn off digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O03);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O04);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, false);

    SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, false);
    if (GetI2SDacEnable() == false)
    {
        SetI2SDacEnable(false);
    }
    EnableAfe(false);
    RemoveMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1,substream);
    AudDrv_Clk_Off();

    return 0;
}
示例#9
0
static int mtk_pcm_dl1Bt_stop(struct snd_pcm_substream *substream)
{

    AFE_BLOCK_T *Afe_Block = &(pdl1btMemControl->rBlock);
    PRINTK_AUDDRV("mtk_pcm_dl1Bt_stop \n");

    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

    // here to turn off digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O02);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O02);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, false);

    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

    SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, false);
    if (GetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT) == false)
    {
        SetDaiBtEnable(false);
    }

    EnableAfe(false);
    RemoveMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1,substream);
    AudDrv_Clk_Off();

    return 0;
}
static int mtk_pcm_fmtx_stop(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtime = substream->runtime;

    //AFE_BLOCK_T *Afe_Block = &(pMemControl->rBlock);
    PRINTK_AUD_FMTX("mtk_pcm_fmtx_stop \n");

    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

    // here to turn off digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01);

    //    if (GetMrgI2SEnable() == false)
    //    {
    SetMrgI2SEnable(false, runtime->rate);
    //    }

    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, false);

    SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, false);

    Set2ndI2SOutEnable(false);

    EnableAfe(false);

    RemoveMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
    AudDrv_Clk_Off();

    return 0;
}
static void StartAudioCaptureHardware(struct snd_pcm_substream *substream)
{
    printk("StartAudioCaptureHardware \n");

    ConfigAdcI2S(substream);
    SetI2SAdcIn(mAudioDigitalI2S);
    //EnableSideGenHw(Soc_Aud_InterConnectionOutput_O09,Soc_Aud_MemIF_Direction_DIRECTION_OUTPUT,true);

    SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_VUL, AFE_WLEN_16_BIT);
    SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_VUL, AFE_WLEN_16_BIT);
    SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O09);
    SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O10);

    SetI2SAdcEnable(true);

    // here to set interrupt
    SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size);
    SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);

    SetSampleRate(Soc_Aud_Digital_Block_MEM_VUL, substream->runtime->rate);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_VUL, true);

    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O09);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O10);

    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O09);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O10);

    EnableAfe(true);

}
示例#12
0
static int mtk_pcm_i2s0_stop(struct snd_pcm_substream *substream)
{
    AFE_BLOCK_T *Afe_Block = &(pI2s0MemControl->rBlock);

    printk("mtk_pcm_i2s0_stop \n");
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

    // here start digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, false);

    // stop I2S
    Afe_Set_Reg(AFE_I2S_CON3, 0x0, 0x1);
    Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1);

    EnableAfe(false);

    // clean audio hardware buffer
    memset(Afe_Block->pucVirtBufAddr, 0, Afe_Block->u4BufferSize);
    RemoveMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1,substream);
    AudDrv_Clk_Off();

    return 0;
}
static int mtk_pcm_dl2_start(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;

	pr_warn("%s\n", __func__);
	/* here start digital part */

	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I07,
		      Soc_Aud_InterConnectionOutput_O03);
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I08,
		      Soc_Aud_InterConnectionOutput_O04);

#ifdef CONFIG_MTK_FPGA
	/* set loopback test interconnection */
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I07,
		      Soc_Aud_InterConnectionOutput_O09);
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I08,
		      Soc_Aud_InterConnectionOutput_O10);
#endif

	SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);

	SetSampleRate(Soc_Aud_Digital_Block_MEM_DL2, runtime->rate);
	SetChannels(Soc_Aud_Digital_Block_MEM_DL2, runtime->channels);
	SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL2, true);

	SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size);
	SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
	EnableAfe(true);
	return 0;
}
示例#14
0
static void StartAudioMrgrxAWBHardware(struct snd_pcm_substream *substream)
{
    printk("StartAudioMrgrxAWBHardware \n");

    // here to set interrupt
    SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size>>1);
    SetIrqMcuSampleRate( Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);

    SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB,true);

    // here to turn off digital part
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I15, Soc_Aud_InterConnectionOutput_O05);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I16, Soc_Aud_InterConnectionOutput_O06);

    if(GetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT )== false)
    {
        //set merge interface
        SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
        SetMrgI2SEnable(true, substream->runtime->rate);
    }
    else
    {
        SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
    }

    EnableAfe(true);
}
static int mtk_pcm_mrgrx_close(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtime = substream->runtime;
    printk("%s \n", __func__);

    mtk_wcn_cmb_stub_audio_ctrl((CMB_STUB_AIF_X)CMB_STUB_AIF_0);

    SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, false);
    if (GetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT) == false)
    {
        SetMrgI2SEnable(false, runtime->rate);
    }

    SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, false);
    if (GetI2SDacEnable() == false)
    {
        SetI2SDacEnable(false);
    }

    // interconnection setting
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I15, Soc_Aud_InterConnectionOutput_O13);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I16, Soc_Aud_InterConnectionOutput_O14);

    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I10, Soc_Aud_InterConnectionOutput_O03);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I11, Soc_Aud_InterConnectionOutput_O04);


    EnableAfe(false);

    AudDrv_Clk_Off();
    mPrepareDone = false;
    return 0;
}
示例#16
0
static int mtk_pcm_dl1bt_start(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	AudDrv_Clk_On();
	SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
	if (runtime->format == SNDRV_PCM_FORMAT_S32_LE ||
	    runtime->format == SNDRV_PCM_FORMAT_U32_LE) {
		SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1,
					     AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
		SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2,
					     AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
		/* BT SCO only support 16 bit */
		SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O02);
	} else {
		SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT);
		SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT);
		SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
					  Soc_Aud_InterConnectionOutput_O02);
	}

	/* here start digital part */
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05,
		      Soc_Aud_InterConnectionOutput_O02);
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06,
		      Soc_Aud_InterConnectionOutput_O02);
	SetConnection(Soc_Aud_InterCon_ConnectionShift,
		      Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O02);
	SetConnection(Soc_Aud_InterCon_ConnectionShift,
		      Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O02);

	/* set dl1 sample ratelimit_state */
	SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
	SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);
	SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);

	/* here to set interrupt */
	SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size >> 1);
	SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
	SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);

	if (GetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT) == false) {
		/* set merge interface */
		SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
	} else {
		SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
	}

	SetVoipDAIBTAttribute(runtime->rate);
	SetDaiBtEnable(true);

	EnableAfe(true);

	return 0;
}
static void StartAudioFMI2SAWBHardware(struct snd_pcm_substream *substream)
{
	AudioDigtalI2S m2ndI2SInAttribute;

	pr_warn("StartAudioFMI2SAWBHardware\n");

	/* here to set interrupt */
	SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE,
			 substream->runtime->period_size >> 1);
	SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE,
			    substream->runtime->rate);
	SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);

	SetSampleRate(Soc_Aud_Digital_Block_MEM_AWB, substream->runtime->rate);
	SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, true);

	/* here to turn off digital part */
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I00,
		      Soc_Aud_InterConnectionOutput_O05);
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I01,
		      Soc_Aud_InterConnectionOutput_O06);


	if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2) == false) {
		/* set merge interface */
		SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, true);

		/* Config 2nd I2S IN */
		memset_io((void *)&m2ndI2SInAttribute, 0, sizeof(m2ndI2SInAttribute));

		m2ndI2SInAttribute.mLR_SWAP = Soc_Aud_LR_SWAP_NO_SWAP;
		m2ndI2SInAttribute.mI2S_IN_PAD_SEL = false; /* I2S_IN_FROM_CONNSYS */
		m2ndI2SInAttribute.mI2S_SLAVE = Soc_Aud_I2S_SRC_SLAVE_MODE;
		m2ndI2SInAttribute.mI2S_SAMPLERATE = 32000;
		m2ndI2SInAttribute.mINV_LRCK = Soc_Aud_INV_LRCK_NO_INVERSE;
		m2ndI2SInAttribute.mI2S_FMT = Soc_Aud_I2S_FORMAT_I2S;
		m2ndI2SInAttribute.mI2S_WLEN = Soc_Aud_I2S_WLEN_WLEN_16BITS;
		Set2ndI2SIn(&m2ndI2SInAttribute);

		if (substream->runtime->rate == 48000)
			SetI2SASRCConfig(true, 48000);	/* Covert from 32000 Hz to 48000 Hz */
		else
			SetI2SASRCConfig(true, 44100);	/* Covert from 32000 Hz to 44100 Hz */

		SetI2SASRCEnable(true);

		Set2ndI2SInEnable(true);
	} else
		SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_2, true);

	EnableAfe(true);
}
static int mtk_pcm_fmtx_start(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtime = substream->runtime;
    AudDrv_Clk_On();

    //    mtk_wcn_cmb_stub_audio_ctrl((CMB_STUB_AIF_X)CMB_STUB_AIF_2);

    SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
    if (runtime->format == SNDRV_PCM_FORMAT_S32_LE || runtime->format == SNDRV_PCM_FORMAT_U32_LE)
    {
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
        SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00); // FM Tx only support 16 bit
        SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01); // FM Tx only support 16 bit
    }
    else
    {
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT);
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT);
        SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00);
        SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01);
    }

    // here start digital part
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01);

    // set dl1 sample ratelimit_state
    SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
    SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);

    // start MRG I2S Out
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
    SetMrgI2SEnable(true, runtime->rate) ;

    // start 2nd I2S Out

    Set2ndI2SOutAttribute(runtime->rate) ;
    Set2ndI2SOutEnable(true);

    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);

    // here to set interrupt
    SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, (runtime->period_size * 2 / 3));
    SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);

    EnableAfe(true);

    return 0;
}
static int mtk_pcm_dl1_stop(struct snd_pcm_substream *substream)
{
    printk("%s \n", __func__);

    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, false);

    // here start digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O03);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O04);

    ClearMemBlock(Soc_Aud_Digital_Block_MEM_DL1);
    return 0;
}
static int mtk_pcm_mrgrx_prepare(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtime = substream->runtime;
    printk("%s rate = %d\n", __func__, runtime->rate);

    if (mPrepareDone == false)
    {
#ifndef DENALI_FPGA_EARLYPORTING               
        mtk_wcn_cmb_stub_audio_ctrl((CMB_STUB_AIF_X)CMB_STUB_AIF_3);
#endif
        // interconnection setting
        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I15, Soc_Aud_InterConnectionOutput_O13);
        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I16, Soc_Aud_InterConnectionOutput_O14);

        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I10, Soc_Aud_InterConnectionOutput_O03);
        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I11, Soc_Aud_InterConnectionOutput_O04);

        // Set HW_GAIN
        SetHwDigitalGainMode(Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1, runtime->rate, 0x40);
        SetHwDigitalGainEnable(Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1, true);
        SetHwDigitalGain(mmrgrx_Volume, Soc_Aud_Hw_Digital_Gain_HW_DIGITAL_GAIN1);

        // start I2S DAC out
        if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC) == false)
        {
            SetI2SDacOut(runtime->rate,false, Soc_Aud_I2S_WLEN_WLEN_16BITS);
            SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);
            SetI2SDacEnable(true);
        }
        else
        {
            SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);
        }

        if (GetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT) == false)
        {
            //set merge interface
            SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
            SetMrgI2SEnable(true, runtime->rate);
        }
        else
        {
            SetMemoryPathEnable(Soc_Aud_Digital_Block_MRG_I2S_OUT, true);
        }

        EnableAfe(true);
        mPrepareDone = true;
    }
    return 0;
}
static int mtk_pcm_i2s0_start(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtime = substream->runtime;
    uint32 u32AudioI2S = 0;
    AudDrv_Clk_On();
    SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
    if (runtime->format == SNDRV_PCM_FORMAT_S32_LE || runtime->format == SNDRV_PCM_FORMAT_S32_LE)
    {
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
    }
    else
    {
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT);
        SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL2, AFE_WLEN_16_BIT);
    }

    SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O00);
    SetoutputConnectionFormat(OUTPUT_DATA_FORMAT_16BIT, Soc_Aud_InterConnectionOutput_O01);

    // here start digital part
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O00);
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O01);


    u32AudioI2S = SampleRateTransform(runtime->rate) << 8;
    u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; // us3 I2s format
    u32AudioI2S |= Soc_Aud_I2S_WLEN_WLEN_32BITS << 1; // 32 BITS

    if (mi2s0_hdoutput_control == true)
    {
        u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12 ; //Low jitter mode
    }

    printk(" u32AudioI2S= 0x%x\n", u32AudioI2S);
    Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL);

    SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
    SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);

    // here to set interrupt
    SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->period_size);
    SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, runtime->rate);
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, true);

    EnableAfe(true);

    return 0;
}
static int mtk_voice_extint_close(struct snd_pcm_substream *substream)
{
    printk("mtk_voice_extint_close \n");

    if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
    {
        printk("%s  with SNDRV_PCM_STREAM_CAPTURE \n",__func__);
        SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O03);
        SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O04);
        SetI2SDacEnable(false);
        SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, false);
        Voice_ExtInt_Status &= ~VOICE_DL_ON;
        if(Voice_ExtInt_Status == 0)
        {
            SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I21, Soc_Aud_InterConnectionOutput_O07);
            SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I21, Soc_Aud_InterConnectionOutput_O08);
            SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I09, Soc_Aud_InterConnectionOutput_O25);
            SetModemPcmEnable(MODEM_EXTERNAL, false);
            SetModemPcmEnable(MODEM_1, false);
        }
        EnableAfe(false);
        AudDrv_Clk_Off();
        AudDrv_ADC_Clk_Off();
    }
    else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
    {
        printk("%s  with SNDRV_PCM_STREAM_CAPTURE \n",__func__);
        SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O17);
        SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O18);
        SetI2SAdcEnable(false);
        SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, false);
        Voice_ExtInt_Status &= ~VOICE_UL_ON;
        if(Voice_ExtInt_Status == 0)
        {
            SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I21, Soc_Aud_InterConnectionOutput_O07);
            SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I21, Soc_Aud_InterConnectionOutput_O08);
            SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I09, Soc_Aud_InterConnectionOutput_O25);
            SetModemPcmEnable(MODEM_EXTERNAL, false);
            SetModemPcmEnable(MODEM_1, false);
        }
        EnableAfe(false);
        AudDrv_Clk_Off();
        AudDrv_ADC_Clk_Off();
    }

    SetExternalModemStatus(false);

    return 0;
}
static void StopAudioDl1AWBHardware(struct snd_pcm_substream *substream)
{
    printk("StopAudioDl1AWBHardware \n");

    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_AWB, false);

    // here to set interrupt
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, false);

    // here to turn off digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I05, Soc_Aud_InterConnectionOutput_O05);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I06, Soc_Aud_InterConnectionOutput_O06);

    EnableAfe(false);
}
示例#24
0
文件: mcomint.c 项目: navoj/xlisp
/* xMComInitialize - built-in method 'initialize' */
static xlValue xMComInitialize(void)
{
    char *port = NULL;
    CommConnection *c;
    xlValue obj;
    long addr;

    /* parse the arguments */
    obj = xlGetArgInstance(c_connection);
    xlVal = xlGetArgFixnum(); addr = (long)xlGetFixnum(xlVal);
    if (xlMoreArgsP()) {
        xlVal = xlGetArgFixnum();
        addr = afVirtualAddr(addr,(long)xlGetFixnum(xlVal));
        if (xlMoreArgsP())
            port = xlGetString(xlGetArgString());
    }
    xlLastArg();

    /* default the port to the value of the environment variable MD_PORT */
    if (!port)
        port = getenv("MD_PORT");

    /* try to open the connection */
    if (!port || !(c = mcomOpen(port,addr)))
        return xlNil;

    /* return the connection */
    SetConnection(obj,c);
    return obj;
}
示例#25
0
static void StartAudioBtDaiHardware(struct snd_pcm_substream *substream)
{
    printk("StartAudioBtDaiHardware period_size = %d\n",(unsigned int)(substream->runtime->period_size));

    // here to set interrupt
    SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->period_size>>1);
    SetIrqMcuSampleRate(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, substream->runtime->rate);
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, true);

    SetSampleRate(Soc_Aud_Digital_Block_MEM_DAI, substream->runtime->rate);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DAI, true);

    // here to turn off digital part
    SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I02, Soc_Aud_InterConnectionOutput_O11);

    if (GetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT) == false)
    {
        SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
        SetVoipDAIBTAttribute(substream->runtime->rate);
        SetDaiBtEnable(true);
    }
    else
    {
        SetMemoryPathEnable(Soc_Aud_Digital_Block_DAI_BT, true);
    }

    EnableAfe(true);
}
void
SVNListBase::RefreshContent()
{
	if (itsProcess != NULL)
		{
		JProcess* p = itsProcess;
		itsProcess  = NULL;

		p->Kill();
		delete p;

		DeleteLinks();
		}
	else
		{
		itsSavedSelection->CleanOut();
		JTableSelection& s = GetTableSelection();
		JTableSelectionIterator iter(&s);
		JPoint cell;
		while (iter.Next(&cell))
			{
			const JString* line = itsLineList->NthElement(cell.y);
			itsSavedSelection->InsertSorted(new JString(ExtractRelativePath(*line)));
			}
		}

	itsDisplayState = SaveDisplayState();
	itsLineList->CleanOut();

	int outFD, errFD;
	JError err = JNoError();
	if ((GetDirector())->HasPath())
		{
		err = JProcess::Create(&itsProcess, GetPath(), itsCmd,
							   kJIgnoreConnection, NULL,
							   kJCreatePipe, &outFD,
							   kJCreatePipe, &errFD);
		}
	else	// working with URL
		{
		err = JProcess::Create(&itsProcess, itsCmd,
							   kJIgnoreConnection, NULL,
							   kJCreatePipe, &outFD,
							   kJCreatePipe, &errFD);
		}

	if (err.OK())
		{
		itsProcess->ShouldDeleteWhenFinished();
		ListenTo(itsProcess);
		(GetDirector())->RegisterActionProcess(this, itsProcess, itsRefreshRepoFlag,
											   itsRefreshStatusFlag, itsReloadOpenFilesFlag);

		SetConnection(outFD, errFD);
		}
	else
		{
		err.ReportIfError();
		}
}
static int mtk_voice1_prepare(struct snd_pcm_substream *substream)
{
    struct snd_pcm_runtime *runtimeStream = substream->runtime;
    printk("mtk_voice1_prepare rate = %d  channels = %d period_size = %lu\n",
           runtimeStream->rate, runtimeStream->channels, runtimeStream->period_size);

    if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
    {
        printk("%s  with SNDRV_PCM_STREAM_PLAYBACK \n",__func__);
        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O03);
        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14, Soc_Aud_InterConnectionOutput_O04);
        // start I2S DAC out
        SetI2SDacOut(substream->runtime->rate);
        SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);
        SetI2SDacEnable(true);
        EnableAfe(true);
    }
    else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
    {
        printk("%s  with SNDRV_PCM_STREAM_CAPTURE \n",__func__);
        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O17);
        SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O18);
        ConfigAdcI2S(substream);
        SetI2SAdcIn(&mAudioDigitalI2S);
        SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, true);
        SetI2SAdcEnable(true);
        EnableAfe(true);
        
    }
    if(Voice_Status == 0)
    {
        Voice1Pcm.mPcmModeWidebandSel = (runtimeStream->rate == 8000) ? Soc_Aud_PCM_MODE_PCM_MODE_8K : Soc_Aud_PCM_MODE_PCM_MODE_16K;
        Voice1Pcm.mAsyncFifoSel = Soc_Aud_BYPASS_SRC_SLAVE_USE_ASYNC_FIFO;
        SetModemPcmConfig(MODEM_1, Voice1Pcm);
        SetModemPcmEnable(MODEM_1, true);
    }
    if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
    {
        Voice_Status |= VOICE_DL_ON;
    }
    else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
    {
        Voice_Status |= VOICE_UL_ON;
    }
    
    return 0;
}
static int mtk_voice1_prepare(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtimeStream = substream->runtime;
	pr_warn("mtk_voice1_prepare rate = %d  channels = %d period_size = %lu\n",
	       runtimeStream->rate, runtimeStream->channels, runtimeStream->period_size);

	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
		pr_warn("%s  with SNDRV_PCM_STREAM_CAPTURE\n", __func__);
		return 0;
	}
	/* here start digital part */
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I03,
		      Soc_Aud_InterConnectionOutput_O17);
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I04,
		      Soc_Aud_InterConnectionOutput_O18);
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14,
		      Soc_Aud_InterConnectionOutput_O03);
	SetConnection(Soc_Aud_InterCon_Connection, Soc_Aud_InterConnectionInput_I14,
		      Soc_Aud_InterConnectionOutput_O04);

	/* start I2S DAC out */
	SetI2SDacOut(substream->runtime->rate, false, Soc_Aud_I2S_WLEN_WLEN_16BITS);
	SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);

	ConfigAdcI2S(substream);
	SetI2SAdcIn(&mAudioDigitalI2S);
	SetI2SDacEnable(true);

#ifdef PMIC_RESET_WORKAROUND
	pr_warn("%s ,PMIC_RESET_WORKAROUND reset ABB_AFE_CON2/ABB_AFE_CON4\n", __func__);
	Ana_Set_Reg(ABB_AFE_CON2, 0x0, 0xffff);	/* reset to default value */
	Ana_Set_Reg(ABB_AFE_CON4, 0x0, 0xffff);	/* reset to default value */
#endif

	SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, true);
	SetI2SAdcEnable(true);
	EnableAfe(true);
	Voice1Pcm.mPcmModeWidebandSel = (runtimeStream->rate == 8000) ?
	    Soc_Aud_PCM_MODE_PCM_MODE_8K : Soc_Aud_PCM_MODE_PCM_MODE_16K;
	Voice1Pcm.mAsyncFifoSel = Soc_Aud_BYPASS_SRC_SLAVE_USE_ASYNC_FIFO;
	SetModemPcmConfig(MODEM_1, Voice1Pcm);
	SetModemPcmEnable(MODEM_1, true);

	Voice_Status = true;

	return 0;
}
static int mtk_pcm_dl2_stop(struct snd_pcm_substream *substream)
{
	pr_warn("%s\n", __func__);
	SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL2, false);

	SetIrqMcuCounter(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, 0);
	SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE, false);

	/* here start digital part */
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I07,
		      Soc_Aud_InterConnectionOutput_O03);
	SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I08,
		      Soc_Aud_InterConnectionOutput_O04);

	ClearMemBlock(Soc_Aud_Digital_Block_MEM_DL2);
	return 0;
}
static void StopAudioCaptureHardware(struct snd_pcm_substream *substream)
{
    printk("StopAudioCaptureHardware \n");

    // here to set interrupt
    SetIrqEnable(Soc_Aud_IRQ_MCU_MODE_IRQ2_MCU_MODE, false);

    SetI2SAdcEnable(false);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_IN_ADC, false);
    SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_VUL, false);

    // here to turn off digital part
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I03, Soc_Aud_InterConnectionOutput_O09);
    SetConnection(Soc_Aud_InterCon_DisConnect, Soc_Aud_InterConnectionInput_I04, Soc_Aud_InterConnectionOutput_O10);

    EnableAfe(false);
}