/**
* @brief Start acquisition on a previously configured bank
* @param None
* @retval None
*/
void TSL_acq_BankStartAcq(void)
{
// Clear both EOAIC and MCEIC flags
TSC->ICR |= 0x03;
// Wait capacitors discharge
SoftDelay(DelayDischarge);
#if TSLPRM_TSC_IODEF > 0 // Default = Input Floating
// Set IO default in Input Floating
TSC->CR |= (1 << 4);
#endif
// Start acquisition
TSC->CR |= 0x02;
}
/**
* @brief Start acquisition on a previously configured bank
* @param None
* @retval None
*/
void TSL_acq_BankStartAcq(void)
{
#if (TSLPRM_IODEF > 0)
CONST TSL_Bank_T *LocalBank = &(TSL_Globals.Bank_Array[0]);
TSL_tNb_T NumberOfBanks = TSLPRM_TOTAL_BANKS;
TSL_tNb_T LocalNumberOfChannels = 0;
TSL_tIndex_T BankIndex;
#endif
CONST TSL_ChannelSrc_T *p_chSrc;
CONST TSL_ChannelDest_T *p_chDest;
TSL_tIndex_T idx_dest;
TSL_tIndex_T idx_ch;
if (NumberOfChannelOn)
{
#if (TSLPRM_IODEF > 0)
//============================
// All GPIOs in Input floating
//============================
for (BankIndex = 0; BankIndex < NumberOfBanks; BankIndex++)
{
LocalBank = &(TSL_Globals.Bank_Array[BankIndex]);
p_chSrc = LocalBank->p_chSrc;
#if (TSLPRM_USE_SHIELD > 0)
TSL_GPIO_MODER_IN_Config(LocalBank->shield_sample);
TSL_GPIO_MODER_IN_Config(LocalBank->shield_channel);
#endif
LocalNumberOfChannels = LocalBank->NbChannels;
for (idx_ch = 0;
idx_ch < LocalNumberOfChannels;
idx_ch++)
{
TSL_GPIO_MODER_IN_Config(p_chSrc->t_sample);
TSL_GPIO_MODER_IN_Config(p_chSrc->t_channel);
p_chSrc++;
}
}
#endif
// Reset count
TIM11->CNT = 0;
// Discharge sample capacitors
p_chDest = bank->p_chDest;
p_chSrc = bank->p_chSrc;
for (idx_ch = 0; idx_ch < NumberOfChannels; idx_ch++)
{
// Get index in the result array associated to the current channel
idx_dest = p_chDest->IdxDest;
if (bank->p_chData[idx_dest].Flags.ObjStatus != TSL_OBJ_STATUS_OFF)
{
TSL_GPIO_MODER_OUT_Config(p_chSrc->t_sample);
}
p_chDest++;
p_chSrc++;
}
#if (TSLPRM_USE_SHIELD > 0)
// Discharge shield sample capacitor
TSL_GPIO_MODER_OUT_Config(bank->shield_sample);
#endif
// Wait for capa discharge
SoftDelay(0x80);
#if (TSLPRM_USE_SHIELD > 0)
// Init sample shield in floating input
TSL_GPIO_MODER_IN_Config(bank->shield_sample);
TSL_GPIO_MODER_AF_Config(bank->shield_channel);
TSL_RI_ASMR_Config(bank->shield_channel);
#endif
// Init samples in floating input and channels in alternate
p_chDest = bank->p_chDest;
p_chSrc = bank->p_chSrc;
for (idx_ch = 0; idx_ch < NumberOfChannels; idx_ch++)
{
// Get index in the result array associated to the current channel
idx_dest = p_chDest->IdxDest;
if (bank->p_chData[idx_dest].Flags.ObjStatus != TSL_OBJ_STATUS_OFF)
{
TSL_GPIO_MODER_IN_Config(p_chSrc->t_sample);
TSL_GPIO_MODER_AF_Config(p_chSrc->t_channel);
}
p_chDest++;
p_chSrc++;
}
/* Start acquisition */
TSL_Acq_Status = TSL_STATUS_BUSY;
TIM9 ->CR1 |= 0x01; // Master
}
else
{
TSL_Acq_Status = TSL_STATUS_OK;
}
}
/**
* @brief Start acquisition on a previously configured bank
* @param None
* @retval None
*/
void TSL_acq_BankStartAcq(void)
{
CONST TSL_Bank_T *LocalBank = &(TSL_Globals.Bank_Array[0]);
TSL_tNb_T NumberOfBanks = TSLPRM_TOTAL_BANKS;
TSL_tNb_T LocalNumberOfChannels = 0;
TSL_tIndex_T BankIndex;
uint16_t MeasurementCounter = 0;
CONST TSL_ChannelSrc_T *p_chSrc;
TSL_tIndex_T idx_ch;
uint16_t GroupToCheckMask = 0;
uint32_t GPIO_IDR_Mask = 0;
uint8_t Check_Input = 0;
#if (TSLPRM_USE_GPIOA)
uint16_t TSL_GPIOA_IDR = 0;
#endif
#if (TSLPRM_USE_GPIOB)
uint16_t TSL_GPIOB_IDR = 0;
#endif
#if (TSLPRM_USE_GPIOC)
uint16_t TSL_GPIOC_IDR = 0;
#endif
#if (TSLPRM_USE_GPIOF)
uint16_t TSL_GPIOF_IDR = 0;
#endif
#if (TSLPRM_USE_GPIOG)
uint16_t TSL_GPIOG_IDR = 0;
#endif
uint16_t GPIO_IDR = 0;
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__disable_irq();
#endif
#if (TSLPRM_IODEF > 0)
//============================
// All GPIOs in Input floating
//============================
for (BankIndex = 0; BankIndex < NumberOfBanks; BankIndex++)
{
LocalBank = &(TSL_Globals.Bank_Array[BankIndex]);
p_chSrc = LocalBank->p_chSrc;
#if (TSLPRM_USE_SHIELD > 0)
TSL_GPIO_MODER_IN_Config(LocalBank->shield_sample);
TSL_GPIO_MODER_IN_Config(LocalBank->shield_channel);
#endif
LocalNumberOfChannels = LocalBank->NbChannels;
for (idx_ch = 0;
idx_ch < LocalNumberOfChannels;
idx_ch++)
{
TSL_GPIO_MODER_IN_Config(p_chSrc->t_sample);
TSL_GPIO_MODER_IN_Config(p_chSrc->t_channel);
p_chSrc++;
}
}
#endif
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__enable_irq();
#endif
/* Open the analog switches */
RI->ASCR1 &= (uint32_t)(~(TSL_BankSampleConf[0] | TSL_BankChannelConf[0]));
RI->ASCR2 &= (uint32_t)(~(TSL_BankSampleConf[1] | TSL_BankChannelConf[1]));
/* All IO to pushpull LOW for discharging all capacitors (Ctouch and Csense) */
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__disable_irq();
#endif
/* Discharging sampling capacitor and CTouch */
#if (TSLPRM_USE_GPIOA)
GPIOA->ODR &= (uint32_t)(~(TSL_BankSampleConf[4] | TSL_BankChannelConf[4]));
GPIOA->MODER = (GPIOA->MODER & (uint32_t)(~(TSL_BankSampleConf[2] | TSL_BankChannelConf[2]))) | (TSL_BankSampleConf[3] | TSL_BankChannelConf[3]);
#endif
#if (TSLPRM_USE_GPIOB)
GPIOB->ODR &= (uint32_t)(~(TSL_BankSampleConf[7] | TSL_BankChannelConf[7]));
GPIOB->MODER = (GPIOB->MODER & (uint32_t)(~(TSL_BankSampleConf[5] | TSL_BankChannelConf[5]))) | (TSL_BankSampleConf[6] | TSL_BankChannelConf[6]);
#endif
#if (TSLPRM_USE_GPIOC)
GPIOC->ODR &= (uint32_t)(~(TSL_BankSampleConf[10] | TSL_BankChannelConf[10]));
GPIOC->MODER = (GPIOC->MODER & (uint32_t)(~(TSL_BankSampleConf[8] | TSL_BankChannelConf[8]))) | (TSL_BankSampleConf[9] | TSL_BankChannelConf[9]);
#endif
#if (TSLPRM_USE_GPIOF)
GPIOF->ODR &= (uint32_t)(~(TSL_BankSampleConf[13] | TSL_BankChannelConf[13]));
GPIOF->MODER = (GPIOF->MODER & (uint32_t)(~(TSL_BankSampleConf[11] | TSL_BankChannelConf[11]))) | (TSL_BankSampleConf[12] | TSL_BankChannelConf[12]);
#endif
#if (TSLPRM_USE_GPIOG)
GPIOG->ODR &= (uint32_t)(~(TSL_BankSampleConf[16] | TSL_BankChannelConf[16]));
GPIOG->MODER = (GPIOG->MODER & (uint32_t)(~(TSL_BankSampleConf[14] | TSL_BankChannelConf[14]))) | (TSL_BankSampleConf[15] | TSL_BankChannelConf[15]);
#endif
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__enable_irq();
#endif
/* Wait a while for a good discharging of all capacitors */
SoftDelay(50); // ~14µs with fHCLK = 32MHz
//this time depends of the size of the sampling capacitor
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__disable_irq();
#endif
/* All IO in input floating */
#if (TSLPRM_USE_GPIOA)
GPIOA->MODER &= (uint32_t)(~(TSL_BankSampleConf[2] | TSL_BankChannelConf[2]));
#endif
#if (TSLPRM_USE_GPIOB)
GPIOB->MODER &= (uint32_t)(~(TSL_BankSampleConf[5] | TSL_BankChannelConf[5]));
#endif
#if (TSLPRM_USE_GPIOC)
GPIOC->MODER &= (uint32_t)(~(TSL_BankSampleConf[8] | TSL_BankChannelConf[8]));
#endif
#if (TSLPRM_USE_GPIOF)
GPIOF->MODER &= (uint32_t)(~(TSL_BankSampleConf[11] | TSL_BankChannelConf[11]));
#endif
#if (TSLPRM_USE_GPIOG)
GPIOG->MODER &= (uint32_t)(~(TSL_BankSampleConf[14] | TSL_BankChannelConf[14]));
#endif
/* set the IO to Vdd (io in push-pull HIGH when in output mode) */
#if (TSLPRM_USE_GPIOA)
GPIOA->ODR |= (TSL_BankSampleConf[4] | TSL_BankChannelConf[4]); /* HIGH level */
#endif
#if (TSLPRM_USE_GPIOB)
GPIOB->ODR |= (TSL_BankSampleConf[7] | TSL_BankChannelConf[7]); /* HIGH level */
#endif
#if (TSLPRM_USE_GPIOC)
GPIOC->ODR |= (TSL_BankSampleConf[10] | TSL_BankChannelConf[10]); /* HIGH level */
#endif
#if (TSLPRM_USE_GPIOF)
GPIOF->ODR |= (TSL_BankSampleConf[13] | TSL_BankChannelConf[13]); /* HIGH level */
#endif
#if (TSLPRM_USE_GPIOG)
GPIOG->ODR |= (TSL_BankSampleConf[16] | TSL_BankChannelConf[16]); /* HIGH level */
#endif
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__enable_irq();
#endif
/* Close the sampling capacitor analog switch */
RI->ASCR1 |= (TSL_BankSampleConf[0]);
RI->ASCR2 |= (TSL_BankSampleConf[1]);
/* Loop while all the 1st channel of each group have not reach the VIH level */
do
{
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__disable_irq();
#endif
/* Charging Ctouch by connecting the IO to Vdd (io in push-pull HIGH) */
#if (TSLPRM_USE_GPIOA)
GPIOA->MODER |= (TSL_BankChannelConf[3]); /* Output push pull config */
#endif
#if (TSLPRM_USE_GPIOB)
GPIOB->MODER |= (TSL_BankChannelConf[6]); /* Output push pull config */
#endif
#if (TSLPRM_USE_GPIOC)
GPIOC->MODER |= (TSL_BankChannelConf[9]); /* Output push pull config */
#endif
#if (TSLPRM_USE_GPIOF)
GPIOF->MODER |= (TSL_BankChannelConf[12]); /* Output push pull config */
#endif
#if (TSLPRM_USE_GPIOG)
GPIOG->MODER |= (TSL_BankChannelConf[15]); /* Output push pull config */
#endif
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__enable_irq();
#endif
/* Wait a while for a good charging (programmable delay) */
#if ( TSLPRM_DELAY_TRANSFER > 0 )
SoftDelay(TSLPRM_DELAY_TRANSFER);
#endif
/* Spread Spectrum */
#if (TSLPRM_USE_SPREAD_SPECTRUM > 0)
SwSpreadSpectrum();
#endif
/* test GPIOx->IDR bit + group configuration for each channel */
#if (TSLPRM_USE_GPIOA)
TSL_GPIOA_IDR = GPIOA->IDR;
if ((TSL_GPIOA_IDR & GPIOA_IDR_Mask) != 0)
{
Check_Input = 1;
GPIOA_IDR_Mask &= (uint32_t)(~TSL_GPIOA_IDR);
}
#endif
#if (TSLPRM_USE_GPIOB)
TSL_GPIOB_IDR = GPIOB->IDR;
if ((TSL_GPIOB_IDR & GPIOB_IDR_Mask) != 0)
{
Check_Input = (1 << 1);
GPIOB_IDR_Mask &= (uint32_t)(~TSL_GPIOB_IDR);
}
#endif
#if (TSLPRM_USE_GPIOC)
TSL_GPIOC_IDR = GPIOC->IDR;
if ((TSL_GPIOC_IDR & GPIOC_IDR_Mask) != 0)
{
Check_Input = (1 << 2);
GPIOC_IDR_Mask &= (uint32_t)(~TSL_GPIOC_IDR);
}
#endif
#if (TSLPRM_USE_GPIOF)
TSL_GPIOF_IDR = GPIOF->IDR;
if ((TSL_GPIOF_IDR & GPIOF_IDR_Mask) != 0)
{
Check_Input = (1 << 5);
GPIOF_IDR_Mask &= (uint32_t)(~TSL_GPIOF_IDR);
}
#endif
#if (TSLPRM_USE_GPIOG)
TSL_GPIOG_IDR = GPIOG->IDR;
if ((TSL_GPIOG_IDR & GPIOG_IDR_Mask) != 0)
{
Check_Input = (1 << 6);
GPIOG_IDR_Mask &= (uint32_t)(~TSL_GPIOG_IDR);
}
#endif
if (Check_Input)
{
p_chSrc = bank->p_chSrc;
for (idx_ch = 0; idx_ch < NumberOfChannels; idx_ch++)
{
GroupToCheckMask = (1 << (p_chSrc->IdxSrc));
if ((GroupToCheck & GroupToCheckMask) == (GroupToCheckMask))
{
GPIO_IDR_Mask = (1 << TSL_CHANNEL_IO(p_chSrc->t_sample));
switch (TSL_CHANNEL_PORT(p_chSrc->t_sample))
{
#if (TSLPRM_USE_GPIOA)
case 0: GPIO_IDR = TSL_GPIOA_IDR; break;
#endif
#if (TSLPRM_USE_GPIOB)
case 1: GPIO_IDR = TSL_GPIOB_IDR; break;
#endif
#if (TSLPRM_USE_GPIOC)
case 2: GPIO_IDR = TSL_GPIOC_IDR; break;
#endif
#if (TSLPRM_USE_GPIOF)
case 5: GPIO_IDR = TSL_GPIOF_IDR; break;
#endif
#if (TSLPRM_USE_GPIOG)
case 6: GPIO_IDR = TSL_GPIOG_IDR; break;
#endif
default: break;
}
if ((GPIO_IDR & GPIO_IDR_Mask) == GPIO_IDR_Mask)
{
tab_MeasurementCounter[p_chSrc->IdxSrc] = MeasurementCounter;
GroupToCheck &= (uint32_t)(~(1 << (p_chSrc->IdxSrc)));
Check_Input &= (uint32_t)(~(1 << TSL_CHANNEL_PORT(p_chSrc->t_sample)));
}
}
p_chSrc++;
}
}
MeasurementCounter++;
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__disable_irq();
#endif
/* Configure All channels in input floating */
#if (TSLPRM_USE_GPIOA)
GPIOA->MODER &= (uint32_t)(~(TSL_BankChannelConf[2]));
#endif
#if (TSLPRM_USE_GPIOB)
GPIOB->MODER &= (uint32_t)(~(TSL_BankChannelConf[5]));
#endif
#if (TSLPRM_USE_GPIOC)
GPIOC->MODER &= (uint32_t)(~(TSL_BankChannelConf[8]));
#endif
#if (TSLPRM_USE_GPIOF)
GPIOF->MODER &= (uint32_t)(~(TSL_BankChannelConf[11]));
#endif
#if (TSLPRM_USE_GPIOG)
GPIOG->MODER &= (uint32_t)(~(TSL_BankChannelConf[14]));
#endif
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__enable_irq();
#endif
/* Charging the Csense cap with connecting it to Ctouch by closing the analog switch */
RI->ASCR1 |= (TSL_BankChannelConf[0]);
RI->ASCR2 |= (TSL_BankChannelConf[1]);
/* Wait a while for a good charge transfering (programmable delay) */
#if ( TSLPRM_DELAY_TRANSFER > 0 )
SoftDelay(TSLPRM_DELAY_TRANSFER);
#endif
RI->ASCR1 &= (uint32_t)(~(TSL_BankChannelConf[0]));
RI->ASCR2 &= (uint32_t)(~(TSL_BankChannelConf[1]));
/*it's better to implement this like that because it's much more faster than to put this test in the "while test" below */
if (MeasurementCounter > TSL_Params.AcqMax)
{
TSL_acq_GroupDone(GroupToCheck);
__NOP();
break;
}
}
while (GroupToCheck != 0);
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__disable_irq();
#endif
//====================
// All GPIOs in PP Low
//====================
for (BankIndex = 0; BankIndex < NumberOfBanks; BankIndex++)
{
LocalBank = &(TSL_Globals.Bank_Array[BankIndex]);
p_chSrc = LocalBank->p_chSrc;
#if (TSLPRM_USE_SHIELD > 0)
TSL_GPIO_BR_Config(LocalBank->shield_sample);
TSL_GPIO_BR_Config(LocalBank->shield_channel);
TSL_GPIO_MODER_OUT_Config(LocalBank->shield_sample);
TSL_GPIO_MODER_OUT_Config(LocalBank->shield_channel);
#endif
LocalNumberOfChannels = LocalBank->NbChannels;
for (idx_ch = 0;
idx_ch < LocalNumberOfChannels;
idx_ch++)
{
TSL_GPIO_BR_Config(p_chSrc->t_sample);
TSL_GPIO_BR_Config(p_chSrc->t_channel);
TSL_GPIO_MODER_OUT_Config(p_chSrc->t_sample);
TSL_GPIO_MODER_OUT_Config(p_chSrc->t_channel);
p_chSrc++;
}
}
#if (TSLPRM_PROTECT_IO_ACCESS > 0)
__enable_irq();
#endif
}
/**
* @brief This function processes the TSC value.
* @param None
* @retval None
*/
void Process(void)
{
static uint32_t NumberOfCalibration=0;
uint8_t RefIndex=0;
static uint8_t RefIndexStatic=0;
static uint32_t ReferenceTab[REFERENCE_TAB_SIZE];
if(!Standby) /* Acquisition mode */
{
if(AcquisitionValue) /* check if there is a new acquisition value */
{
if(CalibrationDone) /* check if the calibration is done */
{
if((AcquisitionValue + THRESHOLD) < Reference) /* Touch detected */
{
GPIOC->BSRR = GPIO_BSRR_BS_8; /* Lit orange LED */
Activities = 1;
}
else if(AcquisitionValue > (Reference + THRESHOLD)) /* Need recalibration */
{
GPIOC->BSRR = GPIO_BSRR_BR_8; /* Off orange LED */
Activities = 1;
CalibrationDone = 0; /* restart calibration */
Reference = 0; /* Reset reference */
}
else /* no touch detected */
{
GPIOC->BSRR = GPIO_BSRR_BR_8; /* Off orange LED */
/* Reference adaptation */
if(ReferenceAdaptation)
{
ReferenceAdaptation=0;
RefIndexStatic%=REFERENCE_TAB_SIZE;
ReferenceTab[RefIndexStatic++] = AcquisitionValue;
for(RefIndex=0;RefIndex<REFERENCE_TAB_SIZE;RefIndex++)
{
Reference += ReferenceTab[RefIndex];
}
Reference /= (REFERENCE_TAB_SIZE + 1);
}
}
}
else /* Calibration */
{
if(NumberOfCalibration < NUMBER_OF_CALIBRATION)
{
Reference += AcquisitionValue;
NumberOfCalibration++;
}
else if(NumberOfCalibration == NUMBER_OF_CALIBRATION)
{
Reference += AcquisitionValue;
Reference /= (NUMBER_OF_CALIBRATION + 1); /* Compute reference */
NumberOfCalibration = 0; /* Reset number of calibration for nex time */
CalibrationDone = 1; /* Calibration Completed */
/* Fill reference table */
for(RefIndex=0;RefIndex<REFERENCE_TAB_SIZE;RefIndex++)
{
ReferenceTab[RefIndex] = Reference;
}
}
}
AcquisitionValue = 0; /* Reset Acquisition value */
SoftDelay(); /* Wait to discharge sample capacitor before new acquisition */
TSC->CR |= (1<<1) ;/* new acquisition, TSC_CR_START = 1 */
}
}
}
