bool_t SiiMhlTxChipInitialize ( void )
{
unsigned int initState = 0;
tmdsPowRdy = false;
mscCmdInProgress = false;
dsHpdStatus = 0;
fwPowerState = POWER_STATE_D0_NO_MHL;
SI_OS_DISABLE_DEBUG_CHANNEL(SII_OSAL_DEBUG_SCHEDULER);
//memset(&video_data, 0x00, sizeof(video_data));
video_data.inputColorSpace = COLOR_SPACE_RGB;
video_data.outputColorSpace = COLOR_SPACE_RGB;
video_data.outputVideoCode = 2;
video_data.inputcolorimetryAspectRatio = 0x18;
video_data.outputcolorimetryAspectRatio = 0x18;
video_data.output_AR = 0;
//SiiMhlTxHwReset(TX_HW_RESET_PERIOD,TX_HW_RESET_DELAY);
//SiiCraInitialize();
initState = (SiiRegRead(TX_PAGE_L0 | 0x03) << 8) | SiiRegRead(TX_PAGE_L0 | 0x02);
//TX_DEBUG_PRINT(("Drv: SiiMhlTxChipInitialize: %02X%02x\n",
// SiiRegRead(TX_PAGE_L0 | 0x03),
// SiiRegRead(TX_PAGE_L0 | 0x02)));
TX_DEBUG_PRINT(("Drv: SiiMhlTxChipInitialize: 0x%04X\n", initState));
WriteInitialRegisterValues();
#ifndef __KERNEL__
SiiOsMhlTxInterruptEnable();
#endif
SwitchToD3();
if (0xFFFF == initState)//0x8356
{
return false;
}
return true;
}
static void MhlTxDrvProcessDisconnection ( void )
{
TX_DEBUG_PRINT(("MhlTxDrvProcessDisconnection\n"));
SiiRegWrite(REG_INTR4, SiiRegRead(REG_INTR4));
dsHpdStatus &= ~BIT6;
SiiRegWrite(REG_MSC_REQ_ABORT_REASON, dsHpdStatus);
SiiMhlTxNotifyDsHpdChange(0);
if( POWER_STATE_D0_MHL == fwPowerState )
{
SiiMhlTxNotifyConnection(false);
}
SwitchToD3();
}
static int Int4Isr( void )
{
uint8_t int4Status;
int4Status = SiiRegRead(REG_INTR4);
if(!int4Status)
{
}
else if(0xFF == int4Status)
{
return I2C_INACCESSIBLE;
}else
{
TX_DEBUG_PRINT(("INT4 Status = %02X\n", (int) int4Status));
if(int4Status & BIT0)
{
ProcessScdtStatusChange();
}
if(int4Status & BIT2)
{
MhlTxDrvProcessConnection();
}
else if(int4Status & BIT3)
{
TX_DEBUG_PRINT(("uUSB-A type device detected.\n"));
SiiRegWrite(REG_DISC_STAT2, 0x80);
SwitchToD3();
return I2C_INACCESSIBLE;
}
if (int4Status & BIT5)
{
MhlTxDrvProcessDisconnection();
return I2C_INACCESSIBLE;
}
if((POWER_STATE_D0_MHL != fwPowerState) && (int4Status & BIT6))
{
SwitchToD0();
ProcessRgnd();
}
if(fwPowerState != POWER_STATE_D3)
{
if (int4Status & BIT4)
{
TX_DEBUG_PRINT(("CBus Lockout\n"));
ForceUsbIdSwitchOpen();
ReleaseUsbIdSwitchOpen();
}
}
}
SiiRegWrite(REG_INTR4, int4Status);
return I2C_ACCESSIBLE;
}
bool_t SiiMhlTxChipInitialize (void)
{
tmdsPoweredUp = false;
mhlConnected = false;
mscCmdInProgress = false; // false when it is okay to send a new command
dsHpdStatus = 0;
fwPowerState = POWER_STATE_FIRST_INIT;
//SI_OS_DISABLE_DEBUG_CHANNEL(SII_OSAL_DEBUG_SCHEDULER);
g_chipRevId = SiiRegRead(REG_DEV_REV);
// then wait 100ms per MHL spec
HalTimerWait(TX_HW_RESET_DELAY);
TX_DEBUG_PRINT(("Drv: SiiMhlTxChipInitialize: %02X%02X%02x\n",
g_chipRevId,
SiiRegRead(TX_PAGE_L0 | 0x03),
SiiRegRead(TX_PAGE_L0 | 0x02)));
// setup device registers. Ensure RGND interrupt would happen.
WriteInitialRegisterValues();
//SiiOsMhlTxInterruptEnable();
// CBUS interrupts are unmasked after performing the reset.
// UNMASK_CBUS1_INTERRUPTS;
// UNMASK_CBUS2_INTERRUPTS;
//
// Allow regular operation - i.e. pinAllowD3 is high so we do enter
// D3 first time. Later on, SiIMon shall control this GPIO.
//
//pinAllowD3 = 1;
SwitchToD3();
return true;
}
///////////////////////////////////////////////////////////////////////////
//
// MhlTxDrvProcessDisconnection
//
///////////////////////////////////////////////////////////////////////////
static void MhlTxDrvProcessDisconnection (void)
{
TX_DEBUG_PRINT(("Drv: MhlTxDrvProcessDisconnection\n"));
// clear all interrupts
SiiRegWrite(REG_INTR4, SiiRegRead(REG_INTR4));
SiiRegWrite(REG_MHLTX_CTL1, 0xD0);
dsHpdStatus &= ~BIT6; //cable disconnect implies downstream HPD low
SiiRegWrite(REG_PRI_XFR_ABORT_REASON, dsHpdStatus);
SiiMhlTxNotifyDsHpdChange(0);
if( POWER_STATE_D0_MHL == fwPowerState )
{
// Notify upper layer of cable removal
SiiMhlTxNotifyConnection(false);
}
// Now put chip in sleep mode
SwitchToD3();
}
////////////////////////////////////////////////////////////////////
// Int4Isr
//
//
// Look for interrupts on INTR4 (Register 0x74)
// 7 = RSVD (reserved)
// 6 = RGND Rdy (interested)
// 5 = VBUS Low (ignore)
// 4 = CBUS LKOUT (interested)
// 3 = USB EST (interested)
// 2 = MHL EST (interested)
// 1 = RPWR5V Change (ignore)
// 0 = SCDT Change (interested during D0)
////////////////////////////////////////////////////////////////////
static int Int4Isr (void)
{
uint8_t int4Status;
int4Status = SiiRegRead(REG_INT_CTRL); // read status
if( int4Status )
{
TX_DEBUG_PRINT(("Drv: int4Status test: 0x%02X\n", (int) int4Status));
}
int4Status = SiiRegRead(REG_INTR4); // read status
if( int4Status )
{
TX_DEBUG_PRINT(("Drv: int4Status: 0x%02X\n", (int) int4Status));
}
// When I2C is inoperational (D3) and a previous interrupt brought us here, do nothing.
if(0xFF == int4Status || 0x87 == int4Status|| 0x38 == int4Status)
{
return I2C_INACCESSIBLE;
}
if((int4Status & BIT0)&&( POWER_STATE_D0_MHL == fwPowerState )) // SCDT Status Change
{
//if (g_chipRevId < 1)
ProcessScdtStatusChange();
}
// process MHL_EST interrupt
if(int4Status & BIT2) // MHL_EST_INT
{
MhlTxDrvProcessConnection();
}
// process USB_EST interrupt
else if(int4Status & BIT3)
{
TX_DEBUG_PRINT(("Drv: uUSB-A type device detected.\n"));
SiiRegWrite(REG_DISC_STAT2, 0x80); // Exit D3 via CBUS falling edge
SwitchToD3();
return I2C_INACCESSIBLE;
}
if (int4Status & BIT5)
{
MhlTxDrvProcessDisconnection();
return I2C_INACCESSIBLE;
}
if((POWER_STATE_D0_MHL != fwPowerState) && (int4Status & BIT6))
{
// Switch to full power mode.
SwitchToD0();
//
// If a sink is connected but not powered on, this interrupt can keep coming
// Determine when to go back to sleep. Say after 1 second of this state.
//
// Check RGND register and send wake up pulse to the peer
//
ProcessRgnd();
}
// Can't succeed at these in D3
if(fwPowerState != POWER_STATE_D3)
{
// CBUS Lockout interrupt?
if (int4Status & BIT4)
{
TX_DEBUG_PRINT(("Drv: CBus Lockout\n"));
SwitchToD0();
ForceUsbIdSwitchOpen();
ReleaseUsbIdSwitchOpen();
SwitchToD3();
}
}
SiiRegWrite(REG_INTR4, int4Status); // clear all interrupts
return I2C_ACCESSIBLE;
}
