/************************************************************************************************** * @fn SysCtrlRunSetting * * @brief Setup which peripherals are enabled/disabled while in active/run state * * input parameters * * @param None. * * output parameters * * None. * * @return None. **************************************************************************************************/ void SysCtrlRunSetting(void) { /* Enable General Purpose Timers 0, 1, 2, 3 when running */ SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_GPT0); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_GPT1); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_GPT2); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_GPT3); /* Enable SSI 0, 1 when running */ SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_SSI0); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_SSI1); /* Enable UART 0, 1 when running */ SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_UART0); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_UART1); SysCtrlPeripheralReset(SYS_CTRL_PERIPH_AES); SysCtrlPeripheralReset(SYS_CTRL_PERIPH_PKA); /* Enable I2C, AES and PKA running */ SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_I2C); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_PKA); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_AES); /* * Enable RFC during run. Please note that this setting is * only valid for PG2.0. For PG1.0 since the RFC is always on, * this is only a dummy instruction */ SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_RFC); }
void i2c_init(void) { bool status; // Enable peripheral except in deep sleep modes (e.g. LPM1, LPM2, LPM3) SysCtrlPeripheralEnable(I2C_PERIPHERAL); SysCtrlPeripheralSleepEnable(I2C_PERIPHERAL); SysCtrlPeripheralDeepSleepDisable(I2C_PERIPHERAL); // Reset peripheral previous to configuring it SysCtrlPeripheralReset(I2C_PERIPHERAL); // Configure the SCL pin GPIOPinTypeI2C(I2C_BASE, I2C_SCL); IOCPinConfigPeriphInput(I2C_BASE, I2C_SCL, IOC_I2CMSSCL); IOCPinConfigPeriphOutput(I2C_BASE, I2C_SCL, IOC_MUX_OUT_SEL_I2C_CMSSCL); // Configure the SDA pin GPIOPinTypeI2C(I2C_BASE, I2C_SDA); IOCPinConfigPeriphInput(I2C_BASE, I2C_SDA, IOC_I2CMSSDA); IOCPinConfigPeriphOutput(I2C_BASE, I2C_SDA, IOC_MUX_OUT_SEL_I2C_CMSSDA); // Configure the I2C clock status = (I2C_BAUDRATE == 400000 ? true : false); I2CMasterInitExpClk(SysCtrlClockGet(), status); // Enable the I2C module as master I2CMasterEnable(); }
/* * Public API */ void ws_radio_init(void) { WS_DEBUG("init\n"); /* Reset state */ memset(&radio_state, 0, sizeof(radio_state)); /* Enable the clock */ /* TODO: Power saving. We're basically leaving the radio on all the time */ SysCtrlPeripheralReset(SYS_CTRL_PERIPH_RFC); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_RFC); SysCtrlPeripheralSleepEnable(SYS_CTRL_PERIPH_RFC); SysCtrlPeripheralDeepSleepEnable(SYS_CTRL_PERIPH_RFC); /* Configure CCA */ HWREG(RFCORE_XREG_CCACTRL0) = CC2538_RFCORE_CCA_THRES; /* User Manual 23.15 - TX and RX settings */ HWREG(RFCORE_XREG_AGCCTRL1) = CC2538_RFCORE_AGC_TARGET; HWREG(RFCORE_XREG_TXFILTCFG) = CC2538_RFCORE_TX_AA_FILTER; HWREG(ANA_REGS_BASE + ANA_REGS_O_IVCTRL) = CC2538_RFCORE_BIAS_CURRENT; HWREG(RFCORE_XREG_FSCAL1) = CC2538_RFCORE_FREQ_CAL; /* Enable auto CRC calculation (hardware) */ HWREG(RFCORE_XREG_FRMCTRL0) = RFCORE_XREG_FRMCTRL0_AUTOCRC; /* Enable auto ACK */ HWREG(RFCORE_XREG_FRMCTRL0) |= RFCORE_XREG_FRMCTRL0_AUTOACK; /* Configure the FIFOP signal to trigger when there are one or more * complete frames in the RX FIFO */ HWREG(RFCORE_XREG_FIFOPCTRL) = WS_RADIO_MAX_PACKET_LEN; /* Set the TX output power */ HWREG(RFCORE_XREG_TXPOWER) = CC2538_RFCORE_TX_POWER; /* Interrupt wth FIFOP signal */ HWREG(RFCORE_XREG_RFIRQM0) = 0x04; IntRegister(INT_RFCORERTX, &rf_isr); IntEnable(INT_RFCORERTX); /* Interrupt with all RF ERROR signals */ HWREG(RFCORE_XREG_RFERRM) = 0x7f; IntRegister(INT_RFCOREERR, &rf_err_isr); IntEnable(INT_RFCOREERR); /* Configure the frame filtering */ HWREG(RFCORE_XREG_FRMFILT0) &= ~RFCORE_XREG_FRMFILT0_MAX_FRAME_VERSION_M; HWREG(RFCORE_XREG_FRMFILT0) |= WS_MAC_MAX_FRAME_VERSION << RFCORE_XREG_FRMFILT0_MAX_FRAME_VERSION_S; /* Don't bother filtering out the source addresses */ HWREG(RFCORE_XREG_SRCMATCH) &= ~RFCORE_XREG_SRCMATCH_SRC_MATCH_EN; }
//***************************************************************************** // // Main function of example. // //***************************************************************************** void main(void) { uint8_t status; // // Set the clocking to run directly from the external crystal/oscillator. // (no ext 32k osc, no internal osc) // SysCtrlClockSet(false, false, SYS_CTRL_SYSDIV_32MHZ); // // Set IO clock to the same as system clock // SysCtrlIOClockSet(SYS_CTRL_SYSDIV_32MHZ); // // Enable AES peripheral // SysCtrlPeripheralReset(SYS_CTRL_PERIPH_AES); SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_AES); // // Register AES interrupt // IntRegister(INT_AES, CCMIntHandler); // // Enable global interrupts // IntAltMapEnable(); IntMasterEnable(); for(uint8_t i = 0; i < sizeof(sCCMNodecryptExample)/ sizeof(sCCMNodecryptExample[0] ); i++) { // // Run and Verify CCM Inverse Authentication only // status = CCMDecryptExamples(sCCMNodecryptExample[i].ui8CCMDecrypt, sCCMNodecryptExample[i].ui8CCMKey, sCCMNodecryptExample[i].ui8CCMMval, sCCMNodecryptExample[i].ui8CCMN, sCCMNodecryptExample[i].ui8CCMC, sCCMNodecryptExample[i].ui16CCMLenC, sCCMNodecryptExample[i].ui8CCMA, sCCMNodecryptExample[i].ui16CCMLenA, sCCMNodecryptExample[i].ui8CCMKeyLocation, sCCMNodecryptExample[i].ui8CCMCstate, sCCMNodecryptExample[i].ui8CCMLVal, sCCMNodecryptExample[i].ui8CCMIntEnable, sCCMNodecryptExample[i]. ui8CCMExpectedOutput); if(status != AES_SUCCESS) { while(1) { // // AES CCM failed // } } } for(uint8_t i = 0; i < sizeof(sCCMNoencryptExample)/ sizeof(sCCMNoencryptExample[0] ); i++) { // // Run and Verify CCM Authentication only // status = CCMEncryptExample(sCCMNoencryptExample[i].ui8CCMEncrypt, sCCMNoencryptExample[i].ui8CCMkey, sCCMNoencryptExample[i].ui8CCMMval, sCCMNoencryptExample[i].ui8CCMN, sCCMNoencryptExample[i].ui8CCMM, sCCMNoencryptExample[i].ui16CCMLenM, sCCMNoencryptExample[i].ui8CCMA, sCCMNoencryptExample[i].ui16CCMLenA, sCCMNoencryptExample[i].ui8CCMKeyLocation, sCCMNoencryptExample[i].ui8CCMCstate, sCCMNoencryptExample[i].ui8CCMCCMLVal, sCCMNoencryptExample[i].ui8CCMIntEnable, sCCMNoencryptExample[i]. ui8CCMExpectedOutput); if(status != AES_SUCCESS) { while(1) { // // AES CCM failed // } } } for(uint8_t i = 0; i < sizeof(sCCMEncryptExample)/ sizeof(sCCMEncryptExample[0] ); i++) { // // Run and Verify CCM Authentication + Encryption // status = CCMEncryptExample(sCCMEncryptExample[i].ui8CCMEncrypt, sCCMEncryptExample[i].ui8CCMkey, sCCMEncryptExample[i].ui8CCMMval, sCCMEncryptExample[i].ui8CCMN, sCCMEncryptExample[i].ui8CCMM, sCCMEncryptExample[i].ui16CCMLenM, sCCMEncryptExample[i].ui8CCMA, sCCMEncryptExample[i].ui16CCMLenA, sCCMEncryptExample[i].ui8CCMKeyLocation, sCCMEncryptExample[i].ui8CCMCstate, sCCMEncryptExample[i].ui8CCMCCMLVal, sCCMEncryptExample[i].ui8CCMIntEnable, sCCMEncryptExample[i]. ui8CCMExpectedOutput); if(status != AES_SUCCESS) { while(1) { // // AES CCM failed // } } } for(uint8_t i = 0; i < sizeof(sCCMDecryptExample)/ sizeof(sCCMDecryptExample[0] ); i++) { // // Run and Verify CCM Inverse Authentication + Decryption // status = CCMDecryptExamples(sCCMDecryptExample[i].ui8CCMDecrypt, sCCMDecryptExample[i].ui8CCMKey, sCCMDecryptExample[i].ui8CCMMval, sCCMDecryptExample[i].ui8CCMN, sCCMDecryptExample[i].ui8CCMC, sCCMDecryptExample[i].ui16CCMLenC, sCCMDecryptExample[i].ui8CCMA, sCCMDecryptExample[i].ui16CCMLenA, sCCMDecryptExample[i].ui8CCMKeyLocation, sCCMDecryptExample[i].ui8CCMCstate, sCCMDecryptExample[i].ui8CCMLVal, sCCMDecryptExample[i].ui8CCMIntEnable, sCCMDecryptExample[i]. ui8CCMExpectedOutput); if(status != AES_SUCCESS) { while(1) { // // AES CCM failed // } } } // CCM was successful while(1) { } }