static void tcu_dump_reg_hex(void)
{
TCSM_PCHAR('G');
serial_put_hex(tcu_readl(CH_TCSR(tcu_channel)));
serial_put_hex(tcu_readl(CH_TCNT(tcu_channel)));
serial_put_hex(tcu_readl(TCU_TER));
serial_put_hex(tcu_readl(TCU_TFR));
serial_put_hex(tcu_readl(TCU_TMR));
serial_put_hex(tcu_readl(TCU_TSR));
serial_put_hex(tcu_readl(TCU_TSTR));
TCSM_PCHAR('H');
}
int handler(void)
{
static volatile int i;
i++;
TCSM_PCHAR('h');
TCSM_PCHAR('a');
TCSM_PCHAR('n');
TCSM_PCHAR('d');
TCSM_PCHAR('l');
TCSM_PCHAR('e');
serial_put_hex(i);
xxx_memcopy(dst, src, 4*1024);
return 0;
}
/* @fn: mod timer.
* @timer_cnt: cnt to be written to register.
* */
unsigned int tcu_timer_mod(unsigned long timer_cnt)
{
int count;
int current_count;
count = timer_cnt;
current_count = tcu_readl(CH_TCNT(tcu_channel));
tcu_writel(CH_TCNT(tcu_channel), 0);
tcu_writel(TCU_TSCR , (1 << tcu_channel));
tcu_writel(TCU_TECR,(1 << tcu_channel));
reset_timer(count);
#ifdef CONFIG_SLEEP_DEBUG
if(time >= TIME_1S) {
time = 0;
TCSM_PCHAR('.');
}
time += TCU_TIMER_MS;
#endif
return current_count;
}
int dmic_handler(int pre_ints)
{
volatile int ret;
REG_DMIC_ICR |= 0x3f;
REG_DMIC_IMR |= 1<<0 | 1<<4;
last_dma_count = REG_DMADTC(_dma_channel);
if(dmic_current_state == WAITING_TRIGGER) {
if(is_int_rtc(pre_ints)) {
// TCSM_PCHAR('F');
REG_DMIC_ICR |= 0x3f;
REG_DMIC_IMR &= ~(1<<0 | 1<<4);
return SYS_WAKEUP_FAILED;
}
dmic_current_state = WAITING_DATA;
/*change trigger value to 0, make dmic wakeup cpu all the time*/
#ifdef CONFIG_CPU_IDLE_SLEEP
tcu_timer_mod(ms_to_count(TCU_TIMER_MS)); /* start a timer */
#else
REG_DMIC_THRL = 0;
#endif
} else if (dmic_current_state == WAITING_DATA){
}
#ifdef CONFIG_CPU_SWITCH_FREQUENCY
ret = process_dma_data_3();
#else
ret = process_dma_data_2();
#endif
if(ret == SYS_WAKEUP_OK) {
return SYS_WAKEUP_OK;
} else if(ret == SYS_NEED_DATA) {
#ifdef CONFIG_CPU_IDLE_SLEEP
/* do nothing */
#else
REG_DMIC_TRINMAX = 5;
REG_DMIC_CR0 |= 1 << 6;
REG_DMIC_IMR &= ~( 1<<4 | 1<<0);
#endif
last_dma_count = REG_DMADTC(_dma_channel);
return SYS_NEED_DATA;
} else if(ret == SYS_WAKEUP_FAILED) {
/*
* if current wakeup operation failed. we need reconfig dmic
* to work at appropriate mode.
* */
dmic_current_state = WAITING_TRIGGER;
wakeup_failed_times++;
TCSM_PCHAR('F');
TCSM_PCHAR('A');
TCSM_PCHAR('I');
TCSM_PCHAR('L');
TCSM_PCHAR('E');
TCSM_PCHAR('D');
reconfig_thr_value();
#ifdef CONFIG_CPU_IDLE_SLEEP
/* del a timer, when dmic trigger. it will re start a timer */
tcu_timer_del();
#endif
/* change trigger mode to > N times*/
//REG_DMIC_TRICR |= 2 << 16;
REG_DMIC_TRINMAX = 5;
REG_DMIC_TRICR |= 1<<0; /*clear trigger*/
REG_DMIC_CR0 |= 3<<6; /* disable data path*/
REG_DMIC_ICR |= 0x3f;
REG_DMIC_IMR &= ~(1<<0 | 1<<4);
return SYS_WAKEUP_FAILED;
}
return SYS_WAKEUP_FAILED;
}
