TEST(atcacert_der_enc_length, atcacert_der_enc_length__long_form_2byte)
{
uint32_t length;
uint8_t der_len_min[] = { 0x81, 0x80 }; // 0x80
uint8_t der_len_max[] = { 0x81, 0xFF }; // 0xFF
uint8_t der_length[8];
size_t der_length_size = sizeof(der_length);
int ret = 0;
// Smallest 2-byte long form
length = 0x80;
der_length_size = sizeof(der_length);
ret = atcacert_der_enc_length(length, der_length, &der_length_size);
TEST_ASSERT_EQUAL(ATCACERT_E_SUCCESS, ret);
TEST_ASSERT_EQUAL(sizeof(der_len_min), der_length_size);
TEST_ASSERT_EQUAL_MEMORY(der_len_min, der_length, sizeof(der_len_min));
// Largest 2-byte long form
length = 0xFF;
der_length_size = sizeof(der_length);
ret = atcacert_der_enc_length(length, der_length, &der_length_size);
TEST_ASSERT_EQUAL(ATCACERT_E_SUCCESS, ret);
TEST_ASSERT_EQUAL(sizeof(der_len_max), der_length_size);
TEST_ASSERT_EQUAL_MEMORY(der_len_max, der_length, sizeof(der_len_max));
// Size only
length = 0xFF;
der_length_size = 0;
ret = atcacert_der_enc_length(length, NULL, &der_length_size);
TEST_ASSERT_EQUAL(ATCACERT_E_SUCCESS, ret);
TEST_ASSERT_EQUAL(sizeof(der_len_max), der_length_size);
}
void
test_MakeSHA1Mac(void)
{
#ifdef OPENSSL
const char* PKT_DATA = "abcdefgh0123";
const int PKT_LEN = strlen(PKT_DATA);
const char* EXPECTED_DIGEST =
"\x17\xaa\x82\x97\xc7\x17\x13\x6a\x9b\xa9"
"\x63\x85\xb4\xce\xbe\x94\xa0\x97\x16\x1d";
char actual[SHA1_LENGTH];
struct key sha1;
sha1.next = NULL;
sha1.key_id = 20;
sha1.key_len = 7;
memcpy(&sha1.key_seq, "sha1seq", sha1.key_len);
memcpy(&sha1.type, "SHA1", 5);
TEST_ASSERT_EQUAL(SHA1_LENGTH,
make_mac(PKT_DATA, PKT_LEN, SHA1_LENGTH, &sha1, actual));
TEST_ASSERT_EQUAL_MEMORY(EXPECTED_DIGEST, actual, SHA1_LENGTH);
#else
TEST_IGNORE_MESSAGE("OpenSSL not found, skipping...");
#endif /* OPENSSL */
}
/** \brief Test proper initialization of the encryption key. Write the random value to the encryption key slot of the default configuration.
* \return void
*/
void test_atcatls_init_enc_key(void)
{
ATCA_STATUS status = ATCA_GEN_FAIL;
uint8_t enckey_ret[ATCA_KEY_SIZE] = { 0 };
bool lock = false;
uint8_t enckeyId = TLS_SLOT_ENC_PARENT;
status = atcatls_init(g_pCfg);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
status = atcatlsfn_set_get_enckey(&get_enc_key);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
// Save the return value of _enckeytest to the application
// Return _enckeytest when get_enc_key is called
status = atcatls_init_enckey(_enckeytest, enckeyId, lock);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
status = atcatls_get_enckey(enckey_ret);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
TEST_ASSERT_EQUAL_MEMORY(enckey_ret, _enckeytest, ATCA_KEY_SIZE);
status = atcatls_finish();
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
}
/** \brief Test proper encrypted write/read using the default configuration.
* \return void
*/
void test_atcatls_enc_write_read(void)
{
ATCA_STATUS status = ATCA_GEN_FAIL;
uint8_t writeBytes[] = { 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19 };
int16_t writeSize = sizeof(writeBytes);
uint8_t readBytes[ATCA_BLOCK_SIZE] = { 0 };
int16_t readSize = sizeof(readBytes);
uint8_t enckeyId = TLS_SLOT_ENC_PARENT;
uint8_t slotId = TLS_SLOT8_ENC_STORE;
uint8_t block = 0;
status = atcatls_init(g_pCfg);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
status = atcatls_enc_write(slotId, block, enckeyId, writeBytes, writeSize);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
status = atcatls_enc_read(slotId, block, enckeyId, readBytes, &readSize);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
// Check the equivalence of the buffers
TEST_ASSERT_EQUAL(readSize, writeSize);
TEST_ASSERT_EQUAL_MEMORY(readBytes, writeBytes, readSize);
status = atcatls_finish();
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
}
void
test_HandleKodDemobilize(void)
{
static const char * HOSTNAME = "192.0.2.1";
static const char * REASON = "DENY";
struct pkt rpkt;
sockaddr_u host;
int rpktl;
struct kod_entry * entry;
rpktl = KOD_DEMOBILIZE;
ZERO(rpkt);
memcpy(&rpkt.refid, REASON, 4);
ZERO(host);
host.sa4.sin_family = AF_INET;
host.sa4.sin_addr.s_addr = inet_addr(HOSTNAME);
/* Test that the KOD-entry is added to the database. */
kod_init_kod_db("/dev/null", TRUE);
TEST_ASSERT_EQUAL(1, handle_pkt(rpktl, &rpkt, &host, HOSTNAME));
TEST_ASSERT_EQUAL(1, search_entry(HOSTNAME, &entry));
TEST_ASSERT_EQUAL_MEMORY(REASON, entry->type, 4);
}
void
test_MakeCMac(void)
{
#ifdef OPENSSL
const char* PKT_DATA = "abcdefgh0123";
const int PKT_LEN = strlen(PKT_DATA);
const char* EXPECTED_DIGEST =
"\xdd\x35\xd5\xf5\x14\x23\xd9\xd6"
"\x38\x5d\x29\x80\xfe\x51\xb9\x6b";
char actual[CMAC_LENGTH];
struct key cmac;
cmac.next = NULL;
cmac.key_id = 30;
cmac.key_len = CMAC_LENGTH;
memcpy(&cmac.key_seq, "aes-128-cmac-seq", cmac.key_len);
memcpy(&cmac.typen, CMAC, strlen(CMAC) + 1);
TEST_ASSERT_EQUAL(CMAC_LENGTH,
make_mac(PKT_DATA, PKT_LEN, CMAC_LENGTH, &cmac, actual));
TEST_ASSERT_EQUAL_MEMORY(EXPECTED_DIGEST, actual, CMAC_LENGTH);
#else
TEST_IGNORE_MESSAGE("OpenSSL not found, skipping...");
#endif /* OPENSSL */
}
void test_PR6_ClientOutput_multiple(void)
{
TEST_ASSERT_EQUAL(&client, PR6_ClientInit_AddMethod(&client, 42, 2, (const uint8_t *)"again", strlen("again")));
TEST_ASSERT_EQUAL(&client, PR6_ClientInit_AddMethod(&client, 42, 3, (const uint8_t *)"helloworld", strlen("helloworld")));
TEST_ASSERT_EQUAL(&client, PR6_ClientInit_AddMethod(&client, 42, 4, (const uint8_t *)"hello", strlen("hello")));
uint8_t expectedOut[] = {
PR6_METHOD_REQ,
0x00, 42,
1,
5, 'h','e','l','l','o',
0x00, 42,
2,
5, 'a','g','a','i','n',
0x00, 42,
3,
10, 'h','e','l','l','o','w','o','r','l','d',
0x00, 42,
4,
5, 'h','e','l','l','o'
};
uint8_t out[sizeof(expectedOut)];
TEST_ASSERT_EQUAL(sizeof(expectedOut), PR6_ClientOutput(&client, out, sizeof(out)));
TEST_ASSERT_EQUAL_MEMORY(expectedOut, out, sizeof(expectedOut));
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_PENDING, PR6_ClientState(&client));
PR6_ClientOutputConfirm(NULL, &client, 0);
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_SENT, PR6_ClientState(&client));
}
void test_PR6_ClientOutput_nonConfirmed(void)
{
static struct pr6_client_req_res pool[4U];
static uint16_t poolMax = sizeof(pool) / sizeof(*pool);
bool confirmed = false;
bool breakOnError = false;
TEST_ASSERT_EQUAL(&client, PR6_ClientInit(&client, pool, poolMax, confirmed, breakOnError, cbResult, 42, 1, (const uint8_t *)"hello", strlen("hello")));
TEST_ASSERT_EQUAL(&client, PR6_ClientInit_AddMethod(&client, 42, 1, (const uint8_t *)"hello", strlen("hello")));
uint8_t expectedOut[] = {
PR6_METHOD_NC_REQ,
0x00, 42,
1,
5, 'h','e','l','l','o',
0x00, 42,
1,
5, 'h','e','l','l','o'
};
uint8_t out[sizeof(expectedOut)];
TEST_ASSERT_EQUAL(sizeof(expectedOut), PR6_ClientOutput(&client, out, sizeof(out)));
TEST_ASSERT_EQUAL_MEMORY(expectedOut, out, sizeof(expectedOut));
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_PENDING, PR6_ClientState(&client));
TEST_ASSERT_EQUAL(0, cbResultTouch);
PR6_ClientOutputConfirm(NULL, &client, 0);
TEST_ASSERT_EQUAL(1, cbResultTouch);
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_COMPLETE, PR6_ClientState(&client));
}
TEST(UsartIO_DMA, ReadInvalidArgs)
{
char c;
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
/** These tests are enough, don't validate 'internal state' of opaque struct, pointless. **/
TEST_ASSERT_EQUAL(-1, UART_IO_Read(0, &c, 1)); /** null handle **/
TEST_ASSERT_EQUAL(EINVAL, errno);
TEST_ASSERT_EQUAL(-1, UART_IO_Read(&huio, 0, 1)); /** null buf p **/
TEST_ASSERT_EQUAL(EINVAL, errno);
TEST_ASSERT_EQUAL(0, UART_IO_Read(&huio, &c, 0)); /** no error checking as linux **/
}
TEST(UsartIO_DMA, ReadWhenBytesToReadLessThanOrEqualToBytesInBuffer)
{
char sample[] = "test";
char buf[64];
int read;
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
char rxbuf0[64];
char rxbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.rbuf[0] = rxbuf0;
huio.rbuf[1] = rxbuf1;
// fill_rx_upper(&huio, 1, 1, sample, strlen(sample)); /** use buffer 1 as upper buffer **/
fill_rx_testdata(&huio, 1, 1, sample, strlen(sample), 0, 0, 0);
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, strlen(sample));
TEST_ASSERT_EQUAL(strlen(sample), read);
TEST_ASSERT_EQUAL_MEMORY(sample, buf, strlen(sample));
}
HAL_StatusTypeDef swap_mock_hal_ok(UARTEX_HandleTypeDef* h, uint8_t* buf, size_t size, uint32_t* m0ar, int* ndtr)
{
uio_testdata_t* testdata = (uio_testdata_t*)h->testdata;
if (m0ar) *m0ar = testdata->rx_m0ar;
if (ndtr) *ndtr = testdata->rx_ndtr;
testdata->rx_m0ar = (uint32_t)buf;
testdata->rx_ndtr = size;
return HAL_OK;
}
void test_RingBuffer_Put_is_handles_overflows(void)
{
uint8_t expected_backing[] = {'A','B','C','D', 0};
TEST_ASSERT_TRUE(RingBuffer_Put(&rb, 'A'));
TEST_ASSERT_TRUE(RingBuffer_Put(&rb, 'B'));
TEST_ASSERT_TRUE(RingBuffer_Put(&rb, 'C'));
TEST_ASSERT_TRUE(RingBuffer_Put(&rb, 'D'));
TEST_ASSERT_FALSE(RingBuffer_Put(&rb, 'E')); // overflow, should be false
TEST_ASSERT_EQUAL_MEMORY(expected_backing, backing, sizeof(expected_backing));
}
void testNotEqualMemory4(void)
{
int failed;
EXPECT_ABORT_BEGIN
TEST_ASSERT_EQUAL_MEMORY("fool", NULL, 4);
EXPECT_ABORT_END
failed = Unity.CurrentTestFailed;
Unity.CurrentTestFailed = 0;
VERIFY_FAILURE_WAS_CAUGHT
}
void test_PR6_ClientOutput_retry(void)
{
uint8_t expectedOut[] = {
PR6_METHOD_REQ,
0x00, 42,
1,
5, 'h','e','l','l','o'
};
uint8_t out[sizeof(expectedOut)];
TEST_ASSERT_EQUAL(sizeof(expectedOut), PR6_ClientOutput(&client, out, sizeof(out)));
TEST_ASSERT_EQUAL_MEMORY(expectedOut, out, sizeof(expectedOut));
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_PENDING, PR6_ClientState(&client));
PR6_ClientOutputConfirm(NULL, &client, 0);
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_SENT, PR6_ClientState(&client));
TEST_ASSERT_EQUAL(sizeof(expectedOut), PR6_ClientOutput(&client, out, sizeof(out)));
TEST_ASSERT_EQUAL_MEMORY(expectedOut, out, sizeof(expectedOut));
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_PENDING, PR6_ClientState(&client));
PR6_ClientOutputConfirm(NULL, &client, 0);
TEST_ASSERT_EQUAL(PR6_CLIENT_STATE_SENT, PR6_ClientState(&client));
}
void test_VertexWithElem(void)
{
J_VERTEX *V2;
ELEM El;
El.Key = 10;
El.Data = 100;
V2 = JVertex_New("Vertice B", &El, (INITIALIZER)InizializzaElemento, (DELETER)CancellaElemento);
TEST_ASSERT_EQUAL_STRING("Vertice B", JVertex_GetLabel(V2));
TEST_ASSERT_EQUAL_MEMORY(&El, JVertex_GetData(V2), sizeof(ELEM));
JVertex_Destroy( V2 );
}
void testEqualMemory(void)
{
const char *testString = "whatever";
TEST_ASSERT_EQUAL_MEMORY(testString, testString, 8);
TEST_ASSERT_EQUAL_MEMORY("whatever", "whatever", 8);
TEST_ASSERT_EQUAL_MEMORY("whatever", testString, 8);
TEST_ASSERT_EQUAL_MEMORY(testString, "whatever", 8);
TEST_ASSERT_EQUAL_MEMORY(testString, "whatever", 2);
TEST_ASSERT_EQUAL_MEMORY(NULL, NULL, 1);
}
/** \brief Test proper encrypted write/read of an RSA key using the default configuration.
* \return void
*/
void test_atcatls_enc_rsakey_write_read(void)
{
ATCA_STATUS status = ATCA_GEN_FAIL;
uint8_t rsakey[] = { 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19,
0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29,
0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,
0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69,
0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79,
0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89,
0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99,
0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9,
0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9,
0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9,
0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9,
0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9,
0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9 };
uint8_t readBytes[RSA2048_KEY_SIZE] = { 0 };
uint8_t enckeyId = TLS_SLOT_ENC_PARENT;
int16_t keysize = RSA2048_KEY_SIZE;
status = atcatls_init(g_pCfg);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
// Write the RSA key
status = atcatls_enc_rsakey_write(enckeyId, rsakey, keysize);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
// Read the RSA key
status = atcatls_enc_rsakey_read(enckeyId, readBytes, &keysize);
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
TEST_ASSERT_EQUAL(keysize, RSA2048_KEY_SIZE);
// Check the equivalence of the buffers
TEST_ASSERT_EQUAL_MEMORY(readBytes, rsakey, RSA2048_KEY_SIZE);
status = atcatls_finish();
TEST_ASSERT_EQUAL(ATCA_SUCCESS, status);
}
void
test_GenerateAuthenticatedPacket(void)
{
static const int EXPECTED_PKTLEN = LEN_PKT_NOMAC + MAX_MD5_LEN;
struct key testkey;
struct pkt testpkt;
struct timeval xmt;
l_fp expected_xmt, actual_xmt;
char expected_mac[MAX_MD5_LEN];
testkey.next = NULL;
testkey.key_id = 30;
testkey.key_len = 9;
memcpy(testkey.key_seq, "123456789", testkey.key_len);
strlcpy(testkey.typen, "MD5", sizeof(testkey.typen));
testkey.typei = keytype_from_text(testkey.typen, NULL);
GETTIMEOFDAY(&xmt, NULL);
xmt.tv_sec += JAN_1970;
TEST_ASSERT_EQUAL(EXPECTED_PKTLEN,
generate_pkt(&testpkt, &xmt, testkey.key_id, &testkey));
TEST_ASSERT_EQUAL(LEAP_NOTINSYNC, PKT_LEAP(testpkt.li_vn_mode));
TEST_ASSERT_EQUAL(NTP_VERSION, PKT_VERSION(testpkt.li_vn_mode));
TEST_ASSERT_EQUAL(MODE_CLIENT, PKT_MODE(testpkt.li_vn_mode));
TEST_ASSERT_EQUAL(STRATUM_UNSPEC, PKT_TO_STRATUM(testpkt.stratum));
TEST_ASSERT_EQUAL(8, testpkt.ppoll);
TVTOTS(&xmt, &expected_xmt);
NTOHL_FP(&testpkt.xmt, &actual_xmt);
TEST_ASSERT_TRUE(LfpEquality(expected_xmt, actual_xmt));
TEST_ASSERT_EQUAL(testkey.key_id, ntohl(testpkt.exten[0]));
TEST_ASSERT_EQUAL(MAX_MD5_LEN - 4, /* Remove the key_id, only keep the mac. */
make_mac(&testpkt, LEN_PKT_NOMAC, MAX_MD5_LEN-4, &testkey, expected_mac));
TEST_ASSERT_EQUAL_MEMORY(expected_mac, (char*)&testpkt.exten[1], MAX_MD5_LEN -4);
}
void
test_Encrypt(void) {
char *packetPtr;
int length;
packetPtr = emalloc(totalLength * sizeof(*packetPtr));
memset(packetPtr + packetLength, 0, keyIdLength);
memcpy(packetPtr, packet, packetLength);
cache_secretsize = keyLength;
length = MD5authencrypt(keytype, (u_char*)key, (u_int32*)packetPtr, packetLength);
TEST_ASSERT_TRUE(MD5authdecrypt(keytype, (u_char*)key, (u_int32*)packetPtr, packetLength, length));
TEST_ASSERT_EQUAL(20, length);
TEST_ASSERT_EQUAL_MEMORY(expectedPacket, packetPtr, totalLength);
free(packetPtr);
}
static void cbResult(void *ctxt, struct pr6_client *r, uint16_t listSize, const struct pr6_client_req_res *list)
{
cbResultTouch++;
TEST_ASSERT_TRUE(listSize > 0);
TEST_ASSERT_EQUAL(listSize, r->listSize);
TEST_ASSERT_EQUAL(list, r->list);
TEST_ASSERT_EQUAL(expectedListSize, listSize);
for(uint16_t i=0; i < expectedListSize; i++){
TEST_ASSERT_EQUAL(expectedList[i].objectID, list[i].objectID);
TEST_ASSERT_EQUAL(expectedList[i].methodIndex, list[i].methodIndex);
TEST_ASSERT_EQUAL(expectedList[i].argLen, list[i].argLen);
TEST_ASSERT_EQUAL_MEMORY(expectedList[i].arg, list[i].arg, list[i].argLen);
//TEST_ASSERT_EQUAL(expectedList[i].result, list[i].result);
TEST_ASSERT_EQUAL(expectedList[i].returnValueLen, list[i].returnValueLen);
//TEST_ASSERT_EQUAL_MEMORY(expectedList[i].returnValue, list[i].returnValue, list[i].returnValueLen);
}
}
void testNotEqualMemory1(void)
{
EXPECT_ABORT_BEGIN
TEST_ASSERT_EQUAL_MEMORY("foo", "bar", 3);
VERIFY_FAILS_END
}
void testNotEqualMemory4(void)
{
EXPECT_ABORT_BEGIN
TEST_ASSERT_EQUAL_MEMORY("fool", NULL, 4);
VERIFY_FAILS_END
}
void test_serialize_request_with_args() {
char buffer[SLURP_REQUEST_MAX_LENGTH];
uint8_t length = slurp_serialize_request(&geo_request, buffer, SLURP_REQUEST_MAX_LENGTH);
TEST_ASSERT_EQUAL_MEMORY(geo_request_str, buffer, length);
}
TEST(UsartIO_DMA, ReadWhenBytesToReadMoreThanBytesInBufferAndHalReady)
{
const char soft[] = "test";
const char hard[] = "driven";
char buf[64];
int read;
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
uio_testdata_t td;
// struct UARTEX_Operations uart_ops;
char rxbuf0[64];
char rxbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.rbuf[0] = rxbuf0;
huio.rbuf[1] = rxbuf1;
// memset(&uart_ops, 0, sizeof(uart_ops));
// uart_ops.swap = swap_mock_hal_ok;
// huio.handle->ops = &uart_ops;
memset(&huio.handle->ops, 0, sizeof(struct UARTEX_Operations));
huio.handle->ops.swap = swap_mock_hal_ok;
memset(&td, 0, sizeof(td));
huio.handle->testdata = &td;
fill_rx_testdata(&huio, 0, 1, soft, strlen(soft), hard, strlen(hard), UART_IO_BUFFER_SIZE);
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, sizeof(buf));
TEST_ASSERT_EQUAL(strlen(soft) + strlen(hard), read);
TEST_ASSERT_EQUAL_STRING("testdriven", buf);
}
static HAL_StatusTypeDef swap_mock_hal_error(UARTEX_HandleTypeDef* h, uint8_t* buf, size_t size, uint32_t* m0ar, int* ndtr)
{
return HAL_ERROR;
}
static HAL_StatusTypeDef swap_mock_hal_busy(UARTEX_HandleTypeDef* h, uint8_t* buf, size_t size, uint32_t* m0ar, int* ndtr)
{
return HAL_BUSY;
}
static HAL_StatusTypeDef swap_mock_hal_timeout(UARTEX_HandleTypeDef* h, uint8_t* buf, size_t size, uint32_t* m0ar, int* ndtr)
{
return HAL_TIMEOUT;
}
TEST(UsartIO_DMA, ReadWhenBytesToReadMoreThanBytesInBufferAndHalErrorBusyTimeoutAndBufferNotEmpty)
{
const char soft[] = "test";
const char hard[] = "driven";
char buf[64];
int read;
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
uio_testdata_t td;
// struct UARTEX_Operations uart_ops;
char rxbuf0[64];
char rxbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.rbuf[0] = rxbuf0;
huio.rbuf[1] = rxbuf1;
// memset(&uart_ops, 0, sizeof(uart_ops));
// huio.handle->ops = &uart_ops;
memset(&huio.handle->ops, 0, sizeof(huio.handle->ops));
memset(&td, 0, sizeof(td));
huio.handle->testdata = &td;
// fill and mock
fill_rx_testdata(&huio, 0, 1, soft, strlen(soft), hard, strlen(hard), UART_IO_BUFFER_SIZE);
// uart_ops.swap = swap_mock_hal_error; // swap_mock_hal_ok;
huio.handle->ops.swap = swap_mock_hal_error;
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, sizeof(buf));
TEST_ASSERT_EQUAL(strlen(soft), read);
TEST_ASSERT_EQUAL_STRING(soft, buf);
// refill and remock
fill_rx_testdata(&huio, 1, 1, soft, strlen(soft), hard, strlen(hard), UART_IO_BUFFER_SIZE);
// uart_ops.swap = swap_mock_hal_busy;
huio.handle->ops.swap = swap_mock_hal_busy;
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, sizeof(buf));
TEST_ASSERT_EQUAL(strlen(soft), read);
TEST_ASSERT_EQUAL_STRING(soft, buf);
// refill and remock
fill_rx_testdata(&huio, 1, 2, soft, strlen(soft), hard, strlen(hard), UART_IO_BUFFER_SIZE);
// uart_ops.swap = swap_mock_hal_timeout;
huio.handle->ops.swap = swap_mock_hal_timeout;
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, sizeof(buf));
TEST_ASSERT_EQUAL(strlen(soft), read);
TEST_ASSERT_EQUAL_STRING(soft, buf);
}
TEST(UsartIO_DMA, ReadWhenBytesToReadMoreThanBytesInBufferAndHalErrorBusyTimeoutAndBufferEmpty)
{
/** This case says if upper buffer is empty and HAL in error state, the function should return error **/
char buf[64];
int read;
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
uio_testdata_t td;
// struct UARTEX_Operations uart_ops;
char rxbuf0[64];
char rxbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.rbuf[0] = rxbuf0;
huio.rbuf[1] = rxbuf1;
// memset(&uart_ops, 0, sizeof(uart_ops));
// huio.handle->ops = &uart_ops;
memset(&huio.handle->ops, 0, sizeof(huio.handle->ops));
memset(&td, 0, sizeof(td));
huio.handle->testdata = &td;
fill_rx_testdata(&huio, 1, 1, 0, 0, 0, 0, 0);
huio.handle->ops.swap = swap_mock_hal_error;
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, sizeof(buf));
TEST_ASSERT_EQUAL(-1, read);
TEST_ASSERT_EQUAL(EINVAL, errno);
fill_rx_testdata(&huio, 1, 1, 0, 0, 0, 0, 0);
huio.handle->ops.swap = swap_mock_hal_busy;
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, sizeof(buf));
TEST_ASSERT_EQUAL(-1, read);
TEST_ASSERT_EQUAL(EBUSY, errno);
fill_rx_testdata(&huio, 1, 1, 0, 0, 0, 0, 0);
huio.handle->ops.swap = swap_mock_hal_timeout;
memset(buf, 0, sizeof(buf));
read = UART_IO_Read(&huio, buf, sizeof(buf));
TEST_ASSERT_EQUAL(-1, read);
TEST_ASSERT_EQUAL(EIO, errno);
}
///////////////////////////////////////////////////////////////////////////////
#if 0 // open tests commented out
/******************************************************************************
*
* Test Cases for USART_IO_Open
*
*****************************************************************************/
//TEST(UsartIO_DMA, OpenInvalidArgs)
//{
// TEST_ASSERT_EQUAL(0, UART_IO_Open(0));
// TEST_ASSERT_EQUAL(EINVAL, errno);
// TEST_ASSERT_EQUAL(0, UART_IO_Open(7));
// TEST_ASSERT_EQUAL(EINVAL, errno);
//}
//TEST(UsartIO_DMA, OpenPortUnavailable) /** handle does not exist **/
//{
// UART_IO_SetHandle(6, 0);
//
// TEST_ASSERT_EQUAL(0, UART_IO_Open(6));
// TEST_ASSERT_EQUAL(ENODEV, errno);
//}
//TEST(UsartIO_DMA, OpenInvalidHandle)
//{
// m_huio.handle = 0;
// UART_IO_SetHandle(6, &m_huio);
// TEST_ASSERT_EQUAL(0, UART_IO_Open(6));
//}
//TEST(UsartIO_DMA, OpenHalNotResetState)
//{
// m_huio.handle->State = HAL_UART_STATE_READY;
//
// UART_IO_SetHandle(6, &m_huio);
//
// TEST_ASSERT_EQUAL(0, UART_IO_Open(6));
// TEST_ASSERT_EQUAL(EBUSY, errno);
//}
//TEST(UsartIO_DMA, OpenHalInitOkReceiveOk)
//{
// UART_IO_SetHandle(6, &m_huio);
// usart_apis.HAL_UART_Init = m_init_hal_ok;
// usart_apis.HAL_UART_Receive_DMA = m_receive_hal_ok;
//
// TEST_ASSERT_EQUAL(&m_huio, UART_IO_Open(6));
//
// /** should we check HAL state? I don't think so, cause
// the function trust the return value, rather than
// checking state **/
//
// /** all following should be checked since they ARE
// the results of action of the function under test **/
// TEST_ASSERT_TRUE(m_rx_m0ar == (uint32_t)m_huio.rbuf[0]);
// TEST_ASSERT_TRUE(m_rx_ndtr == UART_IO_BUFFER_SIZE);
//
// TEST_ASSERT_TRUE(m_huio.rx_upper == m_huio.rbuf[1]);
// TEST_ASSERT_TRUE(m_huio.rx_tail == &m_huio.rx_upper[UART_IO_BUFFER_SIZE]);
// TEST_ASSERT_TRUE(m_huio.rx_head == m_huio.rx_tail);
//
// TEST_ASSERT_TRUE(m_huio.tx_head == &m_huio.tbuf[1][0]);
// TEST_ASSERT_TRUE(m_huio.tx_tail == m_huio.tx_head);
//}
#endif
///////////////////////////////////////////////////////////////////////////////
// Write
//
TEST(UsartIO_DMA, WriteInvalidArgs)
{
char c;
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
TEST_ASSERT_EQUAL(-1, UART_IO_Write(0, &c, 1));
TEST_ASSERT_EQUAL(EINVAL, errno);
TEST_ASSERT_EQUAL(-1, UART_IO_Write(&huio, 0, 1));
TEST_ASSERT_EQUAL(EINVAL, errno);
/** no effect for errno**/
/** may be changed future, man page write **/
TEST_ASSERT_EQUAL(0, UART_IO_Write(&huio, &c, 0));
}
TEST(UsartIO_DMA, WriteHalStateTimeoutErrorReset)
{
// HAL_UART_STATE_TIMEOUT means hardware error.
// HAL_UART_STATE_RESET should not happen.
// HAL_UART_STATE_ERROR are not used in firmware 1.1
char c;
UARTEX_HandleTypeDef huartex;
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
huio.handle = &huartex;
errno = 0;
huio.handle->huart.State = HAL_UART_STATE_TIMEOUT;
TEST_ASSERT_EQUAL(-1, UART_IO_Write(&huio, &c, 1));
TEST_ASSERT_EQUAL(EIO, errno);
errno = 0;
huio.handle->huart.State = HAL_UART_STATE_RESET;
TEST_ASSERT_EQUAL(-1, UART_IO_Write(&huio, &c, 1));
TEST_ASSERT_EQUAL(EIO, errno);
errno = 0;
huio.handle->huart.State = HAL_UART_STATE_ERROR;
TEST_ASSERT_EQUAL(-1, UART_IO_Write(&huio, &c, 1));
TEST_ASSERT_EQUAL(EIO, errno);
}
static HAL_StatusTypeDef send_mock_hal_ok(UARTEX_HandleTypeDef *huartex, uint8_t *pData, uint16_t Size)
{
uio_testdata_t* td = huartex->testdata;
// memset(tx_dma_buffer, 0, UART_IO_BUFFER_SIZE);
// memmove(tx_dma_buffer, pData, Size);
// memset(td->txdma_buf, 0, UART_IO_BUFFER_SIZE);
// memmove(td->txdma_buf, pData, Size);
td->txdma_buf = (char*)pData;
// m_tx_m0ar = (uint32_t)pData;
// m_tx_ndtr = Size;
td->tx_m0ar = (uint32_t)pData;
td->tx_ndtr = Size;
return HAL_OK;
}
static HAL_StatusTypeDef send_mock_hal_busy(UARTEX_HandleTypeDef *huartex, uint8_t *pData, uint16_t Size)
{
return HAL_BUSY;
}
TEST(UsartIO_DMA, WriteBufferSpaceAdequateAndHalReady) // write
{
char s1[] = "test";
char s2[] = "driven";
char s3[] = "testdriven";
int written;
///////////////////////////
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
uio_testdata_t td;
// struct UARTEX_Operations uart_ops;
char txbuf0[64];
char txbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.tbuf[0] = txbuf0;
huio.tbuf[1] = txbuf1;
// memset(&uart_ops, 0, sizeof(uart_ops));
// huio.handle->ops = &uart_ops;
memset(&huio.handle->ops, 0, sizeof(huio.handle->ops));
memset(&td, 0, sizeof(td));
huio.handle->testdata = &td;
//////////////////////////////
// HAL_UART_Transmit_DMA
fill_tx_testdata(&huio, 1, s1, strlen(s1), 0, 0, 0);
// uart_ops.send = send_mock_hal_ok;
huio.handle->ops.send = send_mock_hal_ok;
huio.handle->huart.State = HAL_UART_STATE_READY;
written = UART_IO_Write(&huio, s2, strlen(s2));
TEST_ASSERT_EQUAL(strlen(s2), written);
TEST_ASSERT_EQUAL_MEMORY(s3, td.txdma_buf, strlen(s3));
TEST_ASSERT_EQUAL_HEX32(huio.tbuf[1], (char*)td.tx_m0ar);
TEST_ASSERT_EQUAL(strlen(s3), td.tx_ndtr);
TEST_ASSERT_EQUAL_HEX32(huio.tbuf[0], huio.tx_head);
TEST_ASSERT_EQUAL_HEX32(huio.tbuf[0], huio.tx_tail);
}
TEST(UsartIO_DMA, WriteBufferSpaceAdequateAndHalBusy)
{
char s1[] = "test";
char s2[] = "driven";
char s3[] = "testdriven";
int written;
///////////////////////////
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
uio_testdata_t td;
// struct UARTEX_Operations uart_ops;
char txbuf0[64];
char txbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.tbuf[0] = txbuf0;
huio.tbuf[1] = txbuf1;
// memset(&uart_ops, 0, sizeof(uart_ops));
// huio.handle->ops = &uart_ops;
memset(&huio.handle->ops, 0, sizeof(huio.handle->ops));
memset(&td, 0, sizeof(td));
huio.handle->testdata = &td;
//////////////////////////////
// uart_ops.send = send_mock_hal_busy;
huio.handle->ops.send = send_mock_hal_busy;
hue.huart.State = HAL_UART_STATE_READY;
fill_tx_testdata(&huio, 1, s1, strlen(s1), 0, 0, 0);
written = UART_IO_Write(&huio, s2, strlen(s2));
TEST_ASSERT_EQUAL(strlen(s2), written);
TEST_ASSERT_EQUAL_MEMORY(s3, huio.tbuf[1], strlen(s3));
TEST_ASSERT_EQUAL_HEX32(huio.tbuf[1], huio.tx_head);
TEST_ASSERT_EQUAL(strlen(s3), huio.tx_tail - huio.tx_head);
// usart_apis.HAL_UART_Transmit_DMA = m_transmit_hal_busy;
// fill_tx_upper(1, s1, strlen(s1));
// m_huio.handle->huart.State = HAL_UART_STATE_READY; /** otherwise trapped **/
//
// written = UART_IO_Write(&m_huio, s2, strlen(s2));
// TEST_ASSERT_EQUAL(strlen(s2), written);
//
// TEST_ASSERT_EQUAL_MEMORY(s3, m_huio.tbuf[1], strlen(s3));
// TEST_ASSERT_EQUAL_HEX32(m_huio.tbuf[1], m_huio.tx_head);
// TEST_ASSERT_EQUAL(strlen(s3), m_huio.tx_tail - m_huio.tx_head);
}
TEST(UsartIO_DMA, WriteBufferSpaceInadequateAndHalReady)
{
char s1[UART_IO_BUFFER_SIZE/2];
char s2[UART_IO_BUFFER_SIZE];
char s3[UART_IO_BUFFER_SIZE*2];
int written;
///////////////////////////
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
uio_testdata_t td;
// struct UARTEX_Operations uart_ops;
char txbuf0[64];
char txbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.tbuf[0] = txbuf0;
huio.tbuf[1] = txbuf1;
// memset(&uart_ops, 0, sizeof(uart_ops));
// huio.handle->ops = &uart_ops;
memset(&huio.handle->ops, 0, sizeof(huio.handle->ops));
memset(&td, 0, sizeof(td));
huio.handle->testdata = &td;
//////////////////////////////
memset(s1, 'a', sizeof(s1));
memset(s2, 'b', sizeof(s2));
memset(s3, 0, sizeof(s3));
memset(s3, 'a', sizeof(s1));
memset(&s3[sizeof(s1)], 'b', sizeof(s2));
// uart_ops.send = send_mock_hal_ok;
huio.handle->ops.send = send_mock_hal_ok;
hue.huart.State = HAL_UART_STATE_READY;
fill_tx_testdata(&huio, 1, s1, sizeof(s1), 0, 0, 0);
written = UART_IO_Write(&huio, s2, sizeof(s2));
TEST_ASSERT_EQUAL(sizeof(s2), written);
/** the dma buffer **/
TEST_ASSERT_EQUAL_MEMORY(s3, td.txdma_buf, UART_IO_BUFFER_SIZE);
TEST_ASSERT_EQUAL_HEX32(huio.tbuf[1], (char*)td.tx_m0ar);
TEST_ASSERT_EQUAL(UART_IO_BUFFER_SIZE, td.tx_ndtr);
/** the upper buffer **/
TEST_ASSERT_EQUAL_HEX32(huio.tbuf[0], huio.tx_head);
TEST_ASSERT_EQUAL(UART_IO_BUFFER_SIZE - UART_IO_BUFFER_SIZE/2, huio.tx_tail - huio.tx_head);
TEST_ASSERT_EQUAL_MEMORY(&s3[UART_IO_BUFFER_SIZE], huio.tx_head, UART_IO_BUFFER_SIZE/2);
// usart_apis.HAL_UART_Transmit_DMA = m_transmit_hal_ok;
// fill_tx_upper(1, s1, sizeof(s1));
// m_huio.handle->huart.State = HAL_UART_STATE_READY; /** otherwise trapped **/
//
// written = UART_IO_Write(&m_huio, s2, sizeof(s2));
// TEST_ASSERT_EQUAL(sizeof(s2), written);
//
// TEST_ASSERT_EQUAL_MEMORY(s3, tx_dma_buffer, UART_IO_BUFFER_SIZE);
// TEST_ASSERT_EQUAL_HEX32(m_huio.tbuf[1], (char*)m_tx_m0ar);
// TEST_ASSERT_EQUAL(UART_IO_BUFFER_SIZE, m_tx_ndtr);
//
// TEST_ASSERT_EQUAL_HEX32(m_huio.tbuf[0], m_huio.tx_head);
// TEST_ASSERT_EQUAL(UART_IO_BUFFER_SIZE - UART_IO_BUFFER_SIZE/2, m_huio.tx_tail-m_huio.tx_head);
// TEST_ASSERT_EQUAL_MEMORY(&s3[UART_IO_BUFFER_SIZE], m_huio.tx_head, UART_IO_BUFFER_SIZE/2);
}
TEST(UsartIO_DMA, WriteBufferSpaceInadequateAndHalBusy)
{
char s1[UART_IO_BUFFER_SIZE/2];
char s2[UART_IO_BUFFER_SIZE];
char s3[UART_IO_BUFFER_SIZE*2];
int written;
memset(s1, 'a', sizeof(s1));
memset(s2, 'b', sizeof(s2));
memset(s3, 0, sizeof(s3));
memset(s3, 'a', sizeof(s1));
memset(&s3[sizeof(s1)], 'b', sizeof(s2));
///////////////////////////
struct uart_device huio = { .rbuf_size = 64, .tbuf_size = 64, };
UARTEX_HandleTypeDef hue;
uio_testdata_t td;
char txbuf0[64];
char txbuf1[64];
memset(&huio, 0, sizeof(huio));
memset(&hue, 0, sizeof(hue));
hue.huart.State = HAL_UART_STATE_RESET;
huio.handle = &hue;
huio.tbuf[0] = txbuf0;
huio.tbuf[1] = txbuf1;
// memset(&uart_ops, 0, sizeof(uart_ops));
// huio.handle->ops = &uart_ops;
memset(&huio.handle->ops, 0, sizeof(huio.handle->ops));
memset(&td, 0, sizeof(td));
huio.handle->testdata = &td;
//////////////////////////////
// uart_ops.send = send_mock_hal_busy;
huio.handle->ops.send = send_mock_hal_busy;
hue.huart.State = HAL_UART_STATE_READY;
fill_tx_testdata(&huio, 1, s1, sizeof(s1), 0, 0, 0);
written = UART_IO_Write(&huio, s2, sizeof(s2));
// usart_apis.HAL_UART_Transmit_DMA = m_transmit_hal_busy;
// fill_tx_upper(1, s1, sizeof(s1));
// m_huio.handle->huart.State = HAL_UART_STATE_READY; /** otherwise trapped **/
//
// written = UART_IO_Write(&m_huio, s2, sizeof(s2));
TEST_ASSERT_EQUAL(UART_IO_BUFFER_SIZE - sizeof(s1), written);
TEST_ASSERT_EQUAL_HEX32(huio.tbuf[1], huio.tx_head);
TEST_ASSERT_EQUAL_HEX32(&huio.tbuf[1][UART_IO_BUFFER_SIZE], huio.tx_tail); // full
TEST_ASSERT_EQUAL_MEMORY(s3, huio.tx_head, UART_IO_BUFFER_SIZE); // content
// TEST_ASSERT_EQUAL_HEX32(m_huio.tbuf[1], m_huio.tx_head);
// TEST_ASSERT_EQUAL_HEX32(&m_huio.tbuf[1][UART_IO_BUFFER_SIZE], m_huio.tx_tail);
// TEST_ASSERT_EQUAL_MEMORY(s3, m_huio.tx_head, UART_IO_BUFFER_SIZE);
}
///////////////////////////////////////////////////////////////////////////////
// Open Test
// 1. all success
// 2. create uartex handle failed
// 3. uartex init failed (NO this case !)
// 4. malloc failed x 4
// 5. recv failed (NO this case !)
//
UARTEX_HandleTypeDef* mock_huartex_create_success(struct msp_factory * msp, int num)
{
struct uart_device * udev;
countdown--;
TEST_ASSERT_NOT_NULL(msp);
udev = (struct uart_device*)msp->testdata;
TEST_ASSERT_EQUAL(udev->dev.number, num);
return (UARTEX_HandleTypeDef*)udev->testdata; // the fake handle
}
UARTEX_HandleTypeDef* mock_huartex_create_fail(struct msp_factory * msp, int num)
{
struct uart_device * udev;
countdown--;
TEST_ASSERT_NOT_NULL(msp);
udev = (struct uart_device*)msp->testdata;
TEST_ASSERT_EQUAL(udev->dev.number, num);
return NULL;
}
HAL_StatusTypeDef mock_uartex_init_success(UARTEX_HandleTypeDef * hue)
{
countdown--;
TEST_ASSERT_EQUAL(HAL_UART_STATE_RESET, hue->huart.State);
hue->huart.State = HAL_UART_STATE_READY;
return HAL_OK;
}
