void main(void) #endif { uint32_t i; RST_CLK_DeInit(); RST_CLK_CPU_PLLconfig (RST_CLK_CPU_PLLsrcHSIdiv2,0); /* Enable peripheral clocks --------------------------------------------------*/ RST_CLK_PCLKcmd((RST_CLK_PCLK_RST_CLK | RST_CLK_PCLK_TIMER1 | RST_CLK_PCLK_DMA),ENABLE); RST_CLK_PCLKcmd((RST_CLK_PCLK_PORTA), ENABLE); /* Init NVIC */ SCB->AIRCR = 0x05FA0000 | ((uint32_t)0x500); SCB->VTOR = 0x08000000; /* Disable all interrupt */ NVIC->ICPR[0] = 0xFFFFFFFF; NVIC->ICER[0] = 0xFFFFFFFF; /* Disable all DMA request */ MDR_DMA->CHNL_REQ_MASK_CLR = 0xFFFFFFFF; MDR_DMA->CHNL_USEBURST_CLR = 0xFFFFFFFF; /* Reset PORTB settings */ PORT_DeInit(MDR_PORTB); /* Reset PORTF settings */ PORT_DeInit(MDR_PORTF); /* Configure TIMER1 pins: CH1, CH2 */ /* Configure PORTA pins 1, 3 */ PORT_InitStructure.PORT_Pin = PORT_Pin_1; PORT_InitStructure.PORT_OE = PORT_OE_OUT; PORT_InitStructure.PORT_FUNC = PORT_FUNC_ALTER; PORT_InitStructure.PORT_MODE = PORT_MODE_DIGITAL; PORT_InitStructure.PORT_SPEED = PORT_SPEED_FAST; PORT_Init(MDR_PORTA, &PORT_InitStructure); PORT_InitStructure.PORT_Pin = PORT_Pin_3; PORT_InitStructure.PORT_OE = PORT_OE_IN; PORT_Init(MDR_PORTA, &PORT_InitStructure); /* Init RAM */ Init_RAM (DstBuf, BufferSize); /* Reset all TIMER1 settings */ TIMER_DeInit(MDR_TIMER1); TIMER_BRGInit(MDR_TIMER1,TIMER_HCLKdiv1); /* TIM1 configuration ------------------------------------------------*/ /* Initializes the TIMERx Counter ------------------------------------*/ sTIM_CntInit.TIMER_Prescaler = 0x10; sTIM_CntInit.TIMER_Period = 0x200; sTIM_CntInit.TIMER_CounterMode = TIMER_CntMode_ClkFixedDir; sTIM_CntInit.TIMER_CounterDirection = TIMER_CntDir_Up; sTIM_CntInit.TIMER_EventSource = TIMER_EvSrc_None; sTIM_CntInit.TIMER_FilterSampling = TIMER_FDTS_TIMER_CLK_div_1; sTIM_CntInit.TIMER_ARR_UpdateMode = TIMER_ARR_Update_Immediately; sTIM_CntInit.TIMER_ETR_FilterConf = TIMER_Filter_1FF_at_TIMER_CLK; sTIM_CntInit.TIMER_ETR_Prescaler = TIMER_ETR_Prescaler_None; sTIM_CntInit.TIMER_ETR_Polarity = TIMER_ETRPolarity_NonInverted; sTIM_CntInit.TIMER_BRK_Polarity = TIMER_BRKPolarity_NonInverted; TIMER_CntInit (MDR_TIMER1,&sTIM_CntInit); /* Initializes the TIMER1 Channel1 -------------------------------------*/ TIMER_ChnStructInit(&sTIM_ChnInit); sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL1; sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_PWM; sTIM_ChnInit.TIMER_CH_REF_Format = TIMER_CH_REF_Format3; TIMER_ChnInit(MDR_TIMER1, &sTIM_ChnInit); TIMER_SetChnCompare(MDR_TIMER1, TIMER_CHANNEL1, 0x100); /* Initializes the TIMER1 Channel1 Output -------------------------------*/ TIMER_ChnOutStructInit(&sTIM_ChnOutInit); sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL1; sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted; sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_REF; sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Output; TIMER_ChnOutInit(MDR_TIMER1, &sTIM_ChnOutInit); /* Initializes the TIMER1 Channel2 -------------------------------------*/ TIMER_ChnStructInit(&sTIM_ChnInit); sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL2; sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_CAPTURE; TIMER_ChnInit(MDR_TIMER1, &sTIM_ChnInit); /* Initializes the TIMER1 Channel2 Output -------------------------------*/ TIMER_ChnOutStructInit(&sTIM_ChnOutInit); sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL2; sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted; sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_Only_0; sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Input; TIMER_ChnOutInit(MDR_TIMER1, &sTIM_ChnOutInit); /* Enable TIMER1 DMA request */ TIMER_DMACmd(MDR_TIMER1,(TIMER_STATUS_CCR_CAP_CH2), ENABLE); /* Reset all DMA settings */ DMA_DeInit(); DMA_StructInit(&DMA_InitStr); /* DMA_Channel_TIM1 configuration ---------------------------------*/ /* Set Primary Control Data */ DMA_PriCtrlStr.DMA_SourceBaseAddr = (uint32_t)(&(MDR_TIMER1->CCR2)); DMA_PriCtrlStr.DMA_DestBaseAddr = (uint32_t)DstBuf; DMA_PriCtrlStr.DMA_SourceIncSize = DMA_SourceIncNo; DMA_PriCtrlStr.DMA_DestIncSize = DMA_DestIncHalfword; DMA_PriCtrlStr.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_PriCtrlStr.DMA_Mode = DMA_Mode_Basic; DMA_PriCtrlStr.DMA_CycleSize = BufferSize; DMA_PriCtrlStr.DMA_NumContinuous = DMA_Transfers_1; DMA_PriCtrlStr.DMA_SourceProtCtrl = DMA_SourcePrivileged; DMA_PriCtrlStr.DMA_DestProtCtrl = DMA_DestPrivileged; /* Set Channel Structure */ DMA_InitStr.DMA_PriCtrlData = &DMA_PriCtrlStr; DMA_InitStr.DMA_Priority = DMA_Priority_High; DMA_InitStr.DMA_UseBurst = DMA_BurstClear; DMA_InitStr.DMA_SelectDataStructure = DMA_CTRL_DATA_PRIMARY; /* Init DMA channel */ DMA_Init(DMA_Channel_TIM1, &DMA_InitStr); /* Enable TIMER1 */ TIMER_Cmd(MDR_TIMER1,ENABLE); /* Transfer complete */ while((DMA_GetFlagStatus(DMA_Channel_TIM1, DMA_FLAG_CHNL_ENA))) { } /* Check the corectness of written dada */ for(i = 0; i < BufferSize; i++) { if (DstBuf[i] != MDR_TIMER1->CCR1) { TransferStatus &= FAILED; break; } else { TransferStatus = PASSED; } } /* TransferStatus = PASSED, if the data transmitted are correct */ /* TransferStatus = FAILED, if the data transmitted are not correct */ while(1) { } }
//-----------------------------------------------------------------// // Setup Timers // HCLK = 32 MHz // TIMER_CLK = HCLK / TIMER_HCLKdivx // CLK = TIMER_CLK/(TIMER_Prescaler + 1) //-----------------------------------------------------------------// void HW_TimersInit(void) { TIMER_CntInitTypeDef sTIM_CntInit; TIMER_ChnInitTypeDef sTIM_ChnInit; TIMER_ChnOutInitTypeDef sTIM_ChnOutInit; //======================= TIMER1 =======================// // Timer1 CH2 -> BUZ+ // CH2N -> BUZ- // TIMER_CLK = HCLK // CLK = 1MHz // Default buzzer freq = 1 / 500us = 2kHz // Initialize timer 1 counter TIMER_CntStructInit(&sTIM_CntInit); sTIM_CntInit.TIMER_Prescaler = 0x1F; // 32MHz / (31 + 1) = 1MHz sTIM_CntInit.TIMER_Period = 499; TIMER_CntInit (MDR_TIMER1,&sTIM_CntInit); // Initialize timer 1 channel 2 TIMER_ChnStructInit(&sTIM_ChnInit); sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_PWM; sTIM_ChnInit.TIMER_CH_REF_Format = TIMER_CH_REF_Format6; sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL2; sTIM_ChnInit.TIMER_CH_CCR_UpdateMode = TIMER_CH_CCR_Update_On_CNT_eq_0; TIMER_ChnInit(MDR_TIMER1, &sTIM_ChnInit); // Initialize timer 1 channel 2 output TIMER_ChnOutStructInit(&sTIM_ChnOutInit); sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted; sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_Only_1; sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Output; sTIM_ChnOutInit.TIMER_CH_NegOut_Polarity = TIMER_CHOPolarity_NonInverted; sTIM_ChnOutInit.TIMER_CH_NegOut_Source = TIMER_CH_OutSrc_Only_1; sTIM_ChnOutInit.TIMER_CH_NegOut_Mode = TIMER_CH_OutMode_Output; sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL2; TIMER_ChnOutInit(MDR_TIMER1, &sTIM_ChnOutInit); // Set default buzzer duty MDR_TIMER1->CCR2 = 249; // Enable TIMER1 counter clock TIMER_BRGInit(MDR_TIMER1,TIMER_HCLKdiv1); // Enable TIMER1 TIMER_Cmd(MDR_TIMER1,ENABLE); //======================= TIMER2 =======================// // Timer2 CH1N -> UPWM // CH3N -> IPWM // CH2 -> HW control interrupt generation // TIMER_CLK = HCLK // CLK = 16MHz // PWM frequency = 3906.25 Hz (T = 256us) // PWM resolution = 12 bit // Initialize timer 2 counter TIMER_CntStructInit(&sTIM_CntInit); sTIM_CntInit.TIMER_Prescaler = 0x1; // CLK = 16MHz sTIM_CntInit.TIMER_Period = 0xFFF; // 16MHz / 4096 = 3906.25 Hz TIMER_CntInit (MDR_TIMER2,&sTIM_CntInit); // Initialize timer 2 channels 1,3 TIMER_ChnStructInit(&sTIM_ChnInit); sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_PWM; sTIM_ChnInit.TIMER_CH_REF_Format = TIMER_CH_REF_Format6; sTIM_ChnInit.TIMER_CH_CCR_UpdateMode = TIMER_CH_CCR_Update_On_CNT_eq_0; sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL1; // voltage TIMER_ChnInit(MDR_TIMER2, &sTIM_ChnInit); sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL3; // curret TIMER_ChnInit(MDR_TIMER2, &sTIM_ChnInit); // Initialize timer 2 channel 2 - used for HW control interrupt generation TIMER_ChnStructInit(&sTIM_ChnInit); sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_PWM; sTIM_ChnInit.TIMER_CH_REF_Format = TIMER_CH_REF_Format1; // REF output = 1 when CNT == CCR sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL2; sTIM_ChnInit.TIMER_CH_CCR_UpdateMode = TIMER_CH_CCR_Update_Immediately; TIMER_ChnInit(MDR_TIMER2, &sTIM_ChnInit); // Initialize timer 2 channels 1,3 output TIMER_ChnOutStructInit(&sTIM_ChnOutInit); sTIM_ChnOutInit.TIMER_CH_NegOut_Polarity = TIMER_CHOPolarity_Inverted; sTIM_ChnOutInit.TIMER_CH_NegOut_Source = TIMER_CH_OutSrc_REF; sTIM_ChnOutInit.TIMER_CH_NegOut_Mode = TIMER_CH_OutMode_Output; sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL1; TIMER_ChnOutInit(MDR_TIMER2, &sTIM_ChnOutInit); sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL3; TIMER_ChnOutInit(MDR_TIMER2, &sTIM_ChnOutInit); // Set default voltage PWM duty cycle MDR_TIMER2->CCR1 = 0; // Set default current PWM duty cycle MDR_TIMER2->CCR3 = 0; // Set default CCR for interrupt generation MDR_TIMER2->CCR2 = 0; // Enable interrupts TIMER_ITConfig(MDR_TIMER2, TIMER_STATUS_CCR_REF_CH2, ENABLE); //TIMER_ITConfig(MDR_TIMER2, TIMER_STATUS_CNT_ZERO, ENABLE); // Enable TIMER2 counter clock TIMER_BRGInit(MDR_TIMER2,TIMER_HCLKdiv1); // Enable TIMER2 TIMER_Cmd(MDR_TIMER2,ENABLE); //======================= TIMER3 =======================// // Timer3 CH1 -> LPWM (LCD backlight PWM) // CH3N -> CPWM (System cooler PWM) // TIMER_CLK = HCLK // CLK = 2MHz // PWM frequency = 20kHz // PWM resolution = 100 // Initialize timer 3 counter TIMER_CntStructInit(&sTIM_CntInit); sTIM_CntInit.TIMER_Prescaler = 0xF; // 2MHz at 32MHz core clk sTIM_CntInit.TIMER_Period = 99; // 20kHz at 2MHz TIMER_CntInit (MDR_TIMER3,&sTIM_CntInit); // Initialize timer 3 channel 1 TIMER_ChnStructInit(&sTIM_ChnInit); sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL1; sTIM_ChnInit.TIMER_CH_Mode = TIMER_CH_MODE_PWM; sTIM_ChnInit.TIMER_CH_REF_Format = TIMER_CH_REF_Format6; sTIM_ChnInit.TIMER_CH_CCR_UpdateMode = TIMER_CH_CCR_Update_On_CNT_eq_0; TIMER_ChnInit(MDR_TIMER3, &sTIM_ChnInit); // Initialize timer 3 channel 1 output TIMER_ChnOutStructInit(&sTIM_ChnOutInit); sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL1; sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_REF; sTIM_ChnOutInit.TIMER_CH_DirOut_Polarity = TIMER_CHOPolarity_NonInverted; sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Output; TIMER_ChnOutInit(MDR_TIMER3, &sTIM_ChnOutInit); // Initialize timer 3 channel 3 sTIM_ChnInit.TIMER_CH_Number = TIMER_CHANNEL3; TIMER_ChnInit(MDR_TIMER3, &sTIM_ChnInit); // Initialize timer 3 channel 3 output sTIM_ChnOutInit.TIMER_CH_Number = TIMER_CHANNEL3; sTIM_ChnOutInit.TIMER_CH_DirOut_Source = TIMER_CH_OutSrc_Only_0; sTIM_ChnOutInit.TIMER_CH_DirOut_Mode = TIMER_CH_OutMode_Input; sTIM_ChnOutInit.TIMER_CH_NegOut_Source = TIMER_CH_OutSrc_REF; sTIM_ChnOutInit.TIMER_CH_NegOut_Polarity = TIMER_CHOPolarity_Inverted; sTIM_ChnOutInit.TIMER_CH_NegOut_Mode = TIMER_CH_OutMode_Output; TIMER_ChnOutInit(MDR_TIMER3, &sTIM_ChnOutInit); // Set default PWM duty cycle for LCD backlight PWM MDR_TIMER3->CCR1 = 0; // Set default PWM duty cycle for system cooler PWM MDR_TIMER3->CCR3 = 0; // Enable TIMER3 counter clock TIMER_BRGInit(MDR_TIMER3,TIMER_HCLKdiv1); // Enable TIMER3 TIMER_Cmd(MDR_TIMER3,ENABLE); }