void uartStart(void) { unsigned int intFlags = 0; unsigned int config = 0; /* Enabling the PSC for UART2.*/ /* roger, crash PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_UART2, PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE); */ /* Setup PINMUX */ UARTPinMuxSetup(2, FALSE); /* Enabling the transmitter and receiver*/ UARTEnable(SOC_UART_2_REGS); /* 1 stopbit, 8-bit character, no parity */ config = UART_WORDL_8BITS; /* Configuring the UART parameters*/ UARTConfigSetExpClk(SOC_UART_2_REGS, SOC_UART_2_MODULE_FREQ, BAUD_115200, config, UART_OVER_SAMP_RATE_16); /* Enabling the FIFO and flushing the Tx and Rx FIFOs.*/ UARTFIFOEnable(SOC_UART_2_REGS); /* Setting the UART Receiver Trigger Level*/ UARTFIFOLevelSet(SOC_UART_2_REGS, UART_RX_TRIG_LEVEL_1); /* ** Enable AINTC to handle interrupts. Also enable IRQ interrupt in ARM ** processor. */ /* Do int from config, not by starterware SetupInt(); */ /* Configure AINTC to receive and handle UART interrupts. */ /* Do int from config, not by starterware ConfigureIntUART(); */ /* Preparing the 'intFlags' variable to be passed as an argument.*/ /* intFlags |= (UART_INT_LINE_STAT | \ UART_INT_TX_EMPTY | \ UART_INT_RXDATA_CTI); */ intFlags |= (UART_INT_LINE_STAT | \ UART_INT_RXDATA_CTI); /* Enable the Interrupts in UART.*/ UARTIntEnable(SOC_UART_2_REGS, intFlags); }
/** * \brief This function initializes the specified UART instance for use. * This does the following: * 1> Sets the baud rate of communication as 115200. * 2> Configures the line characteristics to a typical value being * 8-N-1 which means 8 data bits per frame, No parity bit and * 1 stop bit/frame. * 3> Enables the FIFO for transmitter and receiver. * 4> Sets the receiver trigger level to be 1 byte. * * \return None. * * \note This function invokes UARTStdioInitExpClk() to perform the above * configurations. The function UARTStdioInitExpClk() could be * directly invoked for more customized configurations. */ void UARTConsoleInit(void) { #if (0 == UART_STDIO_INSTANCE) { PSCModuleControl(SOC_PSC_0_REGS,9, 0, PSC_MDCTL_NEXT_ENABLE); UARTPinMuxSetup(0, FALSE); } #elif (1 == UART_STDIO_INSTANCE) { PSCModuleControl(SOC_PSC_1_REGS,12, 0, PSC_MDCTL_NEXT_ENABLE); UARTPinMuxSetup(1, FALSE); } #else { PSCModuleControl(SOC_PSC_1_REGS,13, 0, PSC_MDCTL_NEXT_ENABLE); UARTPinMuxSetup(2, FALSE); } #endif UARTStdioInitExpClk(BAUD_115200, UART_RX_TRIG_LEVEL_1); }
/****************************************************************************** * * * \brief Serial initilalization routine. * * * * \param none. * * * * \return none. * * * ******************************************************************************/ void SerialInit(void) { unsigned int intFlags = 0; USBBufferInit((tUSBBuffer *)&g_sTxBuffer); USBBufferInit((tUSBBuffer *)&g_sRxBuffer); /* Configuring the system clocks for UART0 instance. */ UART0ModuleClkConfig(); /* Performing the Pin Multiplexing for UART0 instance. */ UARTPinMuxSetup(0); /* Performing a module reset. */ UARTModuleReset(SOC_UART_0_REGS); /* Performing Baud Rate settings. */ UartBaudRateSet(); /* Switching to Configuration Mode B. */ UARTRegConfigModeEnable(SOC_UART_0_REGS, UART_REG_CONFIG_MODE_B); /* Programming the Line Characteristics. */ UARTLineCharacConfig(SOC_UART_0_REGS, (UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1), UART_PARITY_NONE); /* Disabling write access to Divisor Latches. */ UARTDivisorLatchDisable(SOC_UART_0_REGS); /* Disabling Break Control. */ UARTBreakCtl(SOC_UART_0_REGS, UART_BREAK_COND_DISABLE); /* Switching to UART16x operating mode. */ UARTOperatingModeSelect(SOC_UART_0_REGS, UART16x_OPER_MODE); /* Performing FIFO configurations. */ UartFIFOConfigure(); /* Preparing the 'intFlags' variable to be passed as an argument.*/ intFlags |= (UART_INT_LINE_STAT | UART_INT_RHR_CTI); /* Enable the Interrupts in UART.*/ UARTIntEnable(SOC_UART_0_REGS, intFlags); }
/* Configure polling IO on default UART */ void bwio_uart_setup(void) { /* Set pin mux */ UARTPinMuxSetup(0); /* Reset the UART */ UARTModuleReset(BWIO_UART); /* Set the BAUD rate */ unsigned int divisorValue = 0; /* Computing the Divisor Value. */ divisorValue = UARTDivisorValCompute(UART_MODULE_INPUT_CLK, BAUD_RATE_115200, UART16x_OPER_MODE, UART_MIR_OVERSAMPLING_RATE_42); /* Programming the Divisor Latches. */ UARTDivisorLatchWrite(BWIO_UART, divisorValue); /* Switching to Configuration Mode B. */ UARTRegConfigModeEnable(BWIO_UART, UART_REG_CONFIG_MODE_B); /* Programming the Line Characteristics. */ UARTLineCharacConfig(BWIO_UART, (UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1), UART_PARITY_NONE); /* Disabling write access to Divisor Latches. */ UARTDivisorLatchDisable(BWIO_UART); /* Disabling Break Control. */ UARTBreakCtl(BWIO_UART, UART_BREAK_COND_DISABLE); /* Switching to UART16x operating mode. */ UARTOperatingModeSelect(BWIO_UART, UART16x_OPER_MODE); }
/* ** Main function. */ int main(void) { unsigned int numByteChunks = 0; unsigned char *pBuffer = NULL; unsigned int remainBytes = 0; /* Configure and enable the MMU. */ MMUConfigAndEnable(); /* Enable all levels of Cache. */ CacheEnable(CACHE_ALL); /* Configuring the system clocks for EDMA. */ EDMAModuleClkConfig(); /* Configuring the system clocks for UART0 instance. */ UART0ModuleClkConfig(); /* Performing Pin Multiplexing for UART0 instance. */ UARTPinMuxSetup(0); /* Enabling IRQ in CPSR of ARM processor. */ IntMasterIRQEnable(); /* Initializing the ARM Interrupt Controller. */ IntAINTCInit(); /* Initializing the EDMA. */ EDMA3Initialize(); /* Initializing the UART0 instance for use. */ UARTInitialize(); /* Select the console type based on compile time check */ ConsoleUtilsSetType(CONSOLE_UART); /* ** Configuring the EDMA. */ /* Request DMA Channel and TCC for UART Transmit*/ EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_TX_CHA_NUM, EDMA3_UART_TX_CHA_NUM, EVT_QUEUE_NUM); /* Registering Callback Function for TX*/ cb_Fxn[EDMA3_UART_TX_CHA_NUM] = &callback; /* Request DMA Channel and TCC for UART Receive */ EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_RX_CHA_NUM, EDMA3_UART_RX_CHA_NUM, EVT_QUEUE_NUM); /* Registering Callback Function for RX*/ cb_Fxn[EDMA3_UART_RX_CHA_NUM] = &callback; /******************** Transmission of a string **************************/ numByteChunks = (sizeof(welcome) - 1) / txBytesPerEvent; remainBytes = (sizeof(welcome) - 1) % txBytesPerEvent; /* Configuring EDMA PaRAM sets to transmit data. */ UARTTxEDMAPaRAMSetConfig(welcome, numByteChunks * txBytesPerEvent, EDMA3_UART_TX_CHA_NUM, EDMA3CC_OPT(DUMMY_CH_NUM), EDMA3_UART_TX_CHA_NUM); /* Configuring the PaRAM set for Dummy Transfer. */ TxDummyPaRAMConfEnable(); /* Enable EDMA Transfer */ EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM, EDMA3_TRIG_MODE_EVENT); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /* Remaining bytes are transferred through polling method. */ if(0 != remainBytes) { pBuffer = welcome + (sizeof(welcome) - 1) - remainBytes; UARTPuts((char*)pBuffer, remainBytes); } /******************** Transmission of a string **************************/ numByteChunks = (sizeof(intent) - 1) / txBytesPerEvent; remainBytes = (sizeof(intent) - 1) % txBytesPerEvent; /* Enabling DMA Mode 1. */ UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE); /* Configuring EDMA PaRAM sets to transmit data. */ UARTTxEDMAPaRAMSetConfig(intent, numByteChunks * txBytesPerEvent, EDMA3_UART_TX_CHA_NUM, EDMA3CC_OPT(DUMMY_CH_NUM), EDMA3_UART_TX_CHA_NUM); /* Configuring the PaRAM set for Dummy Transfer. */ TxDummyPaRAMConfEnable(); /* Enable EDMA Transfer */ EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM, EDMA3_TRIG_MODE_EVENT); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /* Remaining bytes are transferred through polling method. */ if(0 != remainBytes) { pBuffer = intent + (sizeof(intent) - 1) - remainBytes; UARTPuts((char*)pBuffer, remainBytes); } /******************** Transmission of a string **************************/ numByteChunks = (sizeof(enter) - 1) / txBytesPerEvent; remainBytes = (sizeof(enter) - 1) % txBytesPerEvent; /* Enabling DMA Mode 1. */ UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE); /* Configuring EDMA PaRAM sets to transmit data. */ UARTTxEDMAPaRAMSetConfig(enter, numByteChunks * txBytesPerEvent, EDMA3_UART_TX_CHA_NUM, EDMA3CC_OPT(DUMMY_CH_NUM), EDMA3_UART_TX_CHA_NUM); /* Configuring the PaRAM set for Dummy Transfer. */ TxDummyPaRAMConfEnable(); /* Enable EDMA Transfer */ EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM, EDMA3_TRIG_MODE_EVENT); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /* Remaining bytes are transferred through polling method. */ if(0 != remainBytes) { pBuffer = enter + (sizeof(enter) - 1) - remainBytes; UARTPuts((char*)pBuffer, remainBytes); } /********************* Receiving Data from User *************************/ /* Enabling DMA Mode 1. */ UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE); /* Configuring the PaRAM set for reception. */ UARTRxEDMAPaRAMSetConfig(rxBuffer, NUM_RX_BYTES, EDMA3_UART_RX_CHA_NUM, 0xFFFF, EDMA3_UART_RX_CHA_NUM); /* Enable EDMA Transfer */ EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_RX_CHA_NUM, EDMA3_TRIG_MODE_EVENT); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /******************* Echoing received bytes *****************************/ numByteChunks = (NUM_RX_BYTES) / txBytesPerEvent; remainBytes = (NUM_RX_BYTES) % txBytesPerEvent; /* Enabling DMA Mode 1. */ UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE); /* Configuring EDMA PaRAM sets to transmit data. */ UARTTxEDMAPaRAMSetConfig(rxBuffer, numByteChunks * txBytesPerEvent, EDMA3_UART_TX_CHA_NUM, EDMA3CC_OPT(DUMMY_CH_NUM), EDMA3_UART_TX_CHA_NUM); /* Configuring the PaRAM set for Dummy Transfer. */ TxDummyPaRAMConfEnable(); /* Enable EDMA Transfer */ EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_UART_TX_CHA_NUM, EDMA3_TRIG_MODE_EVENT); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /* Remaining bytes are transferred through polling method. */ if(0 != remainBytes) { pBuffer = rxBuffer + NUM_RX_BYTES - remainBytes; UARTPuts((char*)pBuffer, remainBytes); } /******************* Freeing of allocated channels **********************/ /* Free EDMA3 Channels for TX and RX */ EDMA3FreeChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_TX_CHA_NUM, EDMA3_TRIG_MODE_EVENT, EDMA3_UART_TX_CHA_NUM, EVT_QUEUE_NUM); EDMA3FreeChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_RX_CHA_NUM, EDMA3_TRIG_MODE_EVENT, EDMA3_UART_RX_CHA_NUM, EVT_QUEUE_NUM); /* Support for Automation Testing. */ PRINT_STATUS(S_PASS); while(1); }
int main(void) { /* Configuring the system clocks for EDMA. */ EDMAModuleClkConfig(); /* Configuring the system clocks for UART0 instance. */ UART0ModuleClkConfig(); /* Performing Pin Multiplexing for UART0 instance. */ UARTPinMuxSetup(0); /* Enabling IRQ in CPSR of ARM processor. */ IntMasterIRQEnable(); /* Initializing the ARM Interrupt Controller. */ IntAINTCInit(); /* Initializing the EDMA. */ EDMA3Initialize(); /* Initializing the UART0 instance for use. */ UARTInitialize(); /* ** Configuring the EDMA. */ /* Request DMA Channel and TCC for UART Transmit*/ EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_TX_CHA_NUM, EDMA3_UART_TX_CHA_NUM, EVT_QUEUE_NUM); /* Registering Callback Function for TX*/ cb_Fxn[EDMA3_UART_TX_CHA_NUM] = &callback; /* Request DMA Channel and TCC for UART Receive */ EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_RX_CHA_NUM, EDMA3_UART_RX_CHA_NUM, EVT_QUEUE_NUM); /* Registering Callback Function for RX*/ cb_Fxn[EDMA3_UART_RX_CHA_NUM] = &callback; /******************** Transmission of a string **************************/ /* Configuring EDMA PaRAM sets to transmit 'welcome' message. */ UartEDMATxConfTransfer(EDMA3_UART_TX_CHA_NUM, EDMA3_UART_TX_CHA_NUM, welcome, sizeof(welcome) - 1); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /******************** Transmission of a string **************************/ /* Enabling DMA Mode 1. */ UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE); /* Configuring EDMA PaRAM sets to transmit 'enter' message. */ UartEDMATxConfTransfer(EDMA3_UART_TX_CHA_NUM, EDMA3_UART_TX_CHA_NUM, enter, sizeof(enter) - 1); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /********************* Receiving Data from User *************************/ /* Enabling DMA Mode 1. */ UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE); /* Configuring the PaRAM set for reception. */ UartEDMARxConfTransfer(EDMA3_UART_RX_CHA_NUM, EDMA3_UART_RX_CHA_NUM, rxBuffer, sizeof(rxBuffer)); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /******************* Echoing received bytes *****************************/ /* Enabling DMA Mode 1. */ UARTDMAEnable(UART_INSTANCE_BASE_ADD, UART_DMA_MODE_1_ENABLE); /* Configuring the PaRAM set to transmit the bytes that were received. */ UartEDMATxConfTransfer(EDMA3_UART_TX_CHA_NUM, EDMA3_UART_TX_CHA_NUM, rxBuffer, sizeof(rxBuffer)); /* Wait for return from callback */ while(0 == clBackFlag); clBackFlag = 0; /******************* Freeing of allocated channels **********************/ /* Free EDMA3 Channels for TX and RX */ EDMA3FreeChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_TX_CHA_NUM, EDMA3_TRIG_MODE_EVENT, EDMA3_UART_TX_CHA_NUM, EVT_QUEUE_NUM); EDMA3FreeChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA, EDMA3_UART_RX_CHA_NUM, EDMA3_TRIG_MODE_EVENT, EDMA3_UART_RX_CHA_NUM, EVT_QUEUE_NUM); while(1); }
//***************************************************************************** // // This is the main application entry function. // //***************************************************************************** int main(void) { unsigned int ulTxCount; unsigned int ulRxCount; tRectangle sRect; char pcBuffer[16]; unsigned int ulFullness; unsigned int intFlags = 0; unsigned char Intstatus; unsigned int i; unsigned char *src, *dest; MMUConfigAndEnable(); // // Not configured initially. // g_bUSBConfigured = false; // //configures arm interrupt controller to generate raster interrupt // USBInterruptEnable(); // //LCD Back light setup // LCDBackLightEnable(); // //UPD Pin setup // UPDNPinControl(); // //Delay timer setup // DelayTimerSetup(); // //Configures raster to display image // SetUpLCD(); RasterDMAFBConfig(SOC_LCDC_0_REGS, (unsigned int)(g_pucBuffer+PALETTE_OFFSET), (unsigned int)(g_pucBuffer+PALETTE_OFFSET) + sizeof(g_pucBuffer) - 2 - PALETTE_OFFSET, FRAME_BUFFER_0); RasterDMAFBConfig(SOC_LCDC_0_REGS, (unsigned int)(g_pucBuffer+PALETTE_OFFSET), (unsigned int)(g_pucBuffer+PALETTE_OFFSET) + sizeof(g_pucBuffer) - 2 - PALETTE_OFFSET, FRAME_BUFFER_1); src = (unsigned char *) palette_32b; dest = (unsigned char *) (g_pucBuffer+PALETTE_OFFSET); // Copy palette info into buffer for( i = PALETTE_OFFSET; i < (PALETTE_SIZE+PALETTE_OFFSET); i++) { *dest++ = *src++; } GrOffScreen24BPPInit(&g_s35_480x272x24Display, g_pucBuffer, LCD_WIDTH, LCD_HEIGHT); // Initialize a drawing context. GrContextInit(&g_sContext, &g_s35_480x272x24Display); /* enable End of frame interrupt */ RasterEndOfFrameIntEnable(SOC_LCDC_0_REGS); /* enable raster */ RasterEnable(SOC_LCDC_0_REGS); // // Fill the top 24 rows of the screen with blue to create the banner. // sRect.sXMin = 0; sRect.sYMin = 0; sRect.sXMax = GrContextDpyWidthGet(&g_sContext) - 1; sRect.sYMax = 23; GrContextForegroundSet(&g_sContext, ClrDarkBlue); GrRectFill(&g_sContext, &sRect); // // Put a white box around the banner. // GrContextForegroundSet(&g_sContext, ClrWhite); GrRectDraw(&g_sContext, &sRect); // // Put the application name in the middle of the banner. // GrContextFontSet(&g_sContext, &g_sFontCm20); GrStringDrawCentered(&g_sContext, "usb-dev-serial", -1, GrContextDpyWidthGet(&g_sContext) / 2, 10, 0); // // Show the various static text elements on the color STN display. // GrContextFontSet(&g_sContext, TEXT_FONT); GrStringDraw(&g_sContext, "Tx bytes:", -1, 8, 80, false); GrStringDraw(&g_sContext, "Tx buffer:", -1, 8, 105, false); GrStringDraw(&g_sContext, "Rx bytes:", -1, 8, 160, false); GrStringDraw(&g_sContext, "Rx buffer:", -1, 8, 185, false); DrawBufferMeter(&g_sContext, 150, 105); DrawBufferMeter(&g_sContext, 150, 185); // // Tell the user what we are up to. // DisplayStatus(&g_sContext, " Configuring USB... "); // //Initialize the Rx and TX Buffers // USBBufferInit((tUSBBuffer *)&g_sTxBuffer); USBBufferInit((tUSBBuffer *)&g_sRxBuffer); // // Pass our device information to the USB library and place the device // on the bus. // USBDCDCInit(0, (tUSBDCDCDevice *)&g_sCDCDevice); // // Wait for initial configuration to complete. // DisplayStatus(&g_sContext, " Waiting for host... "); // // Clear our local byte counters. // ulRxCount = 0; ulTxCount = 0; /* Configuring the system clocks for UART0 instance. */ UART0ModuleClkConfig(); /* Performing the Pin Multiplexing for UART0 instance. */ UARTPinMuxSetup(0); /* Performing a module reset. */ UARTModuleReset(SOC_UART_0_REGS); /* Performing Baud Rate settings. */ UartBaudRateSet(); /* Switching to Configuration Mode B. */ UARTRegConfigModeEnable(SOC_UART_0_REGS, UART_REG_CONFIG_MODE_B); /* Programming the Line Characteristics. */ UARTLineCharacConfig(SOC_UART_0_REGS, (UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1), UART_PARITY_NONE); /* Disabling write access to Divisor Latches. */ UARTDivisorLatchDisable(SOC_UART_0_REGS); /* Disabling Break Control. */ UARTBreakCtl(SOC_UART_0_REGS, UART_BREAK_COND_DISABLE); /* Switching to UART16x operating mode. */ UARTOperatingModeSelect(SOC_UART_0_REGS, UART16x_OPER_MODE); /* Performing FIFO configurations. */ UartFIFOConfigure(); /* Preparing the 'intFlags' variable to be passed as an argument.*/ intFlags |= (UART_INT_LINE_STAT | UART_INT_RHR_CTI); /* Enable the Interrupts in UART.*/ UARTIntEnable(SOC_UART_0_REGS, intFlags); // // Main application loop. // while(1) { // // Have we been asked to update the status display? // if(g_ulFlags & COMMAND_STATUS_UPDATE) { // // Clear the command flag // Intstatus = IntDisable(); g_ulFlags &= ~COMMAND_STATUS_UPDATE; IntEnable(Intstatus); DisplayStatus(&g_sContext, g_pcStatus); } // // Has there been any transmit traffic since we last checked? // if(ulTxCount != g_ulUARTTxCount) { // // Take a snapshot of the latest transmit count. // ulTxCount = g_ulUARTTxCount; // // Update the display of bytes transmitted by the UART. // usnprintf(pcBuffer, 16, "%d ", ulTxCount); GrStringDraw(&g_sContext, pcBuffer, -1, 150, 80, true); // // Update the RX buffer fullness. Remember that the buffers are // named relative to the USB whereas the status display is from // the UART's perspective. The USB's receive buffer is the UART's // transmit buffer. // ulFullness = ((USBBufferDataAvailable(&g_sRxBuffer) * 100) / UART_BUFFER_SIZE); UpdateBufferMeter(&g_sContext, ulFullness, 150, 105); } // // Has there been any receive traffic since we last checked? // if(ulRxCount != g_ulUARTRxCount) { // // Take a snapshot of the latest receive count. // ulRxCount = g_ulUARTRxCount; // // Update the display of bytes received by the UART. // usnprintf(pcBuffer, 16, "%d ", ulRxCount); GrStringDraw(&g_sContext, pcBuffer, -1, 150, 160, true); // // Update the TX buffer fullness. Remember that the buffers are // named relative to the USB whereas the status display is from // the UART's perspective. The USB's transmit buffer is the UART's // receive buffer. // ulFullness = ((USBBufferDataAvailable(&g_sTxBuffer) * 100) / UART_BUFFER_SIZE); UpdateBufferMeter(&g_sContext, ulFullness, 150, 185); } } }
/****************************************************************************** ** FUNCTION DEFINITIONS ******************************************************************************/ int main() { unsigned int numByteChunks = 0; unsigned int remainBytes = 0; unsigned int bIndex = 0; /* Configuring the system clocks for UART0 instance. */ UART0ModuleClkConfig(); /* Performing the Pin Multiplexing for UART0 instance. */ UARTPinMuxSetup(0); /* Performing a module reset. */ UARTModuleReset(SOC_UART_0_REGS); /* Performing FIFO configurations. */ UartFIFOConfigure(); /* Performing Baud Rate settings. */ UartBaudRateSet(); /* Switching to Configuration Mode B. */ UARTRegConfigModeEnable(SOC_UART_0_REGS, UART_REG_CONFIG_MODE_B); /* Programming the Line Characteristics. */ UARTLineCharacConfig(SOC_UART_0_REGS, (UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1), UART_PARITY_NONE); /* Disabling write access to Divisor Latches. */ UARTDivisorLatchDisable(SOC_UART_0_REGS); /* Disabling Break Control. */ UARTBreakCtl(SOC_UART_0_REGS, UART_BREAK_COND_DISABLE); /* Switching to UART16x operating mode. */ UARTOperatingModeSelect(SOC_UART_0_REGS, UART16x_OPER_MODE); /* Select the console type based on compile time check */ ConsoleUtilsSetType(CONSOLE_UART); /* Performing Interrupt configurations. */ UartInterruptEnable(); numByteChunks = (sizeof(txArray) - 1) / NUM_TX_BYTES_PER_TRANS; remainBytes = (sizeof(txArray) - 1) % NUM_TX_BYTES_PER_TRANS; while(1) { /* This branch is entered if the transmission is not yet complete. */ if(TRUE == txEmptyFlag) { if(bIndex < numByteChunks) { /* Transmitting bytes in chunks of NUM_TX_BYTES_PER_TRANS. */ currNumTxBytes += UARTFIFOWrite(SOC_UART_0_REGS,&txArray[currNumTxBytes],NUM_TX_BYTES_PER_TRANS); bIndex++; } else { /* Transmitting remaining data from the data block. */ currNumTxBytes += UARTFIFOWrite(SOC_UART_0_REGS,&txArray[currNumTxBytes],remainBytes); } txEmptyFlag = FALSE; /* ** Re-enables the Transmit Interrupt. This interrupt ** was disabled in the Transmit section of the UART ISR. */ UARTIntEnable(SOC_UART_0_REGS, UART_INT_THR); } } }
/* ** The main function */ int main() { unsigned int divisorValue = 0; /* Configuring the system clocks for UART0 instance. */ UART0ModuleClkConfig(); /* Initializing the ARM Interrupt Controller. */ IntAINTCInit(); /* Performing the Pin Multiplexing for UART0 instance. */ UARTPinMuxSetup(0); /* Performing a module reset. */ UARTModuleReset(UART_INST_BASE); UARTFIFOConfig(UART_INST_BASE, UART_FIFO_CONFIG(UART_TRIG_LVL_GRANULARITY_1, UART_TRIG_LVL_GRANULARITY_1, 1, 1, 1, 1, UART_DMA_EN_PATH_SCR, UART_DMA_MODE_0_ENABLE)); /* Computing the Divisor Value. */ divisorValue = UARTDivisorValCompute(UART_MODULE_INPUT_CLK, BAUD_RATE_115200, UART16x_OPER_MODE, UART_MIR_OVERSAMPLING_RATE_42); /* Programming the Divisor Latches. */ UARTDivisorLatchWrite(UART_INST_BASE, divisorValue); /* Switching to Configuration Mode B. */ UARTRegConfigModeEnable(UART_INST_BASE, UART_REG_CONFIG_MODE_B); /* Programming the Line Characteristics. */ UARTLineCharacConfig(UART_INST_BASE, (UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1), UART_PARITY_NONE); /* Disabe write access to Divisor Latches. */ UARTDivisorLatchDisable(UART_INST_BASE); /* Disable Break Control. */ UARTBreakCtl(UART_INST_BASE, UART_BREAK_COND_DISABLE); /* Switch to UART16x operating mode. */ UARTOperatingModeSelect(UART_INST_BASE, UART16x_OPER_MODE); UARTIntEnable(UART_INST_BASE, (UART_INT_LINE_STAT | UART_INT_THR | UART_INT_RHR_CTI)); /* Register the Interrupt Service Routines */ IntRegister(RTC_INT_NUM, RTCIsr); IntRegister(UART_INT_NUM, UARTIsr); IntRegister(TIMER_INT_NUM, DMTimerIsr); /* ** Setting the priority for the system interrupt in AINTC. ** Timer interrupt is given highest priority - 1 ** RTC interrupt is given medium priority - 2 ** UART interrupt is given lowest priority - 4 */ IntPrioritySet(TIMER_INT_NUM, IRQ_PRIORITY_TIMER, AINTC_HOSTINT_ROUTE_IRQ); IntPrioritySet(RTC_INT_NUM, IRQ_PRIORITY_RTC, AINTC_HOSTINT_ROUTE_IRQ); IntPrioritySet(UART_INT_NUM, IRQ_PRIORITY_UART, AINTC_HOSTINT_ROUTE_IRQ); /* Enabling the system interrupt in AINTC for UART */ IntSystemEnable(UART_INT_NUM); IntMasterIRQEnable(); while(1); }