/* ===================================================================*/ LDD_TDeviceData* ASerialLdd2_Init(LDD_TUserData *UserDataPtr) { /* Allocate device structure */ ASerialLdd2_TDeviceDataPtr DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Clear the receive counters and pointer */ DeviceDataPrv->InpRecvDataNum = 0x00U; /* Clear the counter of received characters */ DeviceDataPrv->InpDataNumReq = 0x00U; /* Clear the counter of characters to receive by ReceiveBlock() */ DeviceDataPrv->InpDataPtr = NULL; /* Clear the buffer pointer for received characters */ /* Clear the transmit counters and pointer */ DeviceDataPrv->OutSentDataNum = 0x00U; /* Clear the counter of sent characters */ DeviceDataPrv->OutDataNumReq = 0x00U; /* Clear the counter of characters to be send by SendBlock() */ DeviceDataPrv->OutDataPtr = NULL; /* Clear the buffer pointer for data to be transmitted */ DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */ /* SIM_SCGC4: UART0=1 */ SIM_SCGC4 |= SIM_SCGC4_UART0_MASK; /* PORTB_PCR16: ISF=0,MUX=3 */ PORTB_PCR16 = (uint32_t)((PORTB_PCR16 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x04) )) | (uint32_t)( PORT_PCR_MUX(0x03) )); /* PORTB_PCR17: ISF=0,MUX=3 */ PORTB_PCR17 = (uint32_t)((PORTB_PCR17 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x04) )) | (uint32_t)( PORT_PCR_MUX(0x03) )); UART_PDD_EnableTransmitter(UART0_BASE_PTR, PDD_DISABLE); /* Disable transmitter. */ UART_PDD_EnableReceiver(UART0_BASE_PTR, PDD_DISABLE); /* Disable receiver. */ DeviceDataPrv->SerFlag = 0x00U; /* Reset flags */ DeviceDataPrv->ErrFlag = 0x00U; /* Reset error flags */ /* UART0_C1: LOOPS=0,UARTSWAI=0,RSRC=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */ UART0_C1 = 0x00U; /* Set the C1 register */ /* UART0_C3: R8=0,T8=0,TXDIR=0,TXINV=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 */ UART0_C3 = 0x00U; /* Set the C3 register */ /* UART0_C4: MAEN1=0,MAEN2=0,M10=0,BRFA=0 */ UART0_C4 = UART_C4_BRFA(0x00); /* Set the C4 register */ /* UART0_S2: LBKDIF=0,RXEDGIF=0,MSBF=0,RXINV=0,RWUID=0,BRK13=0,LBKDE=0,RAF=0 */ UART0_S2 = 0x00U; /* Set the S2 register */ /* UART0_MODEM: ??=0,??=0,??=0,??=0,RXRTSE=0,TXRTSPOL=0,TXRTSE=0,TXCTSE=0 */ UART0_MODEM = 0x00U; /* Set the MODEM register */ UART_PDD_SetBaudRateFineAdjust(UART0_BASE_PTR, 18u); /* Set baud rate fine adjust */ UART_PDD_SetBaudRate(UART0_BASE_PTR, 13U); /* Set the baud rate register. */ UART_PDD_EnableFifo(UART0_BASE_PTR, (UART_PDD_TX_FIFO_ENABLE | UART_PDD_RX_FIFO_ENABLE)); /* Enable RX and TX FIFO */ UART_PDD_FlushFifo(UART0_BASE_PTR, (UART_PDD_TX_FIFO_FLUSH | UART_PDD_RX_FIFO_FLUSH)); /* Flush RX and TX FIFO */ UART_PDD_EnableTransmitter(UART0_BASE_PTR, PDD_ENABLE); /* Enable transmitter */ UART_PDD_EnableReceiver(UART0_BASE_PTR, PDD_ENABLE); /* Enable receiver */ /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_ASerialLdd2_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }
/* ** =================================================================== ** Method : UART_SDA_SetClockConfiguration (component Serial_LDD) ** ** Description : ** This method changes the clock configuration. During a clock ** configuration change the component changes it`s setting ** immediately upon a request. ** This method is internal. It is used by Processor Expert only. ** =================================================================== */ void UART_SDA_SetClockConfiguration(LDD_TDeviceData *DeviceDataPtr, LDD_TClockConfiguration ClockConfiguration) { UART_SDA_TDeviceDataPtr DeviceDataPrv = (UART_SDA_TDeviceDataPtr)DeviceDataPtr; switch (ClockConfiguration) { case CPU_CLOCK_CONFIG_0: UART_PDD_SetBaudRateFineAdjust(UART0_BASE_PTR, 12u); /* Set baud rate fine adjust */ UART_PDD_SetBaudRate(UART0_BASE_PTR, 11U); /* Set the baud rate register. */ DeviceDataPrv->EnMode = TRUE; /* Set the flag "device enabled" in the actual speed CPU mode */ break; default: DeviceDataPrv->EnMode = FALSE; /* Set the flag "device disabled" in the actual speed CPU mode */ break; } HWEnDi(DeviceDataPtr); /* Enable/disable device according to status flags */ }
/* ===================================================================*/ LDD_TDeviceData* UART_A_Init(LDD_TUserData *UserDataPtr) { /* Allocate device structure */ UART_A_TDeviceDataPtr DeviceDataPrv; /* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Clear the receive counters and pointer */ DeviceDataPrv->InpRecvDataNum = 0x00U; /* Clear the counter of received characters */ DeviceDataPrv->InpDataNumReq = 0x00U; /* Clear the counter of characters to receive by ReceiveBlock() */ DeviceDataPrv->InpDataPtr = NULL; /* Clear the buffer pointer for received characters */ /* Clear the transmit counters and pointer */ DeviceDataPrv->OutSentDataNum = 0x00U; /* Clear the counter of sent characters */ DeviceDataPrv->OutDataNumReq = 0x00U; /* Clear the counter of characters to be send by SendBlock() */ DeviceDataPrv->OutDataPtr = NULL; /* Clear the buffer pointer for data to be transmitted */ DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */ /* Allocate interrupt vectors */ /* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */ /* Note: Exception handler for interrupt is not saved, because it is not modified */ DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART3_RX_TX); DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_UART3_RX_TX, UART_A_Interrupt, DeviceDataPrv); /* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */ /* Note: Exception handler for interrupt is not saved, because it is not modified */ DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART3_ERR); DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_UART3_ERR, UART_A_Interrupt, DeviceDataPrv); /* SIM_SCGC4: UART3=1 */ SIM_SCGC4 |= SIM_SCGC4_UART3_MASK; /* SIM_SCGC5: PORTC=1 */ SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; /* PORTC_PCR16: ISF=0,MUX=3 */ PORTC_PCR16 = (uint32_t)((PORTC_PCR16 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x04) )) | (uint32_t)( PORT_PCR_MUX(0x03) )); /* PORTC_PCR17: ISF=0,MUX=3 */ PORTC_PCR17 = (uint32_t)((PORTC_PCR17 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x04) )) | (uint32_t)( PORT_PCR_MUX(0x03) )); /* NVICIP37: PRI37=0x70 */ NVICIP37 = NVIC_IP_PRI37(0x70); /* NVICISER1: SETENA|=0x20 */ NVICISER1 |= NVIC_ISER_SETENA(0x20); /* NVICIP38: PRI38=0x70 */ NVICIP38 = NVIC_IP_PRI38(0x70); /* NVICISER1: SETENA|=0x40 */ NVICISER1 |= NVIC_ISER_SETENA(0x40); UART_PDD_EnableTransmitter(UART3_BASE_PTR, PDD_DISABLE); /* Disable transmitter. */ UART_PDD_EnableReceiver(UART3_BASE_PTR, PDD_DISABLE); /* Disable receiver. */ DeviceDataPrv->SerFlag = 0x00U; /* Reset flags */ /* UART3_C1: LOOPS=0,UARTSWAI=0,RSRC=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */ UART3_C1 = 0x00U; /* Set the C1 register */ /* UART3_C3: R8=0,T8=0,TXDIR=0,TXINV=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 */ UART3_C3 = 0x00U; /* Set the C3 register */ /* UART3_C4: MAEN1=0,MAEN2=0,M10=0,BRFA=0 */ UART3_C4 = UART_C4_BRFA(0x00); /* Set the C4 register */ /* UART3_S2: LBKDIF=0,RXEDGIF=0,MSBF=0,RXINV=0,RWUID=0,BRK13=0,LBKDE=0,RAF=0 */ UART3_S2 = 0x00U; /* Set the S2 register */ /* UART3_MODEM: ??=0,??=0,??=0,??=0,RXRTSE=0,TXRTSPOL=0,TXRTSE=0,TXCTSE=0 */ UART3_MODEM = 0x00U; /* Set the MODEM register */ UART_PDD_SetBaudRateFineAdjust(UART3_BASE_PTR, 18u); /* Set baud rate fine adjust */ UART_PDD_SetBaudRate(UART3_BASE_PTR, 32U); /* Set the baud rate register. */ UART_PDD_EnableFifo(UART3_BASE_PTR, (UART_PDD_TX_FIFO_ENABLE | UART_PDD_RX_FIFO_ENABLE)); /* Enable RX and TX FIFO */ UART_PDD_FlushFifo(UART3_BASE_PTR, (UART_PDD_TX_FIFO_FLUSH | UART_PDD_RX_FIFO_FLUSH)); /* Flush RX and TX FIFO */ UART_PDD_EnableTransmitter(UART3_BASE_PTR, PDD_ENABLE); /* Enable transmitter */ UART_PDD_EnableReceiver(UART3_BASE_PTR, PDD_ENABLE); /* Enable receiver */ UART_PDD_EnableInterrupt(UART3_BASE_PTR, ( UART_PDD_INTERRUPT_RECEIVER )); /* Enable interrupts */ /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_UART_A_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }