示例#1
0
static void __cpuinit
iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr,
	unsigned int mode)
{
#ifdef CONFIG_64BIT_PHYS_ADDR
	unsigned int hwmode = mode & (_PAGE_VALID | _PAGE_DIRTY);
#endif

	uasm_i_ori(p, pte, pte, mode);
#ifdef CONFIG_SMP
# ifdef CONFIG_64BIT_PHYS_ADDR
	if (cpu_has_64bits)
		uasm_i_scd(p, pte, 0, ptr);
	else
# endif
		UASM_i_SC(p, pte, 0, ptr);

	if (r10000_llsc_war())
		uasm_il_beqzl(p, r, pte, label_smp_pgtable_change);
	else
		uasm_il_beqz(p, r, pte, label_smp_pgtable_change);

# ifdef CONFIG_64BIT_PHYS_ADDR
	if (!cpu_has_64bits) {
		/* no uasm_i_nop needed */
		uasm_i_ll(p, pte, sizeof(pte_t) / 2, ptr);
		uasm_i_ori(p, pte, pte, hwmode);
		uasm_i_sc(p, pte, sizeof(pte_t) / 2, ptr);
		uasm_il_beqz(p, r, pte, label_smp_pgtable_change);
		/* no uasm_i_nop needed */
		uasm_i_lw(p, pte, 0, ptr);
	} else
		uasm_i_nop(p);
# else
	uasm_i_nop(p);
# endif
#else
# ifdef CONFIG_64BIT_PHYS_ADDR
	if (cpu_has_64bits)
		uasm_i_sd(p, pte, 0, ptr);
	else
# endif
		UASM_i_SW(p, pte, 0, ptr);

# ifdef CONFIG_64BIT_PHYS_ADDR
	if (!cpu_has_64bits) {
		uasm_i_lw(p, pte, sizeof(pte_t) / 2, ptr);
		uasm_i_ori(p, pte, pte, hwmode);
		uasm_i_sw(p, pte, sizeof(pte_t) / 2, ptr);
		uasm_i_lw(p, pte, 0, ptr);
	}
# endif
#endif
}
示例#2
0
static void build_bounce_code(unsigned long *spp, unsigned long *gpp)
{
	int i;
	unsigned long base[32] = {0,};
	unsigned int pflag = (unsigned int)KSEG1ADDR(&smp_flag);
	unsigned int entry = (unsigned int)__jzsoc_secondary_start;
	unsigned int *p;

	for(i=0;i<32;i++) {
		base[i] = __get_free_pages(GFP_KERNEL, 0);
		if(!base[i] || (base[i] & 0xffff))
			continue;
		smp_bounce.base = base[i];
		break;
	}

	for(i=i-1;i>=0;i--) {
		free_pages(base[i], 0);
	}

	BUG_ON(!smp_bounce.base || (smp_bounce.base & 0xffff));

	p = (unsigned int*)smp_bounce.base;
	UASM_i_LA(&p, 26, pflag);
	UASM_i_LW(&p, 2, 0, 26);
	UASM_i_ADDIU(&p, 2, 2, 1);
	UASM_i_SW(&p, 2, 0, 26);

	/* t7: cpu_start. t8: cpu_ready. t9: cpu_running. */
	UASM_i_LA(&p, 15, (unsigned long)cpu_start.bits);
	UASM_i_LA(&p, 24, (unsigned long)cpu_ready_e.bits);
	UASM_i_LA(&p, 25, (unsigned long)cpu_running.bits);

	UASM_i_LA(&p, 29, (unsigned long)spp);
	UASM_i_LA(&p, 28, (unsigned long)gpp);
	UASM_i_LA(&p, 31, entry);
	uasm_i_jr(&p, 31);
	uasm_i_nop(&p);
}