OPTL_NOINLINE void init() { clk::enable(); rxpin::clock::enable(); txpin::clock::enable(); rxpin::init_alternate(afnum::af); txpin::init_alternate(afnum::af); rxpin::driver_pushpull(); txpin::driver_pushpull(); USART_BRR(base) = ((2 * cpuclock) + baudrate) / (2 * baudrate); USART_CR1(base) &= ~USART_CR1_M; /* 8 data bits */ USART_CR1(base) = (USART_CR1(base) & ~USART_PARITY_MASK) | USART_PARITY_NONE; USART_CR2(base) = (USART_CR2(base) & ~USART_CR2_STOPBITS_MASK) | USART_STOPBITS_1; USART_CR3(base) = (USART_CR3(base) & ~USART_FLOWCONTROL_MASK) | USART_FLOWCONTROL_NONE; USART_CR1(base) = (USART_CR1(base) & ~USART_MODE_MASK) | USART_MODE_TX_RX; }
void usart_set_stopbits(u32 usart, u32 stopbits) { u32 reg32; reg32 = USART_CR2(usart); reg32 = (reg32 & ~USART_CR2_STOPBITS_MASK) | stopbits; USART_CR2(usart) = reg32; }
void usart_set_stopbits(uint32_t usart, uint32_t stopbits) { uint32_t reg32; reg32 = USART_CR2(usart); reg32 = (reg32 & ~USART_CR2_STOPBITS_MASK) | stopbits; USART_CR2(usart) = reg32; }
void uart_periph_set_baudrate(struct uart_periph *p, uint32_t baud) { p->baudrate = baud; /* Configure USART baudrate */ usart_set_baudrate((uint32_t)p->reg_addr, baud); /* Disable Idle Line interrupt */ USART_CR1((uint32_t)p->reg_addr) &= ~USART_CR1_IDLEIE; /* Disable LIN break detection interrupt */ USART_CR2((uint32_t)p->reg_addr) &= ~USART_CR2_LBDIE; /* Enable USART1 Receive interrupts */ USART_CR1((uint32_t)p->reg_addr) |= USART_CR1_RXNEIE; /* Enable the USART */ usart_enable((uint32_t)p->reg_addr); }
void uart_periph_set_baudrate(struct uart_periph* p, uint32_t baud) { /* Configure USART */ usart_set_baudrate((u32)p->reg_addr, baud); usart_set_databits((u32)p->reg_addr, 8); usart_set_stopbits((u32)p->reg_addr, USART_STOPBITS_1); usart_set_parity((u32)p->reg_addr, USART_PARITY_NONE); /* Disable Idle Line interrupt */ USART_CR1((u32)p->reg_addr) &= ~USART_CR1_IDLEIE; /* Disable LIN break detection interrupt */ USART_CR2((u32)p->reg_addr) &= ~USART_CR2_LBDIE; /* Enable USART1 Receive interrupts */ USART_CR1((u32)p->reg_addr) |= USART_CR1_RXNEIE; /* Enable the USART */ usart_enable((u32)p->reg_addr); }
void usart_set_stopbits(uint32_t usart, uint32_t stopbits) { USART_CR2(usart) = (USART_CR2(usart) & ~USART_CR2_STOP) | stopbits; }
/** @brief USART Enable RX pin active level inversion RX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle). @This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */ void usart_enable_rx_inversion(uint32_t usart) { USART_CR2(usart) |= USART_CR2_RXINV; }
/** @brief USART Disable TX pin active level inversion TX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark) @note This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */ void usart_disable_tx_inversion(uint32_t usart) { USART_CR2(usart) &= ~USART_CR2_TXINV; }
/** @brief USART disable data inversion Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) @note This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */ void usart_disable_data_inversion(uint32_t usart) { USART_CR2(usart) &= ~USART_CR2_DATAINV; }
/** @brief USART enable data inversion Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. @note This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */ void usart_enable_data_inversion(uint32_t usart) { USART_CR2(usart) |= USART_CR2_DATAINV; }
/** @brief USART disable receive timeout function @note If the USART does not support the Receiver timeout feature, this bit is reserved and forced by hardware to ‘0’. @param[in] usart USART block register address base @ref usart_reg_base */ void usart_disable_rx_timeout(uint32_t usart) { USART_CR2(usart) &= ~USART_CR2_RTOEN; }
/** @brief USART enable receive timeout function @note If the USART does not support the Receiver timeout feature, this bit is reserved and forced by hardware to ‘0’. @param[in] usart USART block register address base @ref usart_reg_base */ void usart_enable_rx_timeout(uint32_t usart) { USART_CR2(usart) |= USART_CR2_RTOEN; }