/*******************************************************************************
* Function Name : VIC_Configuration
* Description : Configure the used I/O ports pins
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void VIC_Configuration(void)
{
/* VIC Configuration */
VIC_DeInit();
VIC_Config(I2C0_ITLine,VIC_IRQ , 0);
VIC_Config(I2C1_ITLine,VIC_IRQ , 1);
VIC_ITCmd(I2C0_ITLine, ENABLE);
VIC_ITCmd(I2C1_ITLine, ENABLE);
}
static void prvSetupTimerInterrupt( void )
{
unsigned char a;
unsigned short b;
unsigned long n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;
TIM_InitTypeDef timer;
SCU_APBPeriphClockConfig( __TIM23, ENABLE );
TIM_DeInit(TIM2);
TIM_StructInit(&timer);
prvFindFactors( n, &a, &b );
timer.TIM_Mode = TIM_OCM_CHANNEL_1;
timer.TIM_OC1_Modes = TIM_TIMING;
timer.TIM_Clock_Source = TIM_CLK_APB;
timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING;
timer.TIM_Prescaler = a-1;
timer.TIM_Pulse_Level_1 = TIM_HIGH;
timer.TIM_Pulse_Length_1 = s_nPulseLength = b-1;
TIM_Init (TIM2, &timer);
TIM_ITConfig(TIM2, TIM_IT_OC1, ENABLE);
/* Configure the VIC for the WDG interrupt. */
VIC_Config( TIM2_ITLine, VIC_IRQ, 10 );
VIC_ITCmd( TIM2_ITLine, ENABLE );
/* Install the default handlers for both VIC's. */
VIC0->DVAR = ( unsigned long ) prvDefaultHandler;
VIC1->DVAR = ( unsigned long ) prvDefaultHandler;
TIM_CounterCmd(TIM2, TIM_CLEAR);
TIM_CounterCmd(TIM2, TIM_START);
}
static void prvSetupTimerInterrupt( void )
{
WDG_InitTypeDef xWdg;
unsigned short a;
unsigned long n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
/* Configure the watchdog as a free running timer that generates a
periodic interrupt. */
SCU_APBPeriphClockConfig( __WDG, ENABLE );
WDG_DeInit();
WDG_StructInit(&xWdg);
prvFindFactors( n, &a, &b );
xWdg.WDG_Prescaler = a - 1;
xWdg.WDG_Preload = b - 1;
WDG_Init( &xWdg );
WDG_ITConfig(ENABLE);
/* Configure the VIC for the WDG interrupt. */
VIC_Config( WDG_ITLine, VIC_IRQ, 10 );
VIC_ITCmd( WDG_ITLine, ENABLE );
/* Install the default handlers for both VIC's. */
VIC0->DVAR = ( unsigned long ) prvDefaultHandler;
VIC1->DVAR = ( unsigned long ) prvDefaultHandler;
WDG_Cmd(ENABLE);
}
/**
* In this function, the hardware should be initialized.
* Called from ethernetif_init().
*
* @param netif the already initialized lwip network interface structure
* for this ethernetif
*/
static void low_level_init(struct netif *netif)
{
/* set MAC hardware address length */
netif->hwaddr_len = ETHARP_HWADDR_LEN;
/* set MAC hardware address */
netif->hwaddr[0] = MAC_ADDR0;
netif->hwaddr[1] = MAC_ADDR1;
netif->hwaddr[2] = MAC_ADDR2;
netif->hwaddr[3] = MAC_ADDR3;
netif->hwaddr[4] = MAC_ADDR4;
netif->hwaddr[5] = MAC_ADDR5;
/* maximum transfer unit */
netif->mtu = netifMTU;
// device capabilities.
// don't set NETIF_FLAG_ETHARP if this device is not an ethernet one
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
/* Do whatever else is needed to initialize interface. */
if( s_xSemaphore == NULL ) {
vSemaphoreCreateBinary( s_xSemaphore );
xSemaphoreTake( s_xSemaphore, 0);
}
/* Initialise the MAC. */
ENET_InitClocksGPIO();
ENET_Init(PHY_AUTO_NEGOTIATION);
ENET_Start();
portENTER_CRITICAL();
{
/*set MAC physical*/
ENET_MAC->MAH = (MAC_ADDR5<<8) + MAC_ADDR4;
ENET_MAC->MAL = (MAC_ADDR3<<24) + (MAC_ADDR2<<16) + (MAC_ADDR1<<8) + MAC_ADDR0;
VIC_Config( ENET_ITLine, VIC_IRQ, 1 );
VIC_ITCmd( ENET_ITLine, ENABLE );
ENET_DMA->ISR = DMI_RX_CURRENT_DONE;
ENET_DMA->IER = DMI_RX_CURRENT_DONE;
}
portEXIT_CRITICAL();
netif->flags |= NETIF_FLAG_LINK_UP;
/* Create the task that handles the EMAC. */
xTaskCreate( ethernetif_input, "ETH_INT", netifINTERFACE_TASK_STACK_SIZE, (void *)netif, netifINTERFACE_TASK_PRIORITY, NULL );
}
void CAN_Com_LoopBack_IRQ(void)
{
/* initialize the interrupt controller */
VIC_Config(CAN_ITLine, VIC_IRQ, Priority_1);
/* initialize the CAN at a standard bitrate, interrupts enabled */
CAN_InitStructure.CAN_ConfigParameters=CAN_CR_IE;
CAN_InitStructure.CAN_Bitrate=CAN_BITRATE_100K;
CAN_Init(&CAN_InitStructure);
/* switch into Loopback+Silent mode (self-test) */
CAN_EnterTestMode(CAN_TESTR_LBACK | CAN_TESTR_SILENT);
/* configure the message objects */
CAN_InvalidateAllMsgObj();
CAN_SetTxMsgObj(CAN_TX_MSGOBJ, CAN_EXT_ID);
CAN_SetRxMsgObj(CAN_RX_MSGOBJ, CAN_EXT_ID, 0, CAN_LAST_EXT_ID, TRUE);
/* enable global interrupt */
VIC_ITCmd(CAN_ITLine, ENABLE);
/* Send the pre-defined frame */
CAN_SendMessage(CAN_TX_MSGOBJ, &TxCanMsg[2]);
/* wait until end of transmission */
CAN_WaitEndOfTx();
/* reception and release are done in the interrupt handler */
/* delay to add when the reception occurs */
delay(0x7FF);
/* Test Received Msg */
if((RxCanMsg.IdType == CAN_EXT_ID)&&(RxCanMsg.Id == 0x12345678)&&(RxCanMsg.Dlc == 8)
&&(RxCanMsg.Data[0]==0x10)&&(RxCanMsg.Data[1]==0x11)&&(RxCanMsg.Data[2]==0x12)&&(RxCanMsg.Data[3]==0x13)
&&(RxCanMsg.Data[4]==0x14)&&(RxCanMsg.Data[5]==0x15)&&(RxCanMsg.Data[6]==0x16)&&(RxCanMsg.Data[7]==0x17)){
/*Received Msg OK*/
LED_ON(LD3);
} else {
/*Received Msg KO*/
LED_ON(LD4);
}
/* switch back into Normal mode */
CAN_LeaveTestMode();
/* disable interrupts globally */
VIC_ITCmd(CAN_ITLine, DISABLE);
}
static void low_level_init(struct netif *netif)
{
/* set MAC hardware address length */
netif->hwaddr_len = 6;
/* set MAC hardware address */
netif->hwaddr[0] = MAC_ADDR0;
netif->hwaddr[1] = MAC_ADDR1;
netif->hwaddr[2] = MAC_ADDR2;
netif->hwaddr[3] = MAC_ADDR3;
netif->hwaddr[4] = MAC_ADDR4;
netif->hwaddr[5] = MAC_ADDR5;
/* maximum transfer unit */
netif->mtu = netifMTU;
/* broadcast capability */
netif->flags = NETIF_FLAG_BROADCAST;
s_pxNetIf = netif;
if( s_xSemaphore == NULL )
{
vSemaphoreCreateBinary( s_xSemaphore );
xSemaphoreTake( s_xSemaphore, 0);
}
/* Do whatever else is needed to initialize interface. */
/* Initialise the MAC. */
ENET_InitClocksGPIO();
ENET_Init();
ENET_Start();
portENTER_CRITICAL();
{
/*set MAC physical*/
ENET_MAC->MAH = (MAC_ADDR5<<8) + MAC_ADDR4;
ENET_MAC->MAL = (MAC_ADDR3<<24) + (MAC_ADDR2<<16) + (MAC_ADDR1<<8) + MAC_ADDR0;
VIC_Config( ENET_ITLine, VIC_IRQ, 1 );
VIC_ITCmd( ENET_ITLine, ENABLE );
ENET_DMA->ISR = DMI_RX_CURRENT_DONE;
ENET_DMA->IER = DMI_RX_CURRENT_DONE;
}
portEXIT_CRITICAL();
/* Create the task that handles the EMAC. */
xTaskCreate( ethernetif_input, ( signed char * ) "ETH_INT", netifINTERFACE_TASK_STACK_SIZE, NULL, netifINTERFACE_TASK_PRIORITY, NULL );
}
//-----------------------------------------------------------------
void USB_ConfigInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
UART1_PutString("\r\n USB init...");
#ifdef MCLK96MHZ
//USB clock = MCLK/2 = 48MHz
SCU_USBCLKConfig(SCU_USBCLK_MCLK2);
#else
//USB clock = MCLK = 48MHz
SCU_USBCLKConfig(SCU_USBCLK_MCLK);
#endif
//Enable USB clock
SCU_AHBPeriphClockConfig(__USB,ENABLE);
SCU_AHBPeriphReset(__USB,DISABLE);
SCU_AHBPeriphClockConfig(__USB48M,ENABLE);
//Configure GPIO0 (D+ Pull-Up on P0.1)
SCU_APBPeriphClockConfig(__GPIO0 ,ENABLE);
SCU_APBPeriphReset(__GPIO0,DISABLE);
// GPIO_DeInit(P0.1);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
GPIO_InitStructure.GPIO_IPInputConnected = GPIO_IPInputConnected_Enable;
GPIO_InitStructure.GPIO_Alternate=GPIO_OutputAlt1;
GPIO_Init (GPIO0, &GPIO_InitStructure);
// initialize the rx fifo, block UART IRQ geting a byte from fifo
fifo_init(&USB_rx_fifo, USB_rxfifobuffer, USB_RX_FIFO_LEN, NO_ITLine, USBLP_ITLine);
// initialize txd buffer
Buffer_Init(&USB_tx_buffer, USB_tbuffer, USB_TX_BUFFER_LEN);
// initialize rxd buffer
Buffer_Init(&USB_rx_buffer, USB_rbuffer, USB_RX_BUFFER_LEN);
VIC_Config(USBLP_ITLine, VIC_IRQ, PRIORITY_USB);
VIC_ITCmd(USBLP_ITLine, ENABLE);
USB_Init();
UART1_PutString("ok");
}
//----------------------------------------------------------------------------------------------------
// 1ms Timer
//----------------------------------------------------------------------------------------------------
void TIMER1_Init(void)
{
TIM_InitTypeDef TIM_InitStructure;
UART1_PutString("\r\n Timer1 init...");
#define TIM1_FREQ 200000 // 200kHz
// TimerOCR set in IntHandler
SCU_APBPeriphClockConfig(__TIM01, ENABLE);
TIM_DeInit(TIM1);
TIM_StructInit(&TIM_InitStructure);
TIM_InitStructure.TIM_Mode = TIM_OCM_CHANNEL_1;
TIM_InitStructure.TIM_OC1_Modes = TIM_TIMING;
TIM_InitStructure.TIM_Clock_Source = TIM_CLK_APB;
TIM_InitStructure.TIM_Prescaler = (SCU_GetPCLKFreqValue() * 1000) / TIM1_FREQ; // is only valid up to 48 MHz !
TIM_Init (TIM1, &TIM_InitStructure);
TIM_ITConfig(TIM1, TIM_IT_OC1, ENABLE);
TIM_CounterCmd(TIM1, TIM_START);
VIC_Config(TIM1_ITLine, VIC_IRQ, PRIORITY_TIMER1);
VIC_ITCmd(TIM1_ITLine, ENABLE);
SystemTime.Year = 0;
SystemTime.Month = 0;
SystemTime.Day = 0;
SystemTime.Hour = 0;
SystemTime.Min = 0;
SystemTime.Sec = 0;
SystemTime.mSec = 0;
SystemTime.Valid = 0;
CountMilliseconds = 0;
UART1_PutString("ok");
}
void UART0_Configure(u16 Baudrate)
{
UART_InitTypeDef UART_InitStructure;
SCU_APBPeriphClockConfig(__UART0, ENABLE); // Enable the UART0 Clock
/* UART0 configured as follow:
- Word Length = 8 Bits
- One Stop Bit
- No parity
- BaudRate taken from function argument
- Hardware flow control Disabled
- Receive and transmit enabled
- Receive and transmit FIFOs are Disabled
*/
UART_StructInit(&UART_InitStructure);
UART_InitStructure.UART_WordLength = UART_WordLength_8D;
UART_InitStructure.UART_StopBits = UART_StopBits_1;
UART_InitStructure.UART_Parity = UART_Parity_No ;
UART_InitStructure.UART_BaudRate = Baudrate;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
UART_InitStructure.UART_Mode = UART_Mode_Tx_Rx;
UART_InitStructure.UART_FIFO = UART_FIFO_Enable;
UART_InitStructure.UART_TxFIFOLevel = UART_FIFOLevel_1_2;
UART_InitStructure.UART_RxFIFOLevel = UART_FIFOLevel_1_2;
UART_DeInit(UART0); // reset uart 0 to default
UART_Init(UART0, &UART_InitStructure); // initialize uart 0
// enable uart 0 interrupts selective
UART_ITConfig(UART0, UART_IT_Receive | UART_IT_ReceiveTimeOut /*| UART_IT_FrameError*/, ENABLE);
UART_Cmd(UART0, ENABLE); // enable uart 0
// configure the uart 0 interupt line
VIC_Config(UART0_ITLine, VIC_IRQ, PRIORITY_UART0);
// enable the uart 0 IRQ
VIC_ITCmd(UART0_ITLine, ENABLE);
}
/*
* See the serial2.h header file.
*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
xComPortHandle xReturn;
UART_InitTypeDef xUART1_Init;
GPIO_InitTypeDef GPIO_InitStructure;
/* Create the queues used to hold Rx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* Create the semaphore used to wake a task waiting for space to become
available in the FIFO. */
vSemaphoreCreateBinary( xTxFIFOSemaphore );
/* If the queue/semaphore was created correctly then setup the serial port
hardware. */
if( ( xRxedChars != serINVALID_QUEUE ) && ( xTxFIFOSemaphore != serINVALID_QUEUE ) )
{
/* Pre take the semaphore so a task will block if it tries to access
it. */
xSemaphoreTake( xTxFIFOSemaphore, 0 );
/* Configure the UART. */
xUART1_Init.UART_WordLength = UART_WordLength_8D;
xUART1_Init.UART_StopBits = UART_StopBits_1;
xUART1_Init.UART_Parity = UART_Parity_No;
xUART1_Init.UART_BaudRate = ulWantedBaud;
xUART1_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
xUART1_Init.UART_Mode = UART_Mode_Tx_Rx;
xUART1_Init.UART_FIFO = UART_FIFO_Enable;
/* Enable the UART1 Clock */
SCU_APBPeriphClockConfig( __UART1, ENABLE );
/* Enable the GPIO3 Clock */
SCU_APBPeriphClockConfig( __GPIO3, ENABLE );
/* Configure UART1_Rx pin GPIO3.2 */
GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
GPIO_Init( GPIO3, &GPIO_InitStructure );
/* Configure UART1_Tx pin GPIO3.3 */
GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
GPIO_Init( GPIO3, &GPIO_InitStructure );
portENTER_CRITICAL();
{
/* Configure the UART itself. */
UART_DeInit( UART1 );
UART_Init( UART1, &xUART1_Init );
UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );
UART1->ICR = serCLEAR_ALL_INTERRUPTS;
UART_LoopBackConfig( UART1, DISABLE );
UART_IrDACmd( IrDA1, DISABLE );
/* Configure the VIC for the UART interrupts. */
VIC_Config( UART1_ITLine, VIC_IRQ, 9 );
VIC_ITCmd( UART1_ITLine, ENABLE );
UART_Cmd( UART1, ENABLE );
lTaskWaiting = pdFALSE;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
void vuIP_Task( void *pvParameters )
{
portBASE_TYPE i;
uip_ipaddr_t xIPAddr;
struct timer periodic_timer, arp_timer;
/* Create the semaphore used by the ISR to wake this task. */
vSemaphoreCreateBinary( xSemaphore );
/* Initialise the uIP stack. */
timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
uip_init();
uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );
uip_sethostaddr( xIPAddr );
uip_ipaddr( xIPAddr, uipNET_MASK0, uipNET_MASK1, uipNET_MASK2, uipNET_MASK3 );
uip_setnetmask( xIPAddr );
uip_ipaddr( xIPAddr, uipGATEWAY_ADDR0, uipGATEWAY_ADDR1, uipGATEWAY_ADDR2, uipGATEWAY_ADDR3 );
uip_setdraddr( xIPAddr );
httpd_init();
/* Initialise the MAC. */
ENET_InitClocksGPIO();
ENET_Init();
portENTER_CRITICAL();
{
ENET_Start();
prvSetMACAddress();
VIC_Config( ENET_ITLine, VIC_IRQ, 1 );
VIC_ITCmd( ENET_ITLine, ENABLE );
ENET_DMA->ISR = uipDMI_RX_CURRENT_DONE;
ENET_DMA->IER = uipDMI_RX_CURRENT_DONE;
}
portEXIT_CRITICAL();
while(1)
{
/* Is there received data ready to be processed? */
uip_len = ENET_HandleRxPkt( uip_buf );
if( uip_len > 0 )
{
/* Standard uIP loop taken from the uIP manual. */
if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
{
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
prvENET_Send();
}
}
else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
{
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
prvENET_Send();
}
}
}
else
{
if( timer_expired( &periodic_timer ) )
{
timer_reset( &periodic_timer );
for( i = 0; i < UIP_CONNS; i++ )
{
uip_periodic( i );
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
prvENET_Send();
}
}
/* Call the ARP timer function every 10 seconds. */
if( timer_expired( &arp_timer ) )
{
timer_reset( &arp_timer );
uip_arp_timer();
}
}
else
{
/* We did not receive a packet, and there was no periodic
processing to perform. Block for a fixed period. If a packet
is received during this period we will be woken by the ISR
giving us the Semaphore. */
xSemaphoreTake( xSemaphore, configTICK_RATE_HZ / 2 );
}
}
}
}
void UBloxInit(void)
{
SCU_APBPeriphClockConfig(__GPIO6, ENABLE); // Enable the GPIO6 Clock
SCU_APBPeriphClockConfig(__UART0, ENABLE); // Enable the UART0 Clock
GPIO_InitTypeDef gpio_init;
// Configure pin GPIO6.6 to be UART0 Rx
gpio_init.GPIO_Direction = GPIO_PinInput;
gpio_init.GPIO_Pin = GPIO_Pin_6;
gpio_init.GPIO_Type = GPIO_Type_PushPull;
gpio_init.GPIO_IPInputConnected = GPIO_IPInputConnected_Enable;
gpio_init.GPIO_Alternate = GPIO_InputAlt1; // UART0 Rx
GPIO_Init(GPIO6, &gpio_init);
// Configure pin GPIO6.6 to be UART0 Tx
gpio_init.GPIO_Direction = GPIO_PinOutput;
gpio_init.GPIO_Pin = GPIO_Pin_7;
gpio_init.GPIO_Type = GPIO_Type_PushPull;
gpio_init.GPIO_IPInputConnected = GPIO_IPInputConnected_Disable;
gpio_init.GPIO_Alternate = GPIO_OutputAlt3; // UART0 Tx
GPIO_Init(GPIO6, &gpio_init);
UART1Init(UBLOX_INITIAL_BAUD);
{
// Set the port to UART UBX @ 57600.
const uint8_t tx_buffer[28] = { 0xb5, 0x62, 0x06, 0x00, 0x14, 0x00, 0x01,
0x00, 0x00, 0x00, 0xd0, 0x08, 0x00, 0x00, 0x00, 0xe1, 0x00, 0x00, 0x01,
0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd6, 0x8d };
UBloxTxBuffer(tx_buffer, 28);
}
Wait(150);
UART1Init(UBLOX_OPERATING_BAUD);
// Enable UART Rx interrupt.
UART_ITConfig(UART0, UART_IT_Receive, ENABLE);
VIC_Config(UART0_ITLine, VIC_IRQ, IRQ_PRIORITY_UART0);
VIC_ITCmd(UART0_ITLine, ENABLE);
{ // Configure USB for UBX input with no output.
const uint8_t tx_buffer[28] = { 0xb5, 0x62, 0x06, 0x00, 0x14, 0x00, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x8c };
UBloxTxBuffer(tx_buffer, 28);
}
{ // Set antenna flags to 0x0b and pins to 0x380f.
const uint8_t tx_buffer[12] = { 0xb5, 0x62, 0x06, 0x13, 0x04, 0x00, 0x0b,
0x00, 0x0f, 0x38, 0x6f, 0x4f };
UBloxTxBuffer(tx_buffer, 12);
}
{ // Set measurement period to 200ms (5Hz) with UTC reference.
const uint8_t tx_buffer[14] = { 0xb5, 0x62, 0x06, 0x08, 0x06, 0x00, 0xc8,
0x00, 0x01, 0x00, 0x00, 0x00, 0xdd, 0x68 };
UBloxTxBuffer(tx_buffer, 14);
}
{ // Configure TimPulse.
const uint8_t tx_buffer[28] = { 0xb5, 0x62, 0x06, 0x07, 0x14, 0x00, 0x40,
0x42, 0x0f, 0x00, 0x90, 0x86, 0x03, 0x00, 0xff, 0x01, 0x00, 0x00, 0x32,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfd, 0x70 };
UBloxTxBuffer(tx_buffer, 28);
}
{ // Configure SBAS.
const uint8_t tx_buffer[16] = { 0xb5, 0x62, 0x06, 0x16, 0x08, 0x00, 0x03,
0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2b, 0xbd };
UBloxTxBuffer(tx_buffer, 16);
}
{ // Configure navigation engine.
const uint8_t tx_buffer[44] = { 0xb5, 0x62, 0x06, 0x24, 0x24, 0x00, 0xff,
0xff, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x08,
0x3c, 0x50, 0x00, 0x32, 0x00, 0x23, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x97,
0xfa };
UBloxTxBuffer(tx_buffer, 44);
}
{ // Configure navigation engine expert settings.
const uint8_t tx_buffer[48] = { 0xb5, 0x62, 0x06, 0x23, 0x28, 0x00, 0x00,
0x00, 0x4c, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x10, 0x14,
0x00, 0x01, 0x00, 0x00, 0x00, 0xf8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xc9, 0xea };
UBloxTxBuffer(tx_buffer, 48);
}
{ // Request NAV-POSLLH message to be output every measurement cycle.
const uint8_t tx_buffer[11] = { 0xb5, 0x62, 0x06, 0x01, 0x03, 0x00, 0x01,
0x02, 0x01, 0x0e, 0x47 };
UBloxTxBuffer(tx_buffer, 11);
}
{ // Request NAV-VELNED message to be output every measurement cycle.
const uint8_t tx_buffer[11] = { 0xb5, 0x62, 0x06, 0x01, 0x03, 0x00, 0x01,
0x12, 0x01, 0x1e, 0x67 };
UBloxTxBuffer(tx_buffer, 11);
}
{ // Request NAV-SOL message to be output every measurement cycle.
const uint8_t tx_buffer[11] = { 0xb5, 0x62, 0x06, 0x01, 0x03, 0x00, 0x01,
0x06, 0x01, 0x12, 0x4f };
UBloxTxBuffer(tx_buffer, 11);
}
{ // Request Time-UTC message to be output every 5 measurement cycles.
const uint8_t tx_buffer[11] = { 0xb5, 0x62, 0x06, 0x01, 0x03, 0x00, 0x01,
0x21, 0x05, 0x31, 0x89 };
UBloxTxBuffer(tx_buffer, 11);
}
}
//------------------------------------------------------------------------------
int main(void)
{
VICConfig();
TimingInit();
LEDInit();
UART1Init();
UART2Init();
I2CInit();
SPISlaveInit();
Wait(100);
UART1Printf("University of Tokyo NaviCtrl firmware V2");
ReadEEPROM();
UBloxInit();
LSM303DLInit();
FlightCtrlCommsInit();
SDCardInit();
NavigationInit();
ExternalButtonInit();
// Enable the "new data" interrupt.
VIC_Config(EXTIT0_ITLine, VIC_IRQ, IRQ_PRIORITY_NEW_DATA);
VIC_ITCmd(EXTIT0_ITLine, ENABLE);
// Enable the 50Hz Interrupt.
VIC_Config(EXTIT3_ITLine, VIC_IRQ, IRQ_PRIORITY_50HZ);
VIC_ITCmd(EXTIT3_ITLine, ENABLE);
// Main loop.
uint32_t led_timer = GetTimestamp();
for (;;)
{
#ifndef VISION
// Check for new data from the magnetometer.
ProcessIncomingLSM303DL();
// Skip the rest of the main loop if mag calibration is ongoing.
if (MagCalibration(mag_calibration_)) continue;
// Check for new data on the GPS UART port.
ProcessIncomingUBlox();
#endif
// Check for new data from the FlightCtrl.
if (NewDataFromFlightCtrl())
{
ClearNewDataFromFlightCtrlFlag();
#ifdef VISION
KalmanAccelerometerUpdate();
#endif
UpdateNavigation();
PrepareFlightCtrlDataExchange();
#ifndef VISION
RequestLSM303DL();
#endif
// Check if new data has come while processing the data. This indicates
// that processing did not complete fast enough.
if (NewDataFromFlightCtrl())
{
overrun_counter_++;
}
}
#ifndef VISION
CheckUBXFreshness();
CheckLSM303DLFreshness();
// Normally the magnetometer is read every time new data comes from the
// FlightCtrl. The following statement is a backup that ensures the
// magnetometer is updated even if there is no connection to the FlightCtrl
// and also deals with read errors.
if (LSM303DLDataStale())
{
if (MillisSinceTimestamp(LSM303DLLastRequestTimestamp()) > 20)
RequestLSM303DL();
if (LSM303DLErrorBits() & LSM303DL_ERROR_BIT_I2C_BUSY)
I2CReset();
}
#else
CheckVisionFreshness();
#endif
// Check for incoming data on the "update & debug" UART port.
ProcessIncomingUART1();
// Check for incoming data on the "FligthCtrl" UART port.
ProcessIncomingUART2();
ProcessLogging();
if (TimestampInPast(led_timer))
{
GreenLEDToggle();
while (TimestampInPast(led_timer)) led_timer += 100;
// Debug output for GPS and magnetomter. Remove after testing is completed
// UART1Printf("%+5.2f,%+5.2f,%+5.2f",
// MagneticVector()[0],
// MagneticVector()[1],
// MagneticVector()[2]);
// UART1Printf("%i,%i,%i",
// MagnetometerVector()[0],
// MagnetometerVector()[1],
// MagnetometerVector()[2]);
// UART1Printf("%i,%i,%i",
// MagnetometerBiasVector()[0],
// MagnetometerBiasVector()[1],
// MagnetometerBiasVector()[2]);
// UART1Printf("%f", CurrentHeading());
// UART1Printf("%f,%f,%f",
// (float)(UBXPosLLH()->longitude * 1e-7),
// (float)(UBXPosLLH()->latitude * 1e-7),
// (float)(UBXPosLLH()->height_above_ellipsoid * 1e-3));
UART1PrintfSafe("%+5.2f,%+5.2f,%+5.2f,%+5.2f",
PositionVector()[0],
PositionVector()[1],
PositionVector()[2],
CurrentHeading());
}
}
}
