static void wildfire_update_irq_hw(unsigned int irq) { int qbbno = (irq >> 8) & (WILDFIRE_MAX_QBB - 1); int pcano = (irq >> 6) & (WILDFIRE_PCA_PER_QBB - 1); wildfire_pca *pca; volatile unsigned long * enable0; if (!WILDFIRE_PCA_EXISTS(qbbno, pcano)) { if (!doing_init_irq_hw) { printk(KERN_ERR "wildfire_update_irq_hw:" " got irq %d for non-existent PCA %d" " on QBB %d.\n", irq, pcano, qbbno); } return; } pca = WILDFIRE_pca(qbbno, pcano); enable0 = (unsigned long *) &pca->pca_int[0].enable; /* ??? */ *enable0 = cached_irq_mask[qbbno * WILDFIRE_PCA_PER_QBB + pcano]; mb(); *enable0; }
static void __init wildfire_init_irq(void) { int qbbno, pcano; #if 1 wildfire_init_irq_hw(); init_i8259a_irqs(); #endif for (qbbno = 0; qbbno < WILDFIRE_MAX_QBB; qbbno++) { if (WILDFIRE_QBB_EXISTS(qbbno)) { for (pcano = 0; pcano < WILDFIRE_PCA_PER_QBB; pcano++) { if (WILDFIRE_PCA_EXISTS(qbbno, pcano)) { wildfire_init_irq_per_pca(qbbno, pcano); } } } } }
static void __init wildfire_init_irq_per_pca(int qbbno, int pcano) { int i, irq_bias; static struct irqaction isa_enable = { .handler = no_action, .name = "isa_enable", }; irq_bias = qbbno * (WILDFIRE_PCA_PER_QBB * WILDFIRE_IRQ_PER_PCA) + pcano * WILDFIRE_IRQ_PER_PCA; #if 0 unsigned long io_bias; /* Only need the following for first PCI bus per PCA. */ io_bias = WILDFIRE_IO(qbbno, pcano<<1) - WILDFIRE_IO_BIAS; outb(0, DMA1_RESET_REG + io_bias); outb(0, DMA2_RESET_REG + io_bias); outb(DMA_MODE_CASCADE, DMA2_MODE_REG + io_bias); outb(0, DMA2_MASK_REG + io_bias); #endif #if 0 /* ??? Not sure how to do this, yet... */ init_i8259a_irqs(); /* ??? */ #endif for (i = 0; i < 16; ++i) { if (i == 2) continue; irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type, handle_level_irq); irq_set_status_flags(i + irq_bias, IRQ_LEVEL); } irq_set_chip_and_handler(36 + irq_bias, &wildfire_irq_type, handle_level_irq); irq_set_status_flags(36 + irq_bias, IRQ_LEVEL); for (i = 40; i < 64; ++i) { irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type, handle_level_irq); irq_set_status_flags(i + irq_bias, IRQ_LEVEL); } setup_irq(32+irq_bias, &isa_enable); } static void __init wildfire_init_irq(void) { int qbbno, pcano; #if 1 wildfire_init_irq_hw(); init_i8259a_irqs(); #endif for (qbbno = 0; qbbno < WILDFIRE_MAX_QBB; qbbno++) { if (WILDFIRE_QBB_EXISTS(qbbno)) { for (pcano = 0; pcano < WILDFIRE_PCA_PER_QBB; pcano++) { if (WILDFIRE_PCA_EXISTS(qbbno, pcano)) { wildfire_init_irq_per_pca(qbbno, pcano); } } } } }