void
test_write16_simple(void)
{
int i;
CHECK_FOR_DATALOSS;
CHECK_FOR_SBC;
logging(LOG_VERBOSE, LOG_BLANK_LINE);
logging(LOG_VERBOSE, "Test WRITE16 of 1-256 blocks at the start of the LUN");
memset(scratch, 0xa6, 256 * block_size);
for (i = 1; i <= 256; i++) {
if (maximum_transfer_length && maximum_transfer_length < i) {
break;
}
WRITE16(sd, 0, i * block_size, block_size,
0, 0, 0, 0, 0, scratch,
EXPECT_STATUS_GOOD);
}
logging(LOG_VERBOSE, "Test WRITE16 of 1-256 blocks at the end of the LUN");
for (i = 1; i <= 256; i++) {
if (maximum_transfer_length && maximum_transfer_length < i) {
break;
}
WRITE16(sd, num_blocks - i,
i * block_size, block_size, 0, 0, 0, 0, 0, scratch,
EXPECT_STATUS_GOOD);
}
}
/* void close (); */
NS_IMETHODIMP nsZipWriter::Close()
{
if (!mStream)
return NS_ERROR_NOT_INITIALIZED;
if (mInQueue)
return NS_ERROR_IN_PROGRESS;
if (mCDSDirty) {
PRUint32 size = 0;
for (PRInt32 i = 0; i < mHeaders.Count(); i++) {
nsresult rv = mHeaders[i]->WriteCDSHeader(mStream);
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
size += mHeaders[i]->GetCDSHeaderLength();
}
char buf[ZIP_EOCDR_HEADER_SIZE];
PRUint32 pos = 0;
WRITE32(buf, &pos, ZIP_EOCDR_HEADER_SIGNATURE);
WRITE16(buf, &pos, 0);
WRITE16(buf, &pos, 0);
WRITE16(buf, &pos, mHeaders.Count());
WRITE16(buf, &pos, mHeaders.Count());
WRITE32(buf, &pos, size);
WRITE32(buf, &pos, mCDSOffset);
WRITE16(buf, &pos, mComment.Length());
nsresult rv = ZW_WriteData(mStream, buf, pos);
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
rv = ZW_WriteData(mStream, mComment.get(), mComment.Length());
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
nsCOMPtr<nsISeekableStream> seekable = do_QueryInterface(mStream);
rv = seekable->SetEOF();
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
}
nsresult rv = mStream->Close();
mStream = nsnull;
mHeaders.Clear();
mEntryHash.Clear();
mQueue.Clear();
return rv;
}
static
void xycom566isrcb(CALLBACK *cb)
{
xy566 *card;
epicsUInt16 csr;
epicsUInt16 datacnt[32];
epicsUInt16 dcnt;
size_t i, ch;
callbackGetUser(card,cb);
epicsMutexMustLock(card->guard);
/* clear number of data points */
memset(datacnt,0,sizeof(datacnt));
/* number of samples taken */
dcnt=READ16(card->base, XY566_RAM);
if(dcnt>256){
/* Somehow the sequence was restart w/o resetting
* the pointer, or changed by an outside program
*/
dcnt=256;
printf("Data longer then expected\n");
}
for(i=0;i<dcnt;i++){
ch=card->seq[i]&0x1f;
card->data[ch][datacnt[ch]]=READ16(card->data_base, XY566_DOFF(i));
datacnt[ch]++;
if( card->seq[i]&SEQ_END )
break;
}
/* reset pointers */
WRITE16(card->base, XY566_RAM, 0);
WRITE8(card->base, XY566_SEQ, 0);
csr=READ16(card->base, XY566_CSR);
/* enable sequence controller */
csr|=XY566_CSR_SEQ;
WRITE16(card->base, XY566_CSR, csr);
scanIoRequest(card->seq_irq);
epicsMutexUnlock(card->guard);
}
void
evgEvtClk::setFracSynFreq(epicsFloat64 freq) {
epicsUInt32 controlWord, oldControlWord;
epicsFloat64 error;
controlWord = FracSynthControlWord (freq, MRF_FRAC_SYNTH_REF, 0, &error);
if ((!controlWord) || (error > 100.0)) {
char err[80];
sprintf(err, "Cannot set event clock speed to %f MHz.\n", freq);
std::string strErr(err);
throw std::runtime_error(strErr);
}
oldControlWord=READ32(m_pReg, FracSynthWord);
/* Changing the control word disturbes the phase of the synthesiser
which will cause a glitch. Don't change the control word unless needed.*/
if(controlWord != oldControlWord) {
epicsUInt16 uSecDivider;
if ((RFClockReference)getSource() == RFClockReference_RecoverHalved) {
uSecDivider = (epicsUInt16)(freq / 2);
}
else {
uSecDivider = (epicsUInt16)freq;
}
WRITE32(m_pReg, FracSynthWord, controlWord);
WRITE16(m_pReg, uSecDiv, uSecDivider);
}
m_fracSynFreq = FracSynthAnalyze(READ32(m_pReg, FracSynthWord), 24.0, 0);
}
static void I386OP(fpu_group_d9)(void) /* Opcode 0xd9 */
{
UINT8 modrm = FETCH();
if (modrm < 0xc0)
{
UINT32 ea = GetEA(modrm);
switch ((modrm >> 3) & 0x7)
{
case 5: /* FLDCW */
{
I.fpu_control_word = READ16(ea);
CYCLES(1); /* TODO */
break;
}
case 7: /* FSTCW */
{
WRITE16(ea, I.fpu_control_word);
CYCLES(1); /* TODO */
break;
}
default:
osd_die("I386: FPU Op D9 %02X at %08X\n", modrm, I.pc-2);
}
}
int VerifyAddingMsgPacket::putBody( unsigned char * buf )
{
int pos=0;
buf[pos++] = 0x03; /// might be sub-command
buf[pos++] = 0x01; /// might be sub of subcommand,
//*((unsigned int *)(buf+pos)) = htonl(m_BuddyTQQNum);
WRITE32(buf+pos, m_BuddyTQQNum);
pos+=4;
if(!m_CodeLen || !m_Code){
fprintf(stderr, "VerifyAddingMsgPacket: no verification code set!\n");
return 0;
}
WRITE16(buf+pos, m_CodeLen);
pos+=2;
memcpy(buf+pos, m_Code, m_CodeLen);
pos += m_CodeLen;
return pos;
}
void i386_device::i486_cmpxchg_rm16_r16() // Opcode 0x0f b1
{
UINT8 modrm = FETCH();
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT16 src = LOAD_REG16(modrm);
if( REG16(AX) == dst ) {
STORE_RM16(modrm, src);
m_ZF = 1;
CYCLES(CYCLES_CMPXCHG_REG_REG_T);
} else {
REG16(AX) = dst;
m_ZF = 0;
CYCLES(CYCLES_CMPXCHG_REG_REG_F);
}
} else {
UINT32 ea = GetEA(modrm,0);
UINT16 dst = READ16(ea);
UINT16 src = LOAD_REG16(modrm);
if( REG16(AX) == dst ) {
WRITE16(ea, src);
m_ZF = 1;
CYCLES(CYCLES_CMPXCHG_REG_MEM_T);
} else {
REG16(AX) = dst;
m_ZF = 0;
CYCLES(CYCLES_CMPXCHG_REG_MEM_F);
}
}
}
static
void xycom566isr(void *arg)
{
xy566 *card=arg;
epicsUInt16 csr;
csr=READ16(card->base, XY566_CSR);
if(!(csr&XY566_CSR_PND))
return; /* not ours */
if(card->use_seq_clk)
WRITE8(card->base, XY566_STC, 0xC2); /* Disarm Seq. trig clock */
/* Disable sequence controller, acknowledge
* interrupts, and schedule further processing
* out of interrupt context
*/
csr&=~XY566_CSR_SEQ; /* disable seq. cont. */
/* writing back what was read will clear any pending
* interrupts
*/
WRITE16(card->base, XY566_CSR, csr);
callbackRequest(&card->cb_irq);
return;
}
static void I486OP(cmpxchg_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b1
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT16 src = LOAD_REG16(modrm);
if( REG16(AX) == dst ) {
STORE_RM16(modrm, src);
cpustate->ZF = 1;
CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_T);
} else {
REG16(AX) = dst;
cpustate->ZF = 0;
CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_F);
}
} else {
UINT32 ea = GetEA(cpustate,modrm);
UINT16 dst = READ16(cpustate,ea);
UINT16 src = LOAD_REG16(modrm);
if( REG16(AX) == dst ) {
WRITE16(cpustate,modrm, src);
cpustate->ZF = 1;
CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_T);
} else {
REG16(AX) = dst;
cpustate->ZF = 0;
CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_F);
}
}
}
void
xycom566finish(void)
{
ELLNODE *node;
xy566* card;
epicsUInt16 csr;
for(node=ellFirst(&xy566s); node; node=ellNext(node))
{
card=node2priv(node);
if(!card->fail){
if(!!finish566seq(card)){
printf("Board #%d failed to generate samping sequence and will not be used\n",card->id);
card->fail=1;
}
}
if(!card->clk_div){
printf("Board #%d STC not initialized and will not be used\n",card->id);
card->fail=1;
}
if(!!card->fail){
printf("Board #%d failed to initialize and will not be used\n",card->id);
/* Reset the board again and
* turn off the LEDS to indicate failure
*/
WRITE16(card->base, XY566_CSR, XY566_CSR_RST);
WRITE16(card->base, XY566_CSR, XY566_CSR_RED);
return;
}
WRITE16(card->base, XY566_RAM, 0);
WRITE8(card->base, XY566_SEQ, 0);
csr=READ16(card->base, XY566_CSR);
csr|=XY566_CSR_SEQ|XY566_CSR_INA|XY566_CSR_SIE;
csr|=XY566_CSR_RED|XY566_CSR_GRN;
WRITE16(card->base, XY566_CSR, csr);
}
return;
}
static void
test_write16(void)
{
logging(LOG_VERBOSE, "Test WRITE16 fails with WRITE_PROTECTED");
memset(scratch, 0xa6, block_size);
WRITE16(sd, 0, block_size, block_size, 0, 0, 0, 0, 0, scratch,
EXPECT_WRITE_PROTECTED);
}
nsresult nsZipHeader::WriteFileHeader(nsIOutputStream *aStream)
{
NS_ASSERTION(mInited, "Not initalised");
PRUint8 buf[ZIP_FILE_HEADER_SIZE];
PRUint32 pos = 0;
WRITE32(buf, &pos, ZIP_FILE_HEADER_SIGNATURE);
WRITE16(buf, &pos, mVersionNeeded);
WRITE16(buf, &pos, mFlags);
WRITE16(buf, &pos, mMethod);
WRITE16(buf, &pos, mTime);
WRITE16(buf, &pos, mDate);
WRITE32(buf, &pos, mCRC);
WRITE32(buf, &pos, mCSize);
WRITE32(buf, &pos, mUSize);
WRITE16(buf, &pos, mName.Length());
WRITE16(buf, &pos, mLocalFieldLength);
nsresult rv = ZW_WriteData(aStream, (const char *)buf, pos);
NS_ENSURE_SUCCESS(rv, rv);
rv = ZW_WriteData(aStream, mName.get(), mName.Length());
NS_ENSURE_SUCCESS(rv, rv);
if (mLocalFieldLength)
{
rv = ZW_WriteData(aStream, (const char *)mLocalExtraField.get(), mLocalFieldLength);
NS_ENSURE_SUCCESS(rv, rv);
}
return NS_OK;
}
//0x08:LD (a16), SP
int gb_exec_x0_z0_y1(struct gb *gb)
{
addr im = READ16(REG(PC));
REG(PC) += 2;
logf("LD (%4x),SP | SP=%.4x", im, REG(SP));
WRITE16(im, REG(SP));
gb->cycle += 20;
return RET_SUCCESS;
}
void nsZipHeader::Init(const nsACString & aPath, PRTime aDate, PRUint32 aAttr,
PRUint32 aOffset)
{
NS_ASSERTION(!mInited, "Already initalised");
PRExplodedTime time;
PR_ExplodeTime(aDate, PR_LocalTimeParameters, &time);
mTime = time.tm_sec / 2 + (time.tm_min << 5) + (time.tm_hour << 11);
mDate = time.tm_mday + ((time.tm_month + 1) << 5) +
((time.tm_year - 1980) << 9);
// Store modification timestamp as extra field
// First fill CDS extra field
mFieldLength = 9;
mExtraField = new PRUint8[mFieldLength];
if (!mExtraField) {
mFieldLength = 0;
} else {
PRUint32 pos = 0;
WRITE16(mExtraField.get(), &pos, ZIP_EXTENDED_TIMESTAMP_FIELD);
WRITE16(mExtraField.get(), &pos, 5);
WRITE8(mExtraField.get(), &pos, ZIP_EXTENDED_TIMESTAMP_MODTIME);
WRITE32(mExtraField.get(), &pos, aDate / PR_USEC_PER_SEC);
// Fill local extra field
mLocalExtraField = new PRUint8[mFieldLength];
if (mLocalExtraField) {
mLocalFieldLength = mFieldLength;
memcpy(mLocalExtraField.get(), mExtraField.get(), mLocalFieldLength);
}
}
mEAttr = aAttr;
mOffset = aOffset;
mName = aPath;
mComment = NS_LITERAL_CSTRING("");
// Claim a UTF-8 path in case it needs it.
mFlags |= FLAGS_IS_UTF8;
mInited = PR_TRUE;
}
uint32_t SIZE_OPTIMIZATION WaitEEWriteToFinish(PFLASH_SSD_CONFIG pSSDConfig, uint32_t* dest,\
uint32_t* size, uint8_t** pData, uint8_t step)
{
uint32_t ret; /* return code variable */
uint32_t temp; /* temporary variable */
if (0x01U == step)
{
WRITE8(*dest, READ8(*pData));
}
if (0x02U == step)
{
#if(BIG_ENDIAN == ENDIANNESS)
temp = (uint32_t)READ8(*pData) << 8;
temp |= (uint32_t)(READ8(*pData + 1));
#else
temp = (uint32_t)READ8(*pData + 1) << 8;
temp |= (uint32_t)(READ8(*pData));
#endif
WRITE16(BYTE2WORD(*dest), (uint16_t)temp);
}
if (0x04U == step)
{
#if(BIG_ENDIAN == ENDIANNESS)
temp = (uint32_t)READ8(*pData) << 24;
temp |= (uint32_t)(READ8(*pData + 1)) << 16;
temp |= (uint32_t)(READ8(*pData + 2)) << 8;
temp |= (uint32_t)(READ8(*pData + 3));
#else
temp = (uint32_t)READ8(*pData + 3) << 24;
temp |= (uint32_t)(READ8(*pData + 2)) << 16;
temp |= (uint32_t)(READ8(*pData + 1)) << 8;
temp |= (uint32_t)READ8(*pData);
#endif
WRITE32(BYTE2WORD(*dest), (uint32_t)temp);
}
temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FCNFG_OFFSET;
while(0x0U == REG_BIT_GET(temp, FTFx_SSD_FCNFG_EEERDY))
{
/* wait till EEERDY bit is set */
}
/* Check for protection violation error */
temp = pSSDConfig->ftfxRegBase + FTFx_SSD_FSTAT_OFFSET;
ret = (uint32_t)REG_READ(temp) & FTFx_SSD_FSTAT_FPVIOL;
*dest += step;
*size -= step;
*pData += step;
return ret;
}
void
test_writesame16_unmap_until_end(void)
{
unsigned int i;
CHECK_FOR_DATALOSS;
CHECK_FOR_THIN_PROVISIONING;
CHECK_FOR_LBPWS;
CHECK_FOR_SBC;
if (inq_bl->wsnz) {
logging(LOG_NORMAL, "WRITESAME16 does not support 0-blocks."
"WSNZ == 1");
memset(scratch, 0, block_size);
WRITESAME16(sd, 0, block_size, 0, 0, 1, 0, 0, scratch,
EXPECT_INVALID_FIELD_IN_CDB);
return;
}
logging(LOG_VERBOSE, LOG_BLANK_LINE);
logging(LOG_VERBOSE, "Test WRITESAME16 of 1-256 blocks at the end of the LUN by setting number-of-blocks==0");
memset(scratch, 0xa6, 256 * block_size);
for (i = 1; i <= 256; i++) {
logging(LOG_VERBOSE, "Write %d blocks of 0xFF", i);
memset(scratch, 0xff, block_size * i);
WRITE16(sd, num_blocks - i,
i * block_size, block_size, 0, 0, 0, 0, 0, scratch,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Unmap %d blocks using WRITESAME16", i);
memset(scratch, 0, block_size);
WRITESAME16(sd, num_blocks - i,
block_size, 0, 0, 1, 0, 0, scratch,
EXPECT_STATUS_GOOD);
if (rc16->lbprz) {
logging(LOG_VERBOSE, "LBPRZ is set. Read the unmapped "
"blocks back and verify they are all zero");
logging(LOG_VERBOSE, "Read %d blocks and verify they "
"are now zero", i);
READ16(sd, NULL, num_blocks - i,
i * block_size, block_size,
0, 0, 0, 0, 0, scratch,
EXPECT_STATUS_GOOD);
ALL_ZERO(scratch, i * block_size);
} else {
logging(LOG_VERBOSE, "LBPRZ is clear. Skip the read "
"and verify zero test");
}
}
}
void
xycom220setup(int id,int base)
{
xy220 *card=malloc(sizeof(xy220));
epicsUInt8 junk;
volatile epicsUInt8 **ba;
if(!card){
printf("Allocation failed\n");
return;
}
card->id=id;
card->base_addr=base;
ba=&card->base;
if(devBusToLocalAddr(atVMEA16, card->base_addr, (volatile void **)ba)){
printf("Failed to map %lx for card %x\n",(unsigned long)card->base,id);
free(card);
return;
}
if(devReadProbe(1, card->base+U8_XY220_ID, &junk)){
printf("Failed to read %lx for card %x\n",(unsigned long)(card->base+U8_XY220_ID),id);
free(card);
return;
}
WRITE16(card->base, XY220_CSR, X220_CSR_RST);
WRITE16(card->base, XY220_CSR, X220_CSR_RED|X220_CSR_GRN);
card->guard=epicsMutexMustCreate();
if(dbg220>0)
printf("%d mapped %lx as %lx\n",id,(unsigned long)card->base,(unsigned long)card->base);
ellAdd(&xy220s,&card->node);
return;
}
void i386_device::i486_xadd_rm16_r16() // Opcode 0x0f c1
{
UINT8 modrm = FETCH();
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT16 src = LOAD_REG16(modrm);
STORE_REG16(modrm, dst);
STORE_RM16(modrm, dst + src);
CYCLES(CYCLES_XADD_REG_REG);
} else {
UINT32 ea = GetEA(modrm,1);
UINT16 dst = READ16(ea);
UINT16 src = LOAD_REG16(modrm);
WRITE16(ea, dst + src);
STORE_REG16(modrm, dst);
CYCLES(CYCLES_XADD_REG_MEM);
}
}
static void I486OP(xadd_rm16_r16)(i386_state *cpustate) // Opcode 0x0f c1
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT16 src = LOAD_REG16(modrm);
STORE_RM16(modrm, dst + src);
STORE_REG16(modrm, dst);
CYCLES(cpustate,CYCLES_XADD_REG_REG);
} else {
UINT32 ea = GetEA(cpustate,modrm);
UINT16 dst = READ16(cpustate,ea);
UINT16 src = LOAD_REG16(modrm);
WRITE16(cpustate,ea, dst + src);
STORE_REG16(modrm, dst);
CYCLES(cpustate,CYCLES_XADD_REG_MEM);
}
}
void i386_device::i486_group0F01_16() // Opcode 0x0f 01
{
UINT8 modrm = FETCH();
UINT16 address;
UINT32 ea;
switch( (modrm >> 3) & 0x7 )
{
case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
ea = i386_translate( CS, address, 1 );
} else {
ea = GetEA(modrm,1);
}
WRITE16(ea, m_gdtr.limit);
WRITE32(ea + 2, m_gdtr.base & 0xffffff);
CYCLES(CYCLES_SGDT);
break;
}
case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
address = LOAD_RM16(modrm);
ea = i386_translate( CS, address, 1 );
}
else
{
ea = GetEA(modrm,1);
}
WRITE16(ea, m_idtr.limit);
WRITE32(ea + 2, m_idtr.base & 0xffffff);
CYCLES(CYCLES_SIDT);
break;
}
case 2: /* LGDT */
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
ea = i386_translate( CS, address, 0 );
} else {
ea = GetEA(modrm,0);
}
m_gdtr.limit = READ16(ea);
m_gdtr.base = READ32(ea + 2) & 0xffffff;
CYCLES(CYCLES_LGDT);
break;
}
case 3: /* LIDT */
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
ea = i386_translate( CS, address, 0 );
} else {
ea = GetEA(modrm,0);
}
m_idtr.limit = READ16(ea);
m_idtr.base = READ32(ea + 2) & 0xffffff;
CYCLES(CYCLES_LIDT);
break;
}
case 4: /* SMSW */
{
if( modrm >= 0xc0 ) {
STORE_RM16(modrm, m_cr[0]);
CYCLES(CYCLES_SMSW_REG);
} else {
ea = GetEA(modrm,1);
WRITE16(ea, m_cr[0]);
CYCLES(CYCLES_SMSW_MEM);
}
break;
}
case 6: /* LMSW */
{
UINT16 b;
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
if( modrm >= 0xc0 ) {
b = LOAD_RM16(modrm);
CYCLES(CYCLES_LMSW_REG);
} else {
ea = GetEA(modrm,0);
CYCLES(CYCLES_LMSW_MEM);
b = READ16(ea);
}
if(PROTECTED_MODE)
b |= 0x0001; // cannot return to real mode using this instruction.
m_cr[0] &= ~0x0000000f;
m_cr[0] |= b & 0x0000000f;
break;
}
case 7: /* INVLPG */
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
if(modrm >= 0xc0)
{
logerror("i486: invlpg with modrm %02X\n", modrm);
FAULT(FAULT_UD,0)
}
ea = GetEA(modrm,-1);
CYCLES(25); // TODO: add to cycles.h
vtlb_flush_address(m_vtlb, ea);
break;
}
default:
report_invalid_modrm("group0F01_16", modrm);
break;
}
void
test_write16_residuals(void)
{
struct scsi_task *task_ret;
unsigned char buf[10000];
struct iscsi_data data;
int ok;
unsigned int i;
logging(LOG_VERBOSE, LOG_BLANK_LINE);
logging(LOG_VERBOSE, "Test WRITE16 commands with residuals");
logging(LOG_VERBOSE, "Block size is %zu", block_size);
CHECK_FOR_DATALOSS;
CHECK_FOR_SBC;
if (sd->iscsi_ctx == NULL) {
const char *err = "[SKIPPED] This WRITE16 test is only "
"supported for iSCSI backends";
logging(LOG_NORMAL, "%s", err);
CU_PASS(err);
return;
}
/* Try a write16 of 1 block but xferlength == 0 */
task = malloc(sizeof(struct scsi_task));
CU_ASSERT_PTR_NOT_NULL_FATAL(task);
memset(task, 0, sizeof(struct scsi_task));
task->cdb[0] = SCSI_OPCODE_WRITE16;
task->cdb[13] = 1;
task->cdb_size = 16;
task->xfer_dir = SCSI_XFER_WRITE;
task->expxferlen = 0;
/*
* we don't want autoreconnect since some targets will drop the session
* on this condition.
*/
iscsi_set_noautoreconnect(sd->iscsi_ctx, 1);
logging(LOG_VERBOSE, "Try writing one block but with iSCSI expected transfer length==0");
task_ret = iscsi_scsi_command_sync(sd->iscsi_ctx, sd->iscsi_lun, task, NULL);
CU_ASSERT_PTR_NOT_NULL_FATAL(task_ret);
CU_ASSERT_NOT_EQUAL(task->status, SCSI_STATUS_CANCELLED); /* XXX redundant? */
if (task->status == SCSI_STATUS_CHECK_CONDITION
&& task->sense.key == SCSI_SENSE_ILLEGAL_REQUEST
&& task->sense.ascq == SCSI_SENSE_ASCQ_INVALID_OPERATION_CODE) {
logging(LOG_NORMAL, "[SKIPPED] WRITE16 is not implemented.");
CU_PASS("WRITE16 is not implemented.");
return;
}
logging(LOG_VERBOSE, "Verify that the target returned SUCCESS");
if (task->status != SCSI_STATUS_GOOD) {
logging(LOG_VERBOSE, "[FAILED] Target returned error %s",
iscsi_get_error(sd->iscsi_ctx));
}
CU_ASSERT_EQUAL(task->status, SCSI_STATUS_GOOD);
logging(LOG_VERBOSE, "Verify residual overflow flag is set");
if (task->residual_status != SCSI_RESIDUAL_OVERFLOW) {
logging(LOG_VERBOSE, "[FAILED] Target did not set residual "
"overflow flag");
}
CU_ASSERT_EQUAL(task->residual_status, SCSI_RESIDUAL_OVERFLOW);
logging(LOG_VERBOSE, "Verify we got %zu bytes of residual overflow",
block_size);
if (task->residual != block_size) {
logging(LOG_VERBOSE, "[FAILED] Target did not set correct "
"amount of residual. Expected %zu but got %zu.",
block_size, task->residual);
}
CU_ASSERT_EQUAL(task->residual, block_size);
scsi_free_scsi_task(task);
task = NULL;
/* in case the previous test failed the session */
iscsi_set_noautoreconnect(sd->iscsi_ctx, 0);
logging(LOG_VERBOSE, "Try writing one block but with iSCSI expected transfer length==10000");
task = malloc(sizeof(struct scsi_task));
CU_ASSERT_PTR_NOT_NULL_FATAL(task);
memset(task, 0, sizeof(struct scsi_task));
task->cdb[0] = SCSI_OPCODE_WRITE16;
task->cdb[13] = 1;
task->cdb_size = 16;
task->xfer_dir = SCSI_XFER_WRITE;
task->expxferlen = 10000;
memset(buf, 0xa6, sizeof(buf));
data.size = task->expxferlen;
data.data = &buf[0];
task_ret = iscsi_scsi_command_sync(sd->iscsi_ctx, sd->iscsi_lun, task, &data);
CU_ASSERT_PTR_NOT_NULL_FATAL(task_ret);
logging(LOG_VERBOSE, "Verify that the target returned SUCCESS");
if (task->status != SCSI_STATUS_GOOD) {
logging(LOG_VERBOSE, "[FAILED] Target returned error %s",
iscsi_get_error(sd->iscsi_ctx));
}
CU_ASSERT_EQUAL(task->status, SCSI_STATUS_GOOD);
logging(LOG_VERBOSE, "Verify residual underflow flag is set");
if (task->residual_status != SCSI_RESIDUAL_UNDERFLOW) {
logging(LOG_VERBOSE, "[FAILED] Target did not set residual "
"underflow flag");
}
CU_ASSERT_EQUAL(task->residual_status, SCSI_RESIDUAL_UNDERFLOW);
logging(LOG_VERBOSE, "Verify we got %zu bytes of residual underflow",
10000 - block_size);
if (task->residual != 10000 - block_size) {
logging(LOG_VERBOSE, "[FAILED] Target did not set correct "
"amount of residual. Expected %zu but got %zu.",
10000 - block_size, task->residual);
}
CU_ASSERT_EQUAL(task->residual, 10000 - block_size);
scsi_free_scsi_task(task);
task = NULL;
logging(LOG_VERBOSE, "Try writing one block but with iSCSI expected transfer length==200");
task = malloc(sizeof(struct scsi_task));
CU_ASSERT_PTR_NOT_NULL_FATAL(task);
memset(task, 0, sizeof(struct scsi_task));
task->cdb[0] = SCSI_OPCODE_WRITE16;
task->cdb[13] = 1;
task->cdb_size = 16;
task->xfer_dir = SCSI_XFER_WRITE;
task->expxferlen = 200;
data.size = task->expxferlen;
data.data = &buf[0];
task_ret = iscsi_scsi_command_sync(sd->iscsi_ctx, sd->iscsi_lun, task, &data);
CU_ASSERT_PTR_NOT_NULL_FATAL(task_ret);
logging(LOG_VERBOSE, "Verify that the target returned SUCCESS");
ok = task->status == SCSI_STATUS_GOOD ||
(task->status == SCSI_STATUS_CHECK_CONDITION &&
task->sense.key == SCSI_SENSE_ILLEGAL_REQUEST &&
task->sense.ascq == SCSI_SENSE_ASCQ_INVALID_FIELD_IN_INFORMATION_UNIT);
if (!ok) {
logging(LOG_VERBOSE, "[FAILED] Target returned error %s",
iscsi_get_error(sd->iscsi_ctx));
}
CU_ASSERT(ok);
logging(LOG_VERBOSE, "Verify residual overflow flag is set");
if (task->residual_status != SCSI_RESIDUAL_OVERFLOW) {
logging(LOG_VERBOSE, "[FAILED] Target did not set residual "
"overflow flag");
}
CU_ASSERT_EQUAL(task->residual_status, SCSI_RESIDUAL_OVERFLOW);
logging(LOG_VERBOSE, "Verify we got %zu bytes of residual overflow",
block_size - 200);
if (task->residual != block_size - 200) {
logging(LOG_VERBOSE, "[FAILED] Target did not set correct "
"amount of residual. Expected %zu but got %zu.",
block_size - 200, task->residual);
}
CU_ASSERT_EQUAL(task->residual, block_size - 200);
scsi_free_scsi_task(task);
task = NULL;
logging(LOG_VERBOSE, "Try writing two blocks but iSCSI expected "
"transfer length==%zu (==one block)", block_size);
task = malloc(sizeof(struct scsi_task));
CU_ASSERT_PTR_NOT_NULL_FATAL(task);
memset(task, 0, sizeof(struct scsi_task));
task->cdb[0] = SCSI_OPCODE_WRITE16;
task->cdb[13] = 2;
task->cdb_size = 16;
task->xfer_dir = SCSI_XFER_WRITE;
task->expxferlen = block_size;
data.size = task->expxferlen;
data.data = &buf[0];
task_ret = iscsi_scsi_command_sync(sd->iscsi_ctx, sd->iscsi_lun, task, &data);
CU_ASSERT_PTR_NOT_NULL_FATAL(task_ret);
logging(LOG_VERBOSE, "Verify that the target returned SUCCESS");
if (task->status != SCSI_STATUS_GOOD) {
logging(LOG_VERBOSE, "[FAILED] Target returned error %s",
iscsi_get_error(sd->iscsi_ctx));
}
CU_ASSERT_EQUAL(task->status, SCSI_STATUS_GOOD);
logging(LOG_VERBOSE, "Verify residual overflow flag is set");
if (task->residual_status != SCSI_RESIDUAL_OVERFLOW) {
logging(LOG_VERBOSE, "[FAILED] Target did not set residual "
"overflow flag");
}
CU_ASSERT_EQUAL(task->residual_status, SCSI_RESIDUAL_OVERFLOW);
logging(LOG_VERBOSE, "Verify we got one block of residual overflow");
if (task->residual != block_size) {
logging(LOG_VERBOSE, "[FAILED] Target did not set correct "
"amount of residual. Expected %zu but got %zu.",
block_size, task->residual);
}
CU_ASSERT_EQUAL(task->residual, block_size);
scsi_free_scsi_task(task);
task = NULL;
logging(LOG_VERBOSE, "Verify that if iSCSI EDTL > SCSI TL then we only write SCSI TL amount of data");
logging(LOG_VERBOSE, "Write two blocks of 'a'");
memset(buf, 'a', 10000);
WRITE16(sd, 0, 2 * block_size, block_size, 0, 0, 0, 0, 0, buf,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Write one block of 'b' but set iSCSI EDTL to 2 blocks.");
task = malloc(sizeof(struct scsi_task));
CU_ASSERT_PTR_NOT_NULL_FATAL(task);
memset(buf, 'b', 10000);
memset(task, 0, sizeof(struct scsi_task));
task->cdb[0] = SCSI_OPCODE_WRITE16;
task->cdb[13] = 1;
task->cdb_size = 16;
task->xfer_dir = SCSI_XFER_WRITE;
task->expxferlen = 2 * block_size;
data.size = task->expxferlen;
data.data = &buf[0];
task_ret = iscsi_scsi_command_sync(sd->iscsi_ctx, sd->iscsi_lun, task, &data);
CU_ASSERT_PTR_NOT_NULL_FATAL(task_ret);
logging(LOG_VERBOSE, "Verify that the target returned SUCCESS");
if (task->status != SCSI_STATUS_GOOD) {
logging(LOG_VERBOSE, "[FAILED] Target returned error %s",
iscsi_get_error(sd->iscsi_ctx));
}
CU_ASSERT_EQUAL(task->status, SCSI_STATUS_GOOD);
logging(LOG_VERBOSE, "Verify residual underflow flag is set");
if (task->residual_status != SCSI_RESIDUAL_UNDERFLOW) {
logging(LOG_VERBOSE, "[FAILED] Target did not set residual "
"underflow flag");
}
CU_ASSERT_EQUAL(task->residual_status, SCSI_RESIDUAL_UNDERFLOW);
logging(LOG_VERBOSE, "Verify we got one block of residual underflow");
if (task->residual != block_size) {
logging(LOG_VERBOSE, "[FAILED] Target did not set correct "
"amount of residual. Expected %zu but got %zu.",
block_size, task->residual);
}
CU_ASSERT_EQUAL(task->residual, block_size);
scsi_free_scsi_task(task);
task = NULL;
logging(LOG_VERBOSE, "Read the two blocks");
READ16(sd, NULL, 0, 2* block_size, block_size, 0, 0, 0, 0, 0, buf,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Verify that the first block was changed to 'b'");
for (i = 0; i < block_size; i++) {
if (buf[i] != 'b') {
logging(LOG_NORMAL, "First block did not contain expected 'b'");
CU_FAIL("Block was not written correctly");
break;
}
}
logging(LOG_VERBOSE, "Verify that the second block was NOT overwritten and still contains 'a'");
for (i = block_size; i < 2 * block_size; i++) {
if (buf[i] != 'a') {
logging(LOG_NORMAL, "Second block was overwritten and no longer contain 'a'");
CU_FAIL("Second block was incorrectly overwritten");
break;
}
}
logging(LOG_VERBOSE, "Verify that if iSCSI EDTL < SCSI TL then we only write iSCSI EDTL amount of data");
logging(LOG_VERBOSE, "Write two blocks of 'a'");
memset(buf, 'a', 10000);
WRITE16(sd, 0, 2 * block_size, block_size, 0, 0, 0, 0, 0, buf,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Write two blocks of 'b' but set iSCSI EDTL to 1 blocks.");
task = malloc(sizeof(struct scsi_task));
CU_ASSERT_PTR_NOT_NULL_FATAL(task);
memset(buf, 'b', 10000);
memset(task, 0, sizeof(struct scsi_task));
task->cdb[0] = SCSI_OPCODE_WRITE16;
task->cdb[13] = 2;
task->cdb_size = 16;
task->xfer_dir = SCSI_XFER_WRITE;
task->expxferlen = block_size;
data.size = task->expxferlen;
data.data = &buf[0];
task_ret = iscsi_scsi_command_sync(sd->iscsi_ctx, sd->iscsi_lun, task, &data);
CU_ASSERT_PTR_NOT_NULL_FATAL(task_ret);
logging(LOG_VERBOSE, "Verify that the target returned SUCCESS");
if (task->status != SCSI_STATUS_GOOD) {
logging(LOG_VERBOSE, "[FAILED] Target returned error %s",
iscsi_get_error(sd->iscsi_ctx));
}
CU_ASSERT_EQUAL(task->status, SCSI_STATUS_GOOD);
logging(LOG_VERBOSE, "Verify residual overflow flag is set");
if (task->residual_status != SCSI_RESIDUAL_OVERFLOW) {
logging(LOG_VERBOSE, "[FAILED] Target did not set residual "
"overflow flag");
}
CU_ASSERT_EQUAL(task->residual_status, SCSI_RESIDUAL_OVERFLOW);
logging(LOG_VERBOSE, "Verify we got one block of residual overflow");
if (task->residual != block_size) {
logging(LOG_VERBOSE, "[FAILED] Target did not set correct "
"amount of residual. Expected %zu but got %zu.",
block_size, task->residual);
}
CU_ASSERT_EQUAL(task->residual, block_size);
scsi_free_scsi_task(task);
task = NULL;
logging(LOG_VERBOSE, "Read the two blocks");
READ16(sd, NULL, 0, 2* block_size, block_size, 0, 0, 0, 0, 0, buf,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Verify that the first block was changed to 'b'");
for (i = 0; i < block_size; i++) {
if (buf[i] != 'b') {
logging(LOG_NORMAL, "First block did not contain expected 'b'");
CU_FAIL("Block was not written correctly");
break;
}
}
logging(LOG_VERBOSE, "Verify that the second block was NOT overwritten and still contains 'a'");
for (i = block_size; i < 2 * block_size; i++) {
if (buf[i] != 'a') {
logging(LOG_NORMAL, "Second block was overwritten and no longer contain 'a'");
CU_FAIL("Second block was incorrectly overwritten");
break;
}
}
}
static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
{
UINT8 modrm = FETCH(cpustate);
UINT32 address, ea;
switch( (modrm >> 3) & 0x7 )
{
case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address, 1 );
} else {
ea = GetEA(cpustate,modrm,1);
}
WRITE16(cpustate,ea, cpustate->gdtr.limit);
WRITE32(cpustate,ea + 2, cpustate->gdtr.base);
CYCLES(cpustate,CYCLES_SGDT);
break;
}
case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address, 1 );
}
else
{
ea = GetEA(cpustate,modrm,1);
}
WRITE16(cpustate,ea, cpustate->idtr.limit);
WRITE32(cpustate,ea + 2, cpustate->idtr.base);
CYCLES(cpustate,CYCLES_SIDT);
break;
}
case 2: /* LGDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address, 0 );
} else {
ea = GetEA(cpustate,modrm,0);
}
cpustate->gdtr.limit = READ16(cpustate,ea);
cpustate->gdtr.base = READ32(cpustate,ea + 2);
CYCLES(cpustate,CYCLES_LGDT);
break;
}
case 3: /* LIDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address, 0 );
} else {
ea = GetEA(cpustate,modrm,0);
}
cpustate->idtr.limit = READ16(cpustate,ea);
cpustate->idtr.base = READ32(cpustate,ea + 2);
CYCLES(cpustate,CYCLES_LIDT);
break;
}
case 4: /* SMSW */
{
if( modrm >= 0xc0 ) {
STORE_RM32(modrm, cpustate->cr[0] & 0xffff);
CYCLES(cpustate,CYCLES_SMSW_REG);
} else {
/* always 16-bit memory operand */
ea = GetEA(cpustate,modrm,1);
WRITE16(cpustate,ea, cpustate->cr[0]);
CYCLES(cpustate,CYCLES_SMSW_MEM);
}
break;
}
case 7: /* INVLPG */
{
// Nothing to do ?
break;
}
default:
fatalerror("i486: unimplemented opcode 0x0f 01 /%d at %08X", (modrm >> 3) & 0x7, cpustate->eip - 2);
break;
}
}
void
xycom566setup(
int id,
int cbase,
int dbase,
int level,
int vec,
int bipol
){
xy566 *card;
volatile epicsUInt8 **cb;
volatile epicsUInt16 **db;
epicsUInt16 junk;
if(cbase<0 || cbase>0xffff){
printf("config (A16) out of range\n");
return;
}
if(dbase<0 || dbase>0xffffff){
printf("data (A24) out of range\n");
return;
}
if(level<0 || level>7){
printf("Level out of range (0->7)\n");
return;
}
if(vec<0 || vec>0xff){
printf("Vector out of range (0->255)\n");
return;
}
card=get566(id);
if(!!card){
printf("ID %d already exists\n",id);
return;
}
card=malloc(sizeof(xy566));
if(!card){
printf("Out of memory!\n");
return;
}
memset(&card->dlen,0,sizeof(card->dlen));
memset(&card->cb_irq,0,sizeof(card->cb_irq));
card->id=id;
card->fail=0;
card->clk_div=0; /* stc uninitialized */
card->use_seq_clk=0;
ellInit(&card->seq_ctor);
if(!bipol)
card->nchan=32;
else
card->nchan=16;
card->ivec=vec;
card->base_addr=cbase;
card->data_addr=dbase;
cb=&card->base;
db=&card->data_base;
if(devBusToLocalAddr(atVMEA16, card->base_addr, (volatile void **)cb)){
printf("Failed to map A16 %lx for card %x\n", (unsigned long)card->base_addr,id);
free(card);
return;
}
if(devBusToLocalAddr(atVMEA24, card->data_addr, (volatile void **)db)){
printf("Failed to map A24 %lx for card %x\n", (unsigned long)card->data_base,id);
free(card);
return;
}
if(devReadProbe(2, card->base+U16_XY566_CSR, &junk)){
printf("Failed to read A16 %lx for card %x\n", (unsigned long)(card->base+U16_XY566_CSR),id);
free(card);
return;
}
if(devReadProbe(2, card->data_base, &junk)){
printf("Failed to read A24 %lx for card %x\n", (unsigned long)(card->data_base),id);
free(card);
return;
}
WRITE16(card->base, XY566_CSR, XY566_CSR_RST); /* Reset */
/* turn on green and red to indicate init start */
WRITE16(card->base, XY566_CSR, XY566_CSR_GRN);
WRITE16(card->base, XY566_RAM, 0);
WRITE8(card->base, XY566_SEQ, 0);
card->guard=epicsMutexMustCreate();
scanIoInit(&card->seq_irq);
callbackSetCallback(xycom566isrcb, &card->cb_irq);
callbackSetPriority(priorityHigh, &card->cb_irq);
callbackSetUser(card, &card->cb_irq);
WRITE8(card->base, XY566_VEC, vec);
devEnableInterruptLevelVME(level);
assert(devConnectInterruptVME(vec, xycom566isr, card)==0);
/* Configure card
* Mode: continuous sequence (default)
* 16 bit conversion (default)
* sequence controller disable (will be enabled during drvsup init)
*/
WRITE16(card->base, XY566_CSR,
XY566_CSR_GRN);
ellAdd(&xy566s,&card->node);
}
void
test_extendedcopy_simple(void)
{
int tgt_desc_len = 0, seg_desc_len = 0, offset = XCOPY_DESC_OFFSET;
struct iscsi_data data;
unsigned char *xcopybuf;
unsigned int copied_blocks;
unsigned char *buf1;
unsigned char *buf2;
copied_blocks = num_blocks / 2;
if (copied_blocks > 2048)
copied_blocks = 2048;
buf1 = malloc(copied_blocks * block_size);
buf2 = malloc(copied_blocks * block_size);
logging(LOG_VERBOSE, LOG_BLANK_LINE);
logging(LOG_VERBOSE,
"Test EXTENDED COPY of %u blocks from start of LUN to end of LUN",
copied_blocks);
CHECK_FOR_DATALOSS;
logging(LOG_VERBOSE, "Write %u blocks of 'A' at LBA:0", copied_blocks);
memset(buf1, 'A', copied_blocks * block_size);
WRITE16(sd, 0, copied_blocks * block_size, block_size, 0, 0, 0, 0, 0,
buf1, EXPECT_STATUS_GOOD);
data.size = XCOPY_DESC_OFFSET +
get_desc_len(IDENT_DESCR_TGT_DESCR) +
get_desc_len(BLK_TO_BLK_SEG_DESCR);
data.data = alloca(data.size);
xcopybuf = data.data;
memset(xcopybuf, 0, data.size);
/* Initialize target descriptor list with one target descriptor */
offset += populate_tgt_desc(xcopybuf+offset, IDENT_DESCR_TGT_DESCR,
LU_ID_TYPE_LUN, 0, 0, 0, 0, sd);
tgt_desc_len = offset - XCOPY_DESC_OFFSET;
/* Iniitialize segment descriptor list with one segment descriptor */
offset += populate_seg_desc_b2b(xcopybuf+offset, 0, 0, 0, 0,
copied_blocks, 0, num_blocks - copied_blocks);
seg_desc_len = offset - XCOPY_DESC_OFFSET - tgt_desc_len;
/* Initialize the parameter list header */
populate_param_header(xcopybuf, 1, 0, LIST_ID_USAGE_DISCARD, 0,
tgt_desc_len, seg_desc_len, 0);
EXTENDEDCOPY(sd, &data, EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Read %u blocks from end of the LUN",
copied_blocks);
READ16(sd, NULL, num_blocks - copied_blocks, copied_blocks * block_size,
block_size, 0, 0, 0, 0, 0, buf2,
EXPECT_STATUS_GOOD);
if (memcmp(buf1, buf2, copied_blocks * block_size)) {
CU_FAIL("Blocks were not copied correctly");
}
free(buf1);
free(buf2);
}
/* ---------------------------------------------------------------------------
* Writes a Targa image to <fp> from <src>.
*
* Returns: TGA_NOERR on success, or a TGAERR_* code on failure.
* On failure, the contents of the file are not guaranteed
* to be valid.
*/
tga_result tga_write_to_FILE(FILE *fp, const tga_image *src)
{
#define WRITE(srcptr, size) \
if (fwrite(srcptr, size, 1, fp) != 1) return TGAERR_WRITE
#define WRITE16(src) \
{ uint16_t _temp = htole16(src); \
if (fwrite(&_temp, 2, 1, fp) != 1) return TGAERR_WRITE; }
WRITE(&src->image_id_length, 1);
if (src->color_map_type != TGA_COLOR_MAP_ABSENT &&
src->color_map_type != TGA_COLOR_MAP_PRESENT)
return TGAERR_CMAP_TYPE;
WRITE(&src->color_map_type, 1);
if (src->image_type == TGA_IMAGE_TYPE_NONE)
return TGAERR_NO_IMG;
if (src->image_type != TGA_IMAGE_TYPE_COLORMAP &&
src->image_type != TGA_IMAGE_TYPE_BGR &&
src->image_type != TGA_IMAGE_TYPE_MONO &&
src->image_type != TGA_IMAGE_TYPE_COLORMAP_RLE &&
src->image_type != TGA_IMAGE_TYPE_BGR_RLE &&
src->image_type != TGA_IMAGE_TYPE_MONO_RLE)
return TGAERR_IMG_TYPE;
WRITE(&src->image_type, 1);
if (tga_is_colormapped(src) &&
src->color_map_type == TGA_COLOR_MAP_ABSENT)
return TGAERR_CMAP_MISSING;
if (!tga_is_colormapped(src) &&
src->color_map_type == TGA_COLOR_MAP_PRESENT)
return TGAERR_CMAP_PRESENT;
if (src->color_map_type == TGA_COLOR_MAP_PRESENT)
{
if (src->color_map_length == 0)
return TGAERR_CMAP_LENGTH;
if (!UNMAP_DEPTH(src->color_map_depth))
return TGAERR_CMAP_DEPTH;
}
WRITE16(src->color_map_origin);
WRITE16(src->color_map_length);
WRITE(&src->color_map_depth, 1);
WRITE16(src->origin_x);
WRITE16(src->origin_y);
if (src->width == 0 || src->height == 0)
return TGAERR_ZERO_SIZE;
WRITE16(src->width);
WRITE16(src->height);
if (!SANE_DEPTH(src->pixel_depth) ||
(src->pixel_depth != 8 && tga_is_colormapped(src)) )
return TGAERR_PIXEL_DEPTH;
WRITE(&src->pixel_depth, 1);
WRITE(&src->image_descriptor, 1);
if (src->image_id_length > 0)
WRITE(&src->image_id, src->image_id_length);
if (src->color_map_type == TGA_COLOR_MAP_PRESENT)
WRITE(src->color_map_data +
(src->color_map_origin * src->color_map_depth / 8),
src->color_map_length * src->color_map_depth / 8);
if (tga_is_rle(src))
{
uint16_t row;
for (row=0; row<src->height; row++)
{
tga_result result = tga_write_row_RLE(fp, src,
src->image_data + row*src->width*src->pixel_depth/8);
if (result != TGA_NOERR) return result;
}
}
else
{
/* uncompressed */
WRITE(src->image_data,
src->width * src->height * src->pixel_depth / 8);
}
WRITE(tga_id, tga_id_length);
return TGA_NOERR;
#undef WRITE
#undef WRITE16
}
NS_IMETHODIMP nsZipWriter::Close()
{
if (!mStream)
return NS_ERROR_NOT_INITIALIZED;
if (mInQueue)
return NS_ERROR_IN_PROGRESS;
if (mCDSDirty) {
uint32_t size = 0;
for (int32_t i = 0; i < mHeaders.Count(); i++) {
nsresult rv = mHeaders[i]->WriteCDSHeader(mStream);
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
size += mHeaders[i]->GetCDSHeaderLength();
}
uint8_t buf[ZIP_EOCDR_HEADER_SIZE];
uint32_t pos = 0;
WRITE32(buf, &pos, ZIP_EOCDR_HEADER_SIGNATURE);
WRITE16(buf, &pos, 0);
WRITE16(buf, &pos, 0);
WRITE16(buf, &pos, mHeaders.Count());
WRITE16(buf, &pos, mHeaders.Count());
WRITE32(buf, &pos, size);
WRITE32(buf, &pos, mCDSOffset);
WRITE16(buf, &pos, mComment.Length());
nsresult rv = ZW_WriteData(mStream, (const char *)buf, pos);
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
rv = ZW_WriteData(mStream, mComment.get(), mComment.Length());
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
nsCOMPtr<nsISeekableStream> seekable = do_QueryInterface(mStream);
rv = seekable->SetEOF();
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
// Go back and rewrite the file headers
for (int32_t i = 0; i < mHeaders.Count(); i++) {
nsZipHeader *header = mHeaders[i];
if (!header->mWriteOnClose)
continue;
rv = seekable->Seek(nsISeekableStream::NS_SEEK_SET, header->mOffset);
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
rv = header->WriteFileHeader(mStream);
if (NS_FAILED(rv)) {
Cleanup();
return rv;
}
}
}
nsresult rv = mStream->Close();
mStream = nullptr;
mHeaders.Clear();
mEntryHash.Clear();
mQueue.Clear();
return rv;
}
static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
{
UINT8 modrm = FETCH(cpustate);
UINT16 address;
UINT32 ea;
switch( (modrm >> 3) & 0x7 )
{
case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
ea = i386_translate( cpustate, CS, address );
} else {
ea = GetEA(cpustate,modrm);
}
WRITE16(cpustate,ea, cpustate->gdtr.limit);
WRITE32(cpustate,ea + 2, cpustate->gdtr.base & 0xffffff);
CYCLES(cpustate,CYCLES_SGDT);
break;
}
case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
address = LOAD_RM16(modrm);
ea = i386_translate( cpustate, CS, address );
}
else
{
ea = GetEA(cpustate,modrm);
}
WRITE16(cpustate,ea, cpustate->idtr.limit);
WRITE32(cpustate,ea + 2, cpustate->idtr.base & 0xffffff);
CYCLES(cpustate,CYCLES_SIDT);
break;
}
case 2: /* LGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
ea = i386_translate( cpustate, CS, address );
} else {
ea = GetEA(cpustate,modrm);
}
cpustate->gdtr.limit = READ16(cpustate,ea);
cpustate->gdtr.base = READ32(cpustate,ea + 2) & 0xffffff;
CYCLES(cpustate,CYCLES_LGDT);
break;
}
case 3: /* LIDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
ea = i386_translate( cpustate, CS, address );
} else {
ea = GetEA(cpustate,modrm);
}
cpustate->idtr.limit = READ16(cpustate,ea);
cpustate->idtr.base = READ32(cpustate,ea + 2) & 0xffffff;
CYCLES(cpustate,CYCLES_LIDT);
break;
}
case 4: /* SMSW */
{
if( modrm >= 0xc0 ) {
STORE_RM16(modrm, cpustate->cr[0]);
CYCLES(cpustate,CYCLES_SMSW_REG);
} else {
ea = GetEA(cpustate,modrm);
WRITE16(cpustate,ea, cpustate->cr[0]);
CYCLES(cpustate,CYCLES_SMSW_MEM);
}
break;
}
case 6: /* LMSW */
{
// TODO: Check for protection fault
UINT8 b;
if( modrm >= 0xc0 ) {
b = LOAD_RM8(modrm);
CYCLES(cpustate,CYCLES_LMSW_REG);
} else {
ea = GetEA(cpustate,modrm);
CYCLES(cpustate,CYCLES_LMSW_MEM);
b = READ8(cpustate,ea);
}
cpustate->cr[0] &= ~0x03;
cpustate->cr[0] |= b & 0x03;
break;
}
case 7: /* INVLPG */
{
// Nothing to do ?
break;
}
default:
fatalerror("i486: unimplemented opcode 0x0f 01 /%d at %08X", (modrm >> 3) & 0x7, cpustate->eip - 2);
break;
}
}
static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
{
UINT8 modrm = FETCH(cpustate);
UINT32 address, ea;
switch( (modrm >> 3) & 0x7 )
{
case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address );
} else {
ea = GetEA(cpustate,modrm);
}
WRITE16(cpustate,ea, cpustate->gdtr.limit);
WRITE32(cpustate,ea + 2, cpustate->gdtr.base);
CYCLES(cpustate,CYCLES_SGDT);
break;
}
case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address );
}
else
{
ea = GetEA(cpustate,modrm);
}
WRITE16(cpustate,ea, cpustate->idtr.limit);
WRITE32(cpustate,ea + 2, cpustate->idtr.base);
CYCLES(cpustate,CYCLES_SIDT);
break;
}
case 2: /* LGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address );
} else {
ea = GetEA(cpustate,modrm);
}
cpustate->gdtr.limit = READ16(cpustate,ea);
cpustate->gdtr.base = READ32(cpustate,ea + 2);
CYCLES(cpustate,CYCLES_LGDT);
break;
}
case 3: /* LIDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
ea = i386_translate( cpustate, CS, address );
} else {
ea = GetEA(cpustate,modrm);
}
cpustate->idtr.limit = READ16(cpustate,ea);
cpustate->idtr.base = READ32(cpustate,ea + 2);
CYCLES(cpustate,CYCLES_LIDT);
break;
}
case 7: /* INVLPG */
{
// Nothing to do ?
break;
}
default:
fatalerror("i486: unimplemented opcode 0x0f 01 /%d at %08X", (modrm >> 3) & 0x7, cpustate->eip - 2);
break;
}
}
void
test_sanitize_block_erase(void)
{
struct iscsi_data data;
struct scsi_command_descriptor *cd;
unsigned char *buf = alloca(256 * block_size);
logging(LOG_VERBOSE, LOG_BLANK_LINE);
logging(LOG_VERBOSE, "Test SANITIZE BLOCK ERASE");
CHECK_FOR_SANITIZE;
CHECK_FOR_DATALOSS;
logging(LOG_VERBOSE, "Check that SANITIZE BLOCK_ERASE is supported "
"in REPORT_SUPPORTED_OPCODES");
cd = get_command_descriptor(SCSI_OPCODE_SANITIZE,
SCSI_SANITIZE_BLOCK_ERASE);
if (cd == NULL) {
logging(LOG_VERBOSE, "Opcode is not supported. Verify that "
"WABEREQ is zero.");
if (inq_bdc && inq_bdc->wabereq) {
logging(LOG_NORMAL, "[FAILED] WABEREQ is not 0 but "
"SANITIZE BLOCK ERASE opcode is not supported");
CU_FAIL("[FAILED] WABEREQ is not 0 but BLOCK ERASE "
"is not supported.");
}
logging(LOG_NORMAL, "[SKIPPED] SANITIZE BLOCK_ERASE is not "
"implemented according to REPORT_SUPPORTED_OPCODES.");
CU_PASS("SANITIZE is not implemented.");
return;
}
logging(LOG_VERBOSE, "Verify that we have BlockDeviceCharacteristics "
"VPD page.");
if (inq_bdc == NULL) {
logging(LOG_NORMAL, "[FAILED] SANITIZE BLOCK ERASE opcode is "
"supported but BlockDeviceCharacteristics VPD page is "
"missing");
CU_FAIL("[FAILED] BlockDeviceCharacteristics VPD "
"page is missing");
}
logging(LOG_VERBOSE, "Verify that we have READCAPACITY16");
if (!rc16) {
logging(LOG_NORMAL, "[FAILED] SANITIZE BLOCK ERASE opcode is "
"supported but READCAPACITY16 is missing.");
CU_FAIL("[FAILED] READCAPACITY16 is missing");
}
logging(LOG_VERBOSE, "Verify that logical block provisioning (LBPME) "
"is available.");
if (!rc16 || !(rc16->lbpme)) {
logging(LOG_NORMAL, "[FAILED] SANITIZE BLOCK ERASE opcode is "
"supported but LBPME==0.");
CU_FAIL("[FAILED] SANITIZE BLOCK ERASE opcode is "
"supported but LBPME==0.");
}
logging(LOG_VERBOSE, "Check MediumRotationRate whether this is a HDD "
"or a SSD device.");
if (inq_bdc && inq_bdc->medium_rotation_rate != 0) {
logging(LOG_NORMAL, "This is a HDD device");
logging(LOG_NORMAL, "[WARNING] SANITIZE BLOCK ERASE opcode is "
"supported but MediumRotationRate is not 0 "
"indicating that this is a HDD. Only SSDs should "
"implement BLOCK ERASE");
} else {
logging(LOG_NORMAL, "This is a HDD device");
}
logging(LOG_VERBOSE, "Write 'a' to the first 256 LBAs");
memset(scratch, 'a', 256 * block_size);
WRITE16(sd, 0, 256 * block_size,
block_size, 0, 0, 0, 0, 0, scratch,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Write 'a' to the last 256 LBAs");
WRITE16(sd, num_blocks - 256, 256 * block_size,
block_size, 0, 0, 0, 0, 0, scratch,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Test we can perform basic BLOCK ERASE SANITIZE");
SANITIZE(sd, 0, 0, SCSI_SANITIZE_BLOCK_ERASE, 0, NULL,
EXPECT_STATUS_GOOD);
logging(LOG_VERBOSE, "Check that the first 256 LBAs are wiped.");
check_lun_is_wiped(buf, 0);
logging(LOG_VERBOSE, "Check that the last 256 LBAs are wiped.");
check_lun_is_wiped(buf, num_blocks - 256);
data.size = 8;
data.data = alloca(data.size);
memset(data.data, 0, data.size);
logging(LOG_VERBOSE, "BLOCK_ERASE parameter list length must be 0");
logging(LOG_VERBOSE, "Test that non-zero param length is an error for "
"BLOCK ERASE");
SANITIZE(sd, 0, 0, SCSI_SANITIZE_BLOCK_ERASE, 8, &data,
EXPECT_INVALID_FIELD_IN_CDB);
if (inq_bdc) {
logging(LOG_VERBOSE, "Check WABEREQ setting and that READ "
"after SANITIZE works correctly.");
check_wabereq();
}
logging(LOG_VERBOSE, "Verify that all blocks are unmapped after "
"SANITIZE BLOCK_ERASE");
check_unmap();
}
if (state)
{
if (m_ext_active && (m_ext_start < m_ext_stop))
{
m_dac[3]->write(m_ext_base[m_ext_start]);
m_ext_start++;
}
}
set_clock_line(7, state);
}
MACHINE_CONFIG_START(leland_80186_sound_device::device_add_mconfig)
MCFG_DEVICE_ADD("audiocpu", I80186, 16_MHz_XTAL)
MCFG_DEVICE_PROGRAM_MAP(leland_80186_map_program)
MCFG_DEVICE_IO_MAP(leland_80186_map_io)
MCFG_80186_CHIP_SELECT_CB(WRITE16(*this, leland_80186_sound_device, peripheral_ctrl))
MCFG_80186_TMROUT0_HANDLER(WRITELINE(*this, leland_80186_sound_device, i80186_tmr0_w))
SPEAKER(config, "speaker").front_center();
MCFG_DEVICE_ADD("dac1", AD7524, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2) // 74hc374.u31 + ad7524.u46
MCFG_DEVICE_ADD("dac2", AD7524, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2) // 74hc374.u32 + ad7524.u47
MCFG_DEVICE_ADD("dac3", AD7524, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2) // 74hc374.u33 + ad7524.u48
MCFG_DEVICE_ADD("dac4", AD7524, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2) // 74hc374.u34 + ad7524.u49
MCFG_DEVICE_ADD("dac5", AD7524, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2) // 74hc374.u35 + ad7524.u50
MCFG_DEVICE_ADD("dac6", AD7524, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2) // 74hc374.u36 + ad7524.u51
MCFG_DEVICE_ADD("dac9", AD7533, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) // ad7533.u64
MCFG_DEVICE_ADD("dac1vol", DAC_8BIT_BINARY_WEIGHTED, 0) MCFG_SOUND_ROUTE(0, "dac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac1", -1.0, DAC_VREF_NEG_INPUT) // 74hc374.u17 + r2-r9 (24k,12k,6.2k,3k,1.5k,750,360,160)
MCFG_DEVICE_ADD("dac2vol", DAC_8BIT_BINARY_WEIGHTED, 0) MCFG_SOUND_ROUTE(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac2", -1.0, DAC_VREF_NEG_INPUT) // 74hc374.u18 + r12-r19 (24k,12k,6.2k,3k,1.5k,750,360,160)
MCFG_DEVICE_ADD("dac3vol", DAC_8BIT_BINARY_WEIGHTED, 0) MCFG_SOUND_ROUTE(0, "dac3", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac3", -1.0, DAC_VREF_NEG_INPUT) // 74hc374.u19 + r22-r29 (24k,12k,6.2k,3k,1.5k,750,360,160)
MCFG_DEVICE_ADD("dac4vol", DAC_8BIT_BINARY_WEIGHTED, 0) MCFG_SOUND_ROUTE(0, "dac4", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac4", -1.0, DAC_VREF_NEG_INPUT) // 74hc374.u20 + r32-r39 (24k,12k,6.2k,3k,1.5k,750,360,160)
MCFG_DEVICE_ADD("dac5vol", DAC_8BIT_BINARY_WEIGHTED, 0) MCFG_SOUND_ROUTE(0, "dac5", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac5", -1.0, DAC_VREF_NEG_INPUT) // 74hc374.u21 + r42-r49 (24k,12k,6.2k,3k,1.5k,750,360,160)
