boolean CDWHCIDevice::EnableRootPort (void)
{
CDWHCIRegister HostPort (DWHCI_HOST_PORT);
if (!WaitForBit (&HostPort, DWHCI_HOST_PORT_CONNECT, TRUE, 20))
{
return FALSE;
}
m_pTimer->MsDelay (100); // see USB 2.0 spec
HostPort.Read ();
HostPort.And (~DWHCI_HOST_PORT_DEFAULT_MASK);
HostPort.Or (DWHCI_HOST_PORT_RESET);
HostPort.Write ();
m_pTimer->MsDelay (50); // see USB 2.0 spec (tDRSTR)
HostPort.Read ();
HostPort.And (~DWHCI_HOST_PORT_DEFAULT_MASK);
HostPort.And (~DWHCI_HOST_PORT_RESET);
HostPort.Write ();
// normally 10ms, seems to be too short for some devices
m_pTimer->MsDelay (20); // see USB 2.0 spec (tRSTRCY)
return TRUE;
}
/************************************************************************
Name: ata_ctrl_SelectDevice
Description: Attempts to select the device by writing to the Device/Header reg.
Also delays the mandatory 400 ns to ensure subsequent device access is
safe
Parameters: Two params:
Ata_p : Pointer to the ATA control block
Device: number identifying the device (0,1)
************************************************************************/
BOOL ata_ctrl_SelectDevice(ata_ControlBlock_t *Ata_p, U8 Device)
{
U8 data;
/* First wait for not busy (BSY=0)... */
if(WaitForBit(Ata_p->HalHndl,ATA_REG_STATUS,BSY_BIT_MASK,0))
{
Ata_p->LastExtendedErrorCode=0x11;
return TRUE;
}
/* ..then wait for DRQ=0 */
if(WaitForBit(Ata_p->HalHndl,ATA_REG_STATUS,DRQ_BIT_MASK,0))
{
Ata_p->LastExtendedErrorCode=0x12;
return TRUE;
}
data= hal_RegInByte(Ata_p->HalHndl,ATA_REG_DEVHEAD);
if(Device==DEVICE_0) data= data & ~BIT_4;
else data= data | BIT_4;
hal_RegOutByte(Ata_p->HalHndl,ATA_REG_DEVHEAD,data);
WAIT400NS;
/* First wait for not busy (BSY=0)... */
if(WaitForBit(Ata_p->HalHndl,ATA_REG_STATUS,BSY_BIT_MASK,0))
{
Ata_p->LastExtendedErrorCode=0x11;
return TRUE;
}
/* ...then wait for DRQ=0 */
if(WaitForBit(Ata_p->HalHndl,ATA_REG_STATUS,DRQ_BIT_MASK,0))
{
Ata_p->LastExtendedErrorCode=0x12;
return TRUE;
}
return FALSE;
}
void CDWHCIDevice::FlushRxFIFO (void)
{
CDWHCIRegister Reset (DWHCI_CORE_RESET, 0);
Reset.Or (DWHCI_CORE_RESET_RX_FIFO_FLUSH);
Reset.Write ();
if (!WaitForBit (&Reset, DWHCI_CORE_RESET_RX_FIFO_FLUSH, FALSE, 10))
{
return;
}
m_pTimer->usDelay (1); // Wait for 3 PHY clocks
}
boolean CDWHCIDevice::Reset (void)
{
CDWHCIRegister Reset (DWHCI_CORE_RESET, 0);
// wait for AHB master IDLE state
if (!WaitForBit (&Reset, DWHCI_CORE_RESET_AHB_IDLE, TRUE, 100))
{
return FALSE;
}
// core soft reset
Reset.Or (DWHCI_CORE_RESET_SOFT_RESET);
Reset.Write ();
if (!WaitForBit (&Reset, DWHCI_CORE_RESET_SOFT_RESET, FALSE, 10))
{
return FALSE;
}
m_pTimer->MsDelay (100);
return TRUE;
}
void CDWHCIDevice::FlushTxFIFO (unsigned nFIFO)
{
CDWHCIRegister Reset (DWHCI_CORE_RESET, 0);
Reset.Or (DWHCI_CORE_RESET_TX_FIFO_FLUSH);
Reset.And (~DWHCI_CORE_RESET_TX_FIFO_NUM__MASK);
Reset.Or (nFIFO << DWHCI_CORE_RESET_TX_FIFO_NUM__SHIFT);
Reset.Write ();
if (!WaitForBit (&Reset, DWHCI_CORE_RESET_TX_FIFO_FLUSH, FALSE, 10))
{
return;
}
m_pTimer->usDelay (1); // Wait for 3 PHY clocks
}
/************************************************************************
Name: ata_ctrl_SoftReset
Description: Pulses the SRST bit in the DeviceCtrl register high for 400 ns and
then low. Delays for mandatory 400ns afterwards
Parameters: Two params:
Ata_p : Pointer to the ATA control block
Device: number identifying the device (0,1)
************************************************************************/
BOOL ata_ctrl_SoftReset(ata_ControlBlock_t *Ata_p)
{
S32 TimeOut=ATA_TIMEOUT;
U8 sc, sn;
if (hal_SoftReset(Ata_p->HalHndl) == TRUE)
{
#if defined(ATAPI_DEBUG)
if (ATAPI_Verbose)
{
STTBX_Print(("ata_ctrl_SoftReset(): hal_SoftReset failed\n"));
}
#endif
return TRUE;
}
/*RESET DONE. This causes device 0 be selected.*/
/* If there is a device 0, wait for device 0 to set BSY=0.*/
if(Ata_p->DevInBus[0] != NONE_DEVICE)
{
if(WaitForBit(Ata_p->HalHndl, ATA_REG_STATUS, BSY_BIT_MASK, 0))
{
Ata_p->LastExtendedErrorCode = 0x01;
return TRUE;
}
}
/* If there is a device 1, wait until device 1 allows
register access.*/
if(Ata_p->DevInBus[1] != NONE_DEVICE)
{
/* Select the device */
hal_RegOutByte(Ata_p->HalHndl, ATA_REG_DEVHEAD, DEVHEAD_DEV1);
WAIT400NS;
while(TimeOut >= 0)
{
sn = hal_RegInByte(Ata_p->HalHndl, ATA_REG_SECNUM);
sc = hal_RegInByte(Ata_p->HalHndl, ATA_REG_SECCOUNT);
if ((sn == 0x01) && (sc == 0x01))
break;
TimeOut--;
}
if(TimeOut<0)
{
Ata_p->LastExtendedErrorCode = 0x02;
return TRUE;
}
/* Now wait for device 1 to set BSY=0 */
if(WaitForBit(Ata_p->HalHndl, ATA_REG_STATUS, BSY_BIT_MASK, 0))
{
Ata_p->LastExtendedErrorCode = 0x03;
return TRUE;
}
}
return FALSE;
}
