void SCdrv_SendTxData( BYTE data )
{
BYTE txRetryCounter = 0;
BOOL noError = TRUE;
U1STAbits.UTXEN = 1;
U1TXREG = data;
while( !U1STAbits.TRMT )
{
Nop();
Nop();
}
U1STAbits.UTXEN = 0;
U1MODEbits.UARTEN = 0; // Disable UART Module
WaitMicroSec( 1 );
if( !SCdrv_GetRxPinData() ) // The Receiver did not like our data. it is pulling line low
{ // to indicate PE or FR errors
noError = FALSE;
// WaitMicroSec((U1BRG * 170)/371); //wait two etu before repeating
U1MODEbits.UARTEN = 1;
//now retransmit the data
if( txRetryCounter < 5 )
{
txRetryCounter++;
SCdrv_SendTxData(data);
}
}
else
{
// WaitMicroSec((U1BRG * 140)/371); //wait 1.5 etu
}
if( noError ) //no error detected
txRetryCounter = 0;
U1MODEbits.UARTEN = 1; // Enable UART Module
U1STAbits.OERR = 0; //clear any overflow error that we caused
while(1) // remove rx data recvd from our Tx line
{
WORD temp;
if( U1STAbits.URXDA )
temp = U1RXREG;
else
break;
}
}
BOOL SCdrv_GetRxData( BYTE* pDat, unsigned long nTrys )
{
//wait for data byte
while( !U1STAbits.URXDA && nTrys-- );
if( !U1STAbits.URXDA )
return FALSE;
if( U1STAbits.PERR ) //Parity Error detected
{
SCdrv_TxPin_Direction(0); //pull it low to tell the card that there was error receiving data
#if defined(__PIC24F__)
U1MODEbits.RXINV = 1; //do not recognize this low state as a valid start bit
#elif defined(__PIC24H__)
U1MODEbits.URXINV = 1; //do not recognize this low state as a valid start bit
#endif
//Read the data from UART to clear the error flag
*pDat = U1RXREG;
WaitMicroSec((U1BRG * 116)/371); //for 9600 baud, 116 us. for 250kbps, 5us
SCdrv_TxPin_Direction(1); //release RD10. Card should retransmit now.
#if defined(__PIC24F__)
U1MODEbits.RXINV = 0;
#elif defined(__PIC24H__)
U1MODEbits.URXINV = 0;
#endif
return SCdrv_GetRxData(pDat, 10000); //Read the data from retransmission
}
else
{
//Read the data from UART
*pDat = U1RXREG;
}
return TRUE;
}
/*
Set DRAM Frequency
*/
void DRAMFreqSetting(DRAM_SYS_ATTR * DramAttr)
{
u8 Data = 0;
PRINT_DEBUG_MEM("Dram Frequency setting \r");
//calculate dram frequency using SPD data
CalcCLAndFreq(DramAttr);
//init some Dramc control by Simon Chu slide
//Must use "CPU delay" to make sure VLINK is dis-connect
Data = pci_read_config8(PCI_DEV(0, 0, 7), 0x47);
Data = (u8) (Data | 0x04);
pci_write_config8(PCI_DEV(0, 0, 7), 0x47, Data);
//in order to make sure NB command buffer don`t have pending request(C2P cycle)
//CPU DELAY
WaitMicroSec(20);
//Before Set Dram Frequency, we must set 111 by Simon Chu slide.
Data = pci_read_config8(MEMCTRL, 0x90);
Data = (u8) ((Data & 0xf8) | 7);
pci_write_config8(MEMCTRL, 0x90, Data);
WaitMicroSec(20);
//Set Dram Frequency.
Data = pci_read_config8(MEMCTRL, 0x90);
switch (DramAttr->DramFreq) {
case DIMMFREQ_400:
Data = (u8) ((Data & 0xf8) | 3);
break;
case DIMMFREQ_533:
Data = (u8) ((Data & 0xf8) | 4);
break;
case DIMMFREQ_667:
Data = (u8) ((Data & 0xf8) | 5);
break;
case DIMMFREQ_800:
Data = (u8) ((Data & 0xf8) | 6);
break;
default:
Data = (u8) ((Data & 0xf8) | 1);
}
pci_write_config8(MEMCTRL, 0x90, Data);
//CPU Delay
WaitMicroSec(20);
// Manual reset and adjust DLL when DRAM change frequency
Data = pci_read_config8(MEMCTRL, 0x6B);
Data = (u8) ((Data & 0x2f) | 0xC0);
pci_write_config8(MEMCTRL, 0x6B, Data);
//CPU Delay
WaitMicroSec(20);
Data = pci_read_config8(MEMCTRL, 0x6B);
Data = (u8) (Data | 0x10);
pci_write_config8(MEMCTRL, 0x6B, Data);
//CPU Delay
WaitMicroSec(20);
Data = pci_read_config8(MEMCTRL, 0x6B);
Data = (u8) (Data & 0x3f);
pci_write_config8(MEMCTRL, 0x6B, Data);
//disable V_LINK Auto-Disconnect, or else program may stopped at some place and
//we cannot find the reason
Data = pci_read_config8(PCI_DEV(0, 0, 7), 0x47);
Data = (u8) (Data & 0xFB);
pci_write_config8(PCI_DEV(0, 0, 7), 0x47, Data);
}
