static void WakeUpFromD3(void)
{
TPI_DEBUG_PRINT(("Waking up...\n"));
InitializeStateVariables();
WriteInitialRegisterValues();
}
bool_t SiiMhlTxChipInitialize ( void )
{
unsigned int initState = 0;
tmdsPowRdy = false;
mscCmdInProgress = false;
dsHpdStatus = 0;
fwPowerState = POWER_STATE_D0_NO_MHL;
SI_OS_DISABLE_DEBUG_CHANNEL(SII_OSAL_DEBUG_SCHEDULER);
//memset(&video_data, 0x00, sizeof(video_data));
video_data.inputColorSpace = COLOR_SPACE_RGB;
video_data.outputColorSpace = COLOR_SPACE_RGB;
video_data.outputVideoCode = 2;
video_data.inputcolorimetryAspectRatio = 0x18;
video_data.outputcolorimetryAspectRatio = 0x18;
video_data.output_AR = 0;
//SiiMhlTxHwReset(TX_HW_RESET_PERIOD,TX_HW_RESET_DELAY);
//SiiCraInitialize();
initState = (SiiRegRead(TX_PAGE_L0 | 0x03) << 8) | SiiRegRead(TX_PAGE_L0 | 0x02);
//TX_DEBUG_PRINT(("Drv: SiiMhlTxChipInitialize: %02X%02x\n",
// SiiRegRead(TX_PAGE_L0 | 0x03),
// SiiRegRead(TX_PAGE_L0 | 0x02)));
TX_DEBUG_PRINT(("Drv: SiiMhlTxChipInitialize: 0x%04X\n", initState));
WriteInitialRegisterValues();
#ifndef __KERNEL__
SiiOsMhlTxInterruptEnable();
#endif
SwitchToD3();
if (0xFFFF == initState)//0x8356
{
return false;
}
return true;
}
void SwitchToD0( void )
{
TX_DEBUG_PRINT(("Switch to D0\n"));
WriteInitialRegisterValues();
STROBE_POWER_ON;
fwPowerState = POWER_STATE_D0_NO_MHL;
AudioVideoIsr(true);
}
////////////////////////////////////////////////////////////////////
// SwitchToD0
// This function performs s/w as well as h/w state transitions.
//
// Chip comes up in D2. Firmware must first bring it to full operation
// mode in D0.
////////////////////////////////////////////////////////////////////
void SwitchToD0 (void)
{
TX_DEBUG_PRINT(("Drv: Switch to D0\n"));
// TX_DEBUG_PRINT(("[%d] Drv: Switch To Full power mode (D0)\n",
// (int) (HalTimerElapsed( ELAPSED_TIMER ) * MONITORING_PERIOD)) );
//
// WriteInitialRegisterValues switches the chip to full power mode.
//
WriteInitialRegisterValues();
// Force Power State to ON
STROBE_POWER_ON // Force Power State to ON
SiiRegModify(TPI_DEVICE_POWER_STATE_CTRL_REG, TX_POWER_STATE_MASK, 0x00);
fwPowerState = POWER_STATE_D0_NO_MHL;
}
bool TPI_Init(void)
{
TPI_DEBUG_PRINT(("9232 SK "));
TPI_DEBUG_PRINT(("(X04)"));
TPI_DEBUG_PRINT((" FW 0.22\n"));
txPowerState = TX_POWER_STATE_D0;
InitializeStateVariables();
TxHW_Reset();
WriteInitialRegisterValues();
I2C_WriteByte(TPI_SLAVE_ADDR, 0x7A, 0x14);
if (!StartTPI()) {
return false;
}
if (!ProductID_Read()) {
return false;
}
hdcp_init(mhl_tpi_info);
MHLCableConnected = FALSE;
hdmiCableConnected = false;
OnDownstreamRxPoweredDown();
WriteIndexedRegister(0x01, 0xA0, 0xD0);
TPI_DEBUG_PRINT(("\ncalling CpCbusInitialize\n\n"));
CpCbusInitialize(mhl_tpi_info);
hdcp_off();
TxPowerStateD3();
MHLCableConnected = false;
hdmiCableConnected = false;
dsRxPoweredUp = false;
bInTpiMode =false;
txPowerState = txpsD3;
return true;
}
bool_t SiiMhlTxChipInitialize (void)
{
tmdsPoweredUp = false;
mhlConnected = false;
mscCmdInProgress = false; // false when it is okay to send a new command
dsHpdStatus = 0;
fwPowerState = POWER_STATE_FIRST_INIT;
//SI_OS_DISABLE_DEBUG_CHANNEL(SII_OSAL_DEBUG_SCHEDULER);
g_chipRevId = SiiRegRead(REG_DEV_REV);
// then wait 100ms per MHL spec
HalTimerWait(TX_HW_RESET_DELAY);
TX_DEBUG_PRINT(("Drv: SiiMhlTxChipInitialize: %02X%02X%02x\n",
g_chipRevId,
SiiRegRead(TX_PAGE_L0 | 0x03),
SiiRegRead(TX_PAGE_L0 | 0x02)));
// setup device registers. Ensure RGND interrupt would happen.
WriteInitialRegisterValues();
//SiiOsMhlTxInterruptEnable();
// CBUS interrupts are unmasked after performing the reset.
// UNMASK_CBUS1_INTERRUPTS;
// UNMASK_CBUS2_INTERRUPTS;
//
// Allow regular operation - i.e. pinAllowD3 is high so we do enter
// D3 first time. Later on, SiIMon shall control this GPIO.
//
//pinAllowD3 = 1;
SwitchToD3();
return true;
}
