/**
*
* This function sets up the DMA engine to be ready for scatter gather transfer
*
* @param InstancePtr is pointer to the XAxiCdma instance.
*
* @return
* - XST_SUCCESS if the setup is successful
* - XST_FAILURE if error occurs
*
* @note None
*
******************************************************************************/
static int SetupTransfer(XAxiCdma * InstancePtr)
{
int Status;
XAxiCdma_Bd BdTemplate;
int BdCount;
u8 *SrcBufferPtr;
int Index;
/* Disable all interrupts
*/
XAxiCdma_IntrDisable(InstancePtr, XAXICDMA_XR_IRQ_ALL_MASK);
/* Setup BD ring */
BdCount = XAxiCdma_BdRingCntCalc(XAXICDMA_BD_MINIMUM_ALIGNMENT,
BD_SPACE_HIGH - BD_SPACE_BASE + 1,
(u32)BD_SPACE_BASE);
Status = XAxiCdma_BdRingCreate(InstancePtr, BD_SPACE_BASE,
BD_SPACE_BASE, XAXICDMA_BD_MINIMUM_ALIGNMENT, BdCount);
if (Status != XST_SUCCESS) {
xdbg_printf(XDBG_DEBUG_ERROR, "Create BD ring failed %d\r\n",
Status);
return XST_FAILURE;
}
/*
* Setup a BD template to copy to every BD.
*/
XAxiCdma_BdClear(&BdTemplate);
Status = XAxiCdma_BdRingClone(InstancePtr, &BdTemplate);
if (Status != XST_SUCCESS) {
xdbg_printf(XDBG_DEBUG_ERROR, "Clone BD ring failed %d\r\n",
Status);
return XST_FAILURE;
}
/* Initialize receive buffer to 0's and transmit buffer with pattern
*/
memset((void *)ReceiveBufferPtr, 0,
MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
SrcBufferPtr = (u8 *)TransmitBufferPtr;
for(Index = 0; Index < MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER; Index++) {
SrcBufferPtr[Index] = Index & 0xFF;
}
/* Flush the SrcBuffer before the DMA transfer, in case the Data Cache
* is enabled
*/
Xil_DCacheFlushRange((UINTPTR)TransmitBufferPtr,
MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
#ifdef __aarch64__
Xil_DCacheFlushRange((UINTPTR)ReceiveBufferPtr,
MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
#endif
return XST_SUCCESS;
}
Hint dma_create(XAxiCdma * dma, u16 DeviceId)
{
XAxiCdma_Config CdmaCfgPtr;
CdmaCfgPtr.DeviceId = SLAVE_LOCAL_DMA_DEVICE_ID;
CdmaCfgPtr.BaseAddress = SLAVE_LOCAL_DMA_BASEADDR;
CdmaCfgPtr.HasDRE = SLAVE_LOCAL_DMA_INCLUDE_DRE;
CdmaCfgPtr.IsLite = SLAVE_LOCAL_DMA_USE_DATAMOVER_LITE;
CdmaCfgPtr.DataWidth = SLAVE_LOCAL_DMA_M_AXI_DATA_WIDTH;
CdmaCfgPtr.BurstLen = SLAVE_LOCAL_DMA_M_AXI_MAX_BURST_LEN;
// Initialize the DMA driver and reset the dma device (done in Initialize)
Hint Status = XAxiCdma_CfgInitialize(dma, (XAxiCdma_Config *) &CdmaCfgPtr, CdmaCfgPtr.BaseAddress);
if (Status != XST_SUCCESS)
return FAILURE;
XAxiCdma_IntrDisable(dma, XAXICDMA_XR_IRQ_ALL_MASK);
return SUCCESS;
}
/**
* The example to do the simple transfer through polling. The constant
* NUMBER_OF_TRANSFERS defines how many times a simple transfer is repeated.
*
* @param DeviceId is the Device Id of the XAxiCdma instance
*
* @return
* - XST_SUCCESS if example finishes successfully
* - XST_FAILURE if error occurs
*
* @note If the hardware build has problems with interrupt,
* then this function hangs
*
*
******************************************************************************/
int XAxiCdma_SimplePollExample(u16 DeviceId)
{
XAxiCdma_Config *CfgPtr;
int Status;
int SubmitTries = 10; /* try 10 times on submission */
int Tries = NUMBER_OF_TRANSFERS;
int Index;
/* Initialize the XAxiCdma device.
*/
CfgPtr = XAxiCdma_LookupConfig(DeviceId);
if (!CfgPtr) {
return XST_FAILURE;
}
Status = XAxiCdma_CfgInitialize(&AxiCdmaInstance, CfgPtr,
CfgPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/* Disable interrupts, we use polling mode
*/
XAxiCdma_IntrDisable(&AxiCdmaInstance, XAXICDMA_XR_IRQ_ALL_MASK);
for (Index = 0; Index < Tries; Index++) {
Status = DoSimplePollTransfer(&AxiCdmaInstance,
BUFFER_BYTESIZE, SubmitTries);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
}
/* Test finishes successfully
*/
return XST_SUCCESS;
}
/**
* This function transfers data from Source Address to Destination Address
* using the AXI CDMA.
* User has to specify the Source Address, Destination Address and Transfer
* Length in AXICDMA_SRC_ADDR, AXICDMA_DEST_ADDR and AXICDMA_LENGTH defines
* respectively.
*
* @param DeviceId is device ID of the XAxiCdma Device.
*
* @return - XST_SUCCESS if successful
* - XST_FAILURE.if unsuccessful.
*
* @note If the hardware system is not built correctly, this function
* may never return to the caller.
*
******************************************************************************/
int DmaDataTransfer (u16 DeviceID)
{
int Status;
volatile int Error;
XAxiCdma_Config *ConfigPtr;
Error = 0;
/*
* Make sure we have a valid addresses for Src and Dst.
*/
if (AXICDMA_SRC_ADDR == 0) {
return XST_FAILURE;
}
if (AXICDMA_DEST_ADDR == 0) {
return XST_FAILURE;
}
/*
* Initialize the AXI CDMA IP.
*/
ConfigPtr = XAxiCdma_LookupConfig(DeviceID);
if (ConfigPtr == NULL) {
return XST_FAILURE;
}
Status = XAxiCdma_CfgInitialize(&CdmaInstance,
ConfigPtr, ConfigPtr->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Reset the AXI CDMA device.
*/
XAxiCdma_Reset(&CdmaInstance);
/*
* Disable AXI CDMA Interrupts
*/
XAxiCdma_IntrDisable(&CdmaInstance, XAXICDMA_XR_IRQ_ALL_MASK);
/*
* Start Transferring Data from source to destination in polled mode
*/
XAxiCdma_SimpleTransfer (&CdmaInstance, AXICDMA_SRC_ADDR,
AXICDMA_DEST_ADDR, AXICDMA_LENGTH, 0, 0);
/*
* Poll Status register waiting for either Completion or Error
*/
while (XAxiCdma_IsBusy(&CdmaInstance));
Error = XAxiCdma_GetError(&CdmaInstance);
if (Error != 0x0) {
xil_printf("AXI CDMA Transfer Error = %8.8x\r\n");
return XST_FAILURE;
}
xil_printf("AXI CDMA Transfer is Complete\r\n");
return XST_SUCCESS;
}
void * foo_thread(void * arg)
{
data * package = (data *) arg;
Hint * dataA = package->dataA;
Hint * dataB = package->dataB;
Hint * dataC = package->dataC;
Hint * brama = (Hint *) BRAMA;
Hint * bramb = (Hint *) BRAMB;
Hint * bramc = (Hint *) BRAMC;
int e,Status;
int time = package->time;
XTmrCtr * mytimer =package->timer;
XAxiCdma mydma;
#ifndef HETERO_COMPILATION
Status= XAxiCdma_Initialize(&mydma, XPAR_PERIPHERALS_CENTRAL_DMA_DEVICE_ID);
#else
Status= XAxiCdma_Initialize(&mydma,XPAR_GROUP_0_SLAVE_0_LOCAL_DMA_DEVICE_ID);
#endif
if (Status != XST_SUCCESS) {
putnum(0xdeadbeef);
return XST_FAILURE;
}
XAxiCdma_IntrDisable(&mydma, XAXICDMA_XR_IRQ_ALL_MASK);
XTmrCtr_Reset(mytimer,1);
//sending the data **********************************************
/*for (e = 0; e < package->vector_size; e++) {
brama[e] = dataA[e];
bramb[e] = dataB[e]; }
*/
Status = XAxiCdma_Transfer(&mydma, (u32) package->dataA , (u32) BRAMA, package->vector_size *4, NULL, NULL);
Status = XAxiCdma_Transfer(&mydma, (u32) package->dataB , (u32) BRAMB, package->vector_size *4, NULL, NULL);
//computation
// for (e = 0; e < package->vector_size; e++) bramc[e] = brama[e] + bramb[e];
/*
int cmd =1; //1=> means add, 2=> means subtraction
int start =0;
int end = package->vector_size ;
putfslx( cmd, 0, FSL_DEFAULT);
putfslx( end, 0, FSL_DEFAULT);
putfslx( start, 0, FSL_DEFAULT);
getfslx(cmd, 0, FSL_DEFAULT);
*/
putfslx((0 << 30) | (SIZE << 15) | 0, 0, FSL_DEFAULT);
getfslx(e, 0, FSL_DEFAULT);
//sending the data back to dram **********************************************
Status = XAxiCdma_Transfer(&mydma, (u32) BRAMC , (u32) package->dataC, package->vector_size *4, NULL, NULL);
// for (e = 0; e < package->vector_size; e++) dataC[e] = bramc[e];
package->time= XTmrCtr_GetValue(mytimer,1);
return (void *) 0;
}
void wlan_mac_util_init( u32 type, u32 eth_dev_num ){
int Status;
u32 i;
u32 gpio_read;
u32 queue_len;
u64 timestamp;
u32 log_size;
tx_frame_info* tx_mpdu;
// Initialize callbacks
eth_rx_callback = (function_ptr_t)nullCallback;
mpdu_rx_callback = (function_ptr_t)nullCallback;
fcs_bad_rx_callback = (function_ptr_t)nullCallback;
mpdu_tx_done_callback = (function_ptr_t)nullCallback;
pb_u_callback = (function_ptr_t)nullCallback;
pb_m_callback = (function_ptr_t)nullCallback;
pb_d_callback = (function_ptr_t)nullCallback;
uart_callback = (function_ptr_t)nullCallback;
ipc_rx_callback = (function_ptr_t)nullCallback;
check_queue_callback = (function_ptr_t)nullCallback;
mpdu_tx_accept_callback = (function_ptr_t)nullCallback;
wlan_mac_ipc_init();
for(i=0;i < NUM_TX_PKT_BUFS; i++){
tx_mpdu = (tx_frame_info*)TX_PKT_BUF_TO_ADDR(i);
tx_mpdu->state = TX_MPDU_STATE_EMPTY;
}
tx_pkt_buf = 0;
#ifdef _DEBUG_
xil_printf("locking tx_pkt_buf = %d\n", tx_pkt_buf);
#endif
if(lock_pkt_buf_tx(tx_pkt_buf) != PKT_BUF_MUTEX_SUCCESS){
warp_printf(PL_ERROR,"Error: unable to lock pkt_buf %d\n",tx_pkt_buf);
}
tx_mpdu = (tx_frame_info*)TX_PKT_BUF_TO_ADDR(tx_pkt_buf);
tx_mpdu->state = TX_MPDU_STATE_TX_PENDING;
//Initialize the central DMA (CDMA) driver
XAxiCdma_Config *cdma_cfg_ptr;
cdma_cfg_ptr = XAxiCdma_LookupConfig(XPAR_AXI_CDMA_0_DEVICE_ID);
Status = XAxiCdma_CfgInitialize(&cdma_inst, cdma_cfg_ptr, cdma_cfg_ptr->BaseAddress);
if (Status != XST_SUCCESS) {
warp_printf(PL_ERROR,"Error initializing CDMA: %d\n", Status);
}
XAxiCdma_IntrDisable(&cdma_inst, XAXICDMA_XR_IRQ_ALL_MASK);
Status = XGpio_Initialize(&Gpio, GPIO_DEVICE_ID);
gpio_timestamp_initialize();
if (Status != XST_SUCCESS) {
warp_printf(PL_ERROR, "Error initializing GPIO\n");
return;
}
Status = XUartLite_Initialize(&UartLite, UARTLITE_DEVICE_ID);
if (Status != XST_SUCCESS) {
warp_printf(PL_ERROR, "Error initializing XUartLite\n");
return;
}
gpio_read = XGpio_DiscreteRead(&Gpio, GPIO_INPUT_CHANNEL);
if(gpio_read&GPIO_MASK_DRAM_INIT_DONE){
xil_printf("DRAM SODIMM Detected\n");
if(memory_test()==0){
queue_dram_present(1);
dram_present = 1;
} else {
queue_dram_present(0);
dram_present = 0;
}
} else {
queue_dram_present(0);
dram_present = 0;
timestamp = get_usec_timestamp();
while((get_usec_timestamp() - timestamp) < 100000){
if((XGpio_DiscreteRead(&Gpio, GPIO_INPUT_CHANNEL)&GPIO_MASK_DRAM_INIT_DONE)){
xil_printf("DRAM SODIMM Detected\n");
if(memory_test()==0){
queue_dram_present(1);
dram_present = 1;
} else {
queue_dram_present(0);
dram_present = 0;
}
break;
}
}
}
queue_len = queue_init();
if( dram_present ) {
//The event_list lives in DRAM immediately following the queue payloads.
if(MAX_EVENT_LOG == -1){
log_size = (DDR3_SIZE - queue_len);
} else {
log_size = min( (DDR3_SIZE - queue_len), MAX_EVENT_LOG );
}
event_log_init( (void*)(DDR3_BASEADDR + queue_len), log_size );
} else {
log_size = 0;
}
#ifdef USE_WARPNET_WLAN_EXP
// Communicate the log size to WARPNet
node_info_set_event_log_size( log_size );
#endif
wlan_eth_init();
//Set direction of GPIO channels
XGpio_SetDataDirection(&Gpio, GPIO_INPUT_CHANNEL, 0xFFFFFFFF);
XGpio_SetDataDirection(&Gpio, GPIO_OUTPUT_CHANNEL, 0);
Status = XTmrCtr_Initialize(&TimerCounterInst, TMRCTR_DEVICE_ID);
if (Status != XST_SUCCESS) {
xil_printf("XTmrCtr failed to initialize\n");
return;
}
//Set the handler for Timer
XTmrCtr_SetHandler(&TimerCounterInst, timer_handler, &TimerCounterInst);
//Enable interrupt of timer and auto-reload so it continues repeatedly
XTmrCtr_SetOptions(&TimerCounterInst, TIMER_CNTR_FAST, XTC_DOWN_COUNT_OPTION | XTC_INT_MODE_OPTION);
XTmrCtr_SetOptions(&TimerCounterInst, TIMER_CNTR_SLOW, XTC_DOWN_COUNT_OPTION | XTC_INT_MODE_OPTION);
timer_running[TIMER_CNTR_FAST] = 0;
timer_running[TIMER_CNTR_SLOW] = 0;
// Get the type of node from the input parameter
hw_info.type = type;
hw_info.wn_exp_eth_device = eth_dev_num;
#ifdef USE_WARPNET_WLAN_EXP
// We cannot initialize WARPNet until after the lower CPU sends all the HW information to us through the IPC call
warpnet_initialized = 0;
#endif
wlan_mac_ltg_sched_init();
}
