/**
*
* Sets the options for the specified driver instance. The options are
* implemented as bit masks such that multiple options may be enabled or
* disabled simultaneously.
*
* The GetOptions function may be called to retrieve the currently enabled
* options. The result is ORed in the desired new settings to be enabled and
* ANDed with the inverse to clear the settings to be disabled. The resulting
* value is then used as the options for the SetOption function call.
*
* @param InstancePtr is a pointer to the XUartNs550 instance.
* @param Options contains the options to be set which are bit masks
* contained in the file xuartns550.h and named XUN_OPTION_*.
*
* @return
* - XST_SUCCESS if the options were set successfully.
* - XST_UART_CONFIG_ERROR if the options could not be set because
* the hardware does not support FIFOs
*
* @note None.
*
*****************************************************************************/
int XUartNs550_SetOptions(XUartNs550 *InstancePtr, u16 Options)
{
u32 Index;
u32 Register;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Loop thru the options table to map the logical options to the
* physical options in the registers of the UART
*/
for (Index = 0; Index < XUN_NUM_OPTIONS; Index++) {
/*
* If the FIFO control register is being read, this is a
* special case that requires special register processing
*/
if (OptionsTable[Index].RegisterOffset == XUN_FCR_OFFSET) {
Register = ReadFcrRegister(InstancePtr->BaseAddress);
} else {
/*
* Read the register which contains option so that the
* register can be changed without destoying any other
* bits of the register
*/
Register = XUartNs550_ReadReg(InstancePtr->BaseAddress,
OptionsTable[Index].RegisterOffset);
}
/*
* If the option is set in the input, then set the
* corresponding bit in the specified register, otherwise
* clear the bit in the register
*/
if (Options & OptionsTable[Index].Option) {
Register |= OptionsTable[Index].Mask;
} else {
Register &= ~OptionsTable[Index].Mask;
}
/*
* Write the new value to the register to set the option
*/
XUartNs550_WriteReg(InstancePtr->BaseAddress,
OptionsTable[Index].RegisterOffset, Register);
}
/* To be done, add error checks for enabling/resetting FIFOs */
return XST_SUCCESS;
}
/**
*
* This function does a minimal test on the UART device using the low-level
* driver macros and functions. This function sends data and expects to receive
* the data thru the UART. A physical loopback must be done by the user with the
* tranmit and receive signals of the UART.
*
* @param UartBaseAddress is the base address of the UARTNS550 device
* and is the XPAR_<UARTNS550_instance>_BASEADDR value from
* xparameters.h.
*
* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful.
*
* @note None.
*
****************************************************************************/
int XUartNs550_LowLevelExample(u32 UartBaseAddress)
{
int Index;
/*
* Initialize the send buffer bytes with a pattern to send and the
* the receive buffer bytes to zero
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
SendBuffer[Index] = Index + '0';
RecvBuffer[Index] = 0;
}
/*
* Set the baud rate and number of stop bits
*/
XUartNs550_SetBaud(UartBaseAddress, UART_CLOCK_HZ, UART_BAUDRATE);
XUartNs550_SetLineControlReg(UartBaseAddress, XUN_LCR_8_DATA_BITS);
/*
* Enable the FIFOs for 16550 mode since the defaults is NO FIFOs
*/
XUartNs550_WriteReg(UartBaseAddress, XUN_FCR_OFFSET, XUN_FIFO_ENABLE);
/*
* Send the entire transmit buffer
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
XUartNs550_SendByte(UartBaseAddress, SendBuffer[Index]);
}
/*
* Receive the entire buffer's worth. Note that the RecvByte function
* blocks waiting for a character
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
RecvBuffer[Index] = XUartNs550_RecvByte(UartBaseAddress);
}
/*
* Check the receive buffer data against the send buffer and verify the
* data was correctly received
*/
for (Index = 0; Index < TEST_BUFFER_SIZE; Index++) {
if (SendBuffer[Index] != RecvBuffer[Index]) {
return XST_FAILURE;
}
}
return XST_SUCCESS;
}
/**
*
* This functions reads the FIFO control register. It's primary purpose is to
* isolate the special processing for reading this register. It is necessary
* to write to the line control register, then read the FIFO control register,
* and then restore the line control register.
*
* @param BaseAddress contains the base address of the registers in the
* device.
*
* @return The contents of the FIFO control register.
*
* @note None.
*
*****************************************************************************/
static u32 ReadFcrRegister(u32 BaseAddress)
{
u32 LcrRegister;
u32 FcrRegister;
u32 IerRegister;
/*
* Enter a critical section here by disabling Uart interrupts. We do
* not want to receive an interrupt while we have the FCR latched since
* the interrupt handler may want to read the IIR
*/
IerRegister = XUartNs550_ReadReg(BaseAddress, XUN_IER_OFFSET);
XUartNs550_WriteReg(BaseAddress, XUN_IER_OFFSET, 0);
/*
* Get the line control register contents and set the divisor latch
* access bit so the FIFO control register can be read, this can't
* be done with a true 16550, but is a feature in the Xilinx device
*/
LcrRegister = XUartNs550_GetLineControlReg(BaseAddress);
XUartNs550_SetLineControlReg(BaseAddress, LcrRegister | XUN_LCR_DLAB);
/*
* Read the FIFO control register so it can be returned
*/
FcrRegister = XUartNs550_ReadReg(BaseAddress, XUN_FCR_OFFSET);
/*
* Restore the line control register to it's original contents such
* that the DLAB bit is no longer set and return the register
*/
XUartNs550_SetLineControlReg(BaseAddress, LcrRegister);
/*
* Exit the critical section by restoring the IER
*/
XUartNs550_WriteReg(BaseAddress, XUN_IER_OFFSET, IerRegister);
return FcrRegister;
}
/**
*
* This functions sets the receive FIFO trigger level. The receive trigger
* level specifies the number of bytes in the receive FIFO that cause a receive
* data event (interrupt) to be generated. The FIFOs must be enabled to set the
* trigger level.
*
* @param InstancePtr is a pointer to the XUartNs550 instance.
* @param TriggerLevel contains the trigger level to set. Constants which
* define each trigger level are contained in the file xuartns550.h
* and named XUN_FIFO_TRIGGER_*.
*
* @return
* - XST_SUCCESS if the trigger level was set
* - XST_UART_CONFIG_ERROR if the trigger level could not be set,
* either the hardware does not support the FIFOs or FIFOs
* are not enabled
*
* @note None.
*
*****************************************************************************/
int XUartNs550_SetFifoThreshold(XUartNs550 *InstancePtr, u8 TriggerLevel)
{
u32 FcrRegister;
/*
* Assert validates the input arguments
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid((TriggerLevel == XUN_FIFO_TRIGGER_14) ||
(TriggerLevel == XUN_FIFO_TRIGGER_08) ||
(TriggerLevel == XUN_FIFO_TRIGGER_04) ||
(TriggerLevel == XUN_FIFO_TRIGGER_01));
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the value of the FIFO control register, this read takes special
* register processing
*/
FcrRegister = ReadFcrRegister(InstancePtr->BaseAddress);
/*
* If the FIFO control register indicates that FIFOs are disabled, then
* either they are just disabled or it has no FIFOs, return an error
*/
if ((FcrRegister & XUN_FIFO_ENABLE) == 0) {
return XST_UART_CONFIG_ERROR;
}
/*
* Set the receive FIFO trigger level by clearing out the old level in
* the FIFO control register and writing in the new level
*/
FcrRegister &= ~XUN_FIFO_RX_TRIGGER;
FcrRegister |= (u32) TriggerLevel;
/*
* Write the new value for the FIFO control register to it such that the
* threshold is changed, writing to it is normal unlike reading from it
*/
XUartNs550_WriteReg(InstancePtr->BaseAddress,
XUN_FCR_OFFSET, FcrRegister);
return XST_SUCCESS;
}
/**
*
* This functions runs a self-test on the driver and hardware device. This self
* test performs a local loopback and verifies data can be sent and received.
*
* The statistics are cleared at the end of the test. The time for this test
* to execute is proportional to the baud rate that has been set prior to
* calling this function.
*
* @param InstancePtr is a pointer to the XUartNs550 instance.
*
* @return
*
* - XST_SUCCESS if the test was successful
* - XST_UART_TEST_FAIL if the test failed looping back the data
*
* @note This function can hang if the hardware is not functioning
* properly.
*
******************************************************************************/
int XUartNs550_SelfTest(XUartNs550 *InstancePtr)
{
int Status = XST_SUCCESS;
u32 McrRegister;
u32 LsrRegister;
u32 IerRegister;
u32 Index;
/*
* Assert validates the input arguments
*/
XASSERT_NONVOID(InstancePtr != NULL);
XASSERT_NONVOID(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Setup for polling by disabling all interrupts in the interrupt enable
* register
*/
IerRegister = XUartNs550_ReadReg(InstancePtr->BaseAddress,
XUN_IER_OFFSET);
XUartNs550_WriteReg(InstancePtr->BaseAddress, XUN_IER_OFFSET, 0);
/*
* Setup for loopback by enabling the loopback in the modem control
* register
*/
McrRegister = XUartNs550_ReadReg(InstancePtr->BaseAddress,
XUN_MCR_OFFSET);
XUartNs550_WriteReg(InstancePtr->BaseAddress, XUN_MCR_OFFSET,
McrRegister | XUN_MCR_LOOP);
/*
* Send a number of bytes and receive them, one at a time so this
* test will work for 450 and 550
*/
for (Index = 0; Index < XUN_TOTAL_BYTES; Index++) {
/*
* Send out the byte and if it was not sent then the failure
* will be caught in the compare at the end
*/
XUartNs550_Send(InstancePtr, &TestString[Index], 1);
/*
* Wait til the byte is received such that it should be waiting
* in the receiver. This can hang if the HW is broken
*/
do {
LsrRegister =
XUartNs550_GetLineStatusReg(InstancePtr->BaseAddress);
}
while ((LsrRegister & XUN_LSR_DATA_READY) == 0);
/*
* Receive the byte that should have been received because of
* the loopback, if it wasn't received then it will be caught
* in the compare at the end
*/
XUartNs550_Recv(InstancePtr, &ReturnString[Index], 1);
}
/*
* Clear the stats since they are corrupted by the test
*/
XUartNs550_ClearStats(InstancePtr);
/*
* Compare the bytes received to the bytes sent to verify the exact data
* was received
*/
for (Index = 0; Index < XUN_TOTAL_BYTES; Index++) {
if (TestString[Index] != ReturnString[Index]) {
Status = XST_UART_TEST_FAIL;
}
}
/*
* Restore the registers which were altered to put into polling and
* loopback modes so that this test is not destructive
*/
XUartNs550_WriteReg(InstancePtr->BaseAddress, XUN_IER_OFFSET,
IerRegister);
XUartNs550_WriteReg(InstancePtr->BaseAddress, XUN_MCR_OFFSET,
McrRegister);
return Status;
}
