void enable_caches() { #ifdef __PPC__ Xil_ICacheEnableRegion(CACHEABLE_REGION_MASK); Xil_DCacheEnableRegion(CACHEABLE_REGION_MASK); #elif __MICROBLAZE__ #ifdef XPAR_MICROBLAZE_USE_ICACHE Xil_ICacheEnable(); #endif #ifdef XPAR_MICROBLAZE_USE_DCACHE Xil_DCacheEnable(); #endif #endif }
void enable_caches() { #ifdef __PPC__ Xil_ICacheEnableRegion(XPAR_CACHEABLE_REGION_MASK); // Do not enable caches for memory tests, this has pros and cons // Pros - If caches are enabled, under certain configurations, there will be very few // transactions to external memory // Con - This might not generate a burst cacheline request // Xil_DCacheEnableRegion(CACHEABLE_REGION_MASK); #elif __MICROBLAZE__ #ifdef XPAR_MICROBLAZE_USE_ICACHE Xil_ICacheEnable(); #endif #ifdef XPAR_MICROBLAZE_USE_DCACHE // See reason above for not enable D Cache // Xil_DCacheEnable(); #endif #endif }
/** * This main function starts the USB Intrerrupt example. * * * @param None. * * @return * - XST_SUCCESS if successful. * - XST_FAILURE if test fails. * @note None. * *****************************************************************************/ int main() { int Status; int Index = 0; int Cnt = 0; /* * Initialize the USB driver. */ UsbConfigPtr = XUsb_LookupConfig(USB_DEVICE_ID); if (UsbConfigPtr == NULL) { return XST_FAILURE; } #ifdef __PPC__ Xil_ICacheEnableRegion (0x80000001); Xil_DCacheEnableRegion (0x80000001); #endif #ifdef __MICROBLAZE__ Xil_ICacheInvalidate(); Xil_ICacheEnable(); Xil_DCacheInvalidate(); Xil_DCacheEnable(); #endif Status = XUsb_CfgInitialize(&UsbInstance, UsbConfigPtr, UsbConfigPtr->BaseAddress); if (XST_SUCCESS != Status) { return XST_FAILURE; } /* * Initialize the USB instance as required for the * application. */ InitUsbInterface(&UsbInstance); /* * Set our function address to 0 which is the unenumerated state. */ Status = XUsb_SetDeviceAddress(&UsbInstance, 0); if (XST_SUCCESS != Status) { return XST_FAILURE; } /* * Setup the interrupt handlers. */ XUsb_IntrSetHandler(&UsbInstance, (void *) UsbIfIntrHandler, &UsbInstance); XUsb_EpSetHandler(&UsbInstance, 0, (XUsb_EpHandlerFunc *) Ep0IntrHandler, &UsbInstance); XUsb_EpSetHandler(&UsbInstance, 1, (XUsb_EpHandlerFunc *) Ep1IntrHandler, &UsbInstance); /* * Setup the interrupt system. */ Status = SetupInterruptSystem(&UsbInstance); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Enable the interrupts. */ XUsb_IntrEnable(&UsbInstance, XUSB_STATUS_GLOBAL_INTR_MASK | XUSB_STATUS_RESET_MASK | XUSB_STATUS_SUSPEND_MASK | XUSB_STATUS_DISCONNECT_MASK | XUSB_STATUS_FIFO_BUFF_RDY_MASK | XUSB_STATUS_FIFO_BUFF_FREE_MASK | XUSB_STATUS_EP0_BUFF1_COMP_MASK | XUSB_STATUS_EP1_BUFF1_COMP_MASK | XUSB_STATUS_EP2_BUFF1_COMP_MASK | XUSB_STATUS_EP1_BUFF2_COMP_MASK | XUSB_STATUS_EP2_BUFF2_COMP_MASK); XUsb_Start(&UsbInstance); /* * Set the device configuration to unenumerated state. */ UsbInstance.DeviceConfig.CurrentConfiguration = 0; /* * Wait untill the USB device is enumerated. */ while (!UsbInstance.DeviceConfig.CurrentConfiguration); /* * Stop the test if the Stop key is pressed or * device lost enumeration. */ while (1) { if (UsbInstance.Config.DmaEnabled) { /* Flush the cache before DMA transfer */ Xil_DCacheFlushRange((u32)&Hello_wav[Index],(u32)1024); } if (XUsb_EpDataSend(&UsbInstance, 1, &Hello_wav[Index], 1024) == XST_SUCCESS){ Index += 1024; Cnt ++; if (Cnt >= 9000){ Cnt =0; Index = 0; } } } return XST_SUCCESS; }
int main (void) { Xil_ICacheEnableRegion(0x80000000); Xil_DCacheEnableRegion(0x80000000); print("-- Entering main() --\r\n"); /* * Peripheral SelfTest will not be run for RS232 * because it has been selected as the STDOUT device */ { int status; print("\r\nRunning UartLiteSelfTestExample() for RS232_USB...\r\n"); status = UartLiteSelfTestExample(XPAR_RS232_USB_DEVICE_ID); if (status == 0) { print("UartLiteSelfTestExample PASSED\r\n"); } else { print("UartLiteSelfTestExample FAILED\r\n"); } } { u32 status; print("\r\nRunning GpioOutputExample() for LEDs_8Bit...\r\n"); status = GpioOutputExample(XPAR_LEDS_8BIT_DEVICE_ID,8); if (status == 0) { print("GpioOutputExample PASSED.\r\n"); } else { print("GpioOutputExample FAILED.\r\n"); } } { u32 status; print("\r\nRunning GpioInputExample() for DIP_Switches_8Bit...\r\n"); u32 DataRead; status = GpioInputExample(XPAR_DIP_SWITCHES_8BIT_DEVICE_ID, &DataRead); if (status == 0) { xil_printf("GpioInputExample PASSED. Read data:0x%X\r\n", DataRead); } else { print("GpioInputExample FAILED.\r\n"); } } { u32 status; print("\r\nRunning GpioInputExample() for Push_Buttons_3Bit...\r\n"); u32 DataRead; status = GpioInputExample(XPAR_PUSH_BUTTONS_3BIT_DEVICE_ID, &DataRead); if (status == 0) { xil_printf("GpioInputExample PASSED. Read data:0x%X\r\n", DataRead); } else { print("GpioInputExample FAILED.\r\n"); } } { int status; print("\r\nRunning EmacLitePolledExample() for Ethernet_MAC...\r\n"); status = EmacLitePolledExample(XPAR_ETHERNET_MAC_DEVICE_ID); if (status == 0) { print("EmacLite Polled Example PASSED\r\n"); } else { print("EmacLite Polled Example FAILED\r\n"); } } { int status; print("\r\nRunning SysAceSelfTestExample() for SysACE_CompactFlash...\r\n"); status = SysAceSelfTestExample(XPAR_SYSACE_COMPACTFLASH_DEVICE_ID); if (status == 0) { print("SysAceSelfTestExample PASSED\r\n"); } else { print("SysAceSelfTestExample FAILED\r\n"); } } print("-- Exiting main() --\r\n"); Xil_DCacheDisable(); Xil_ICacheDisable(); return 0; }
/** * This main function starts the USB application. * * * @param None. * * @return * - XST_SUCCESS if successful. * - XST_FAILURE if test fails. * @note None. * *****************************************************************************/ int main() { int Status; u32 ReadRegData = 0; /* * Initialize the USB driver. */ UsbConfigPtr = XUsb_LookupConfig(USB_DEVICE_ID); if (NULL == UsbConfigPtr) { return XST_FAILURE; } #ifdef __PPC__ Xil_ICacheEnableRegion (0x80000001); Xil_DCacheEnableRegion (0x80000001); #endif #ifdef __MICROBLAZE__ Xil_ICacheInvalidate(); Xil_ICacheEnable(); Xil_DCacheInvalidate(); Xil_DCacheEnable(); #endif /* * We are passing the physical base address as the third argument * because the physical and virtual base address are the same in our * example. For systems that support virtual memory, the third * argument needs to be the virtual base address. */ Status = XUsb_CfgInitialize(&UsbInstance, UsbConfigPtr, UsbConfigPtr->BaseAddress); if (XST_SUCCESS != Status) { return XST_FAILURE; } XUsb_UlpiIntrSetHandler (&UsbInstance, (void *) UsbIfPhyIntrHandler, &UsbInstance); /* * Setup the interrupt system. */ Status = SetupInterruptSystem(&UsbInstance); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Enable the interrupts. */ XUsb_IntrEnable(&UsbInstance, XUSB_STATUS_GLOBAL_INTR_MASK | XUSB_STATUS_PHY_ACCESS_MASK); XUsb_Start(&UsbInstance); /* * Initiate a ULPI register write transaction. */ XUsb_UlpiPhyWriteRegister(&UsbInstance, ULPI_SCRATCH_REGISTER, WRITE_REG_DATA); /* Wait until the write transaction is done */ while (!PhyAccessDone); /* * Read the PHY read register. We do not wait for transaction * complete interrupt in this case. The API internally polls for the * completion and then returns the register value read. */ ReadRegData = XUsb_UlpiPhyReadRegister(&UsbInstance, ULPI_SCRATCH_REGISTER); /* Compare the Written data and read data*/ if (ReadRegData != WRITE_REG_DATA) { return XST_FAILURE; } return XST_SUCCESS; }