// Scan ram static INT32 DrvScan(INT32 nAction, INT32* pnMin) { struct BurnArea ba; if (pnMin != NULL) { // Return minimum compatible version *pnMin = 0x029402; } if (nAction & ACB_VOLATILE) { // Scan volatile ram memset(&ba, 0, sizeof(ba)); ba.Data = RamStart; ba.nLen = RamEnd - RamStart; ba.szName = "RAM"; BurnAcb(&ba); SekScan(nAction); // scan 68000 states ZetScan(nAction); // Scan Z80 BurnYM3812Scan(nAction, pnMin); SCAN_VAR(DrvInput); SCAN_VAR(nCyclesDone); } return 0; }
static INT32 DrvScan(INT32 nAction, INT32 *pnMin) { struct BurnArea ba; if (pnMin != NULL) { *pnMin = 0x029707; } if (nAction & ACB_MEMORY_RAM) { memset(&ba, 0, sizeof(ba)); ba.Data = AllRam; ba.nLen = RamEnd-AllRam; ba.szName = "All Ram"; BurnAcb(&ba); } if (nAction & ACB_DRIVER_DATA) { ZetScan(nAction); MSM6295Scan(0, nAction); } if (nAction & ACB_WRITE) { ZetOpen(0); bankswitch(banks[0]); vidram_bankswitch(banks[1]); ZetClose(); oki_bankswitch(banks[2]); DrvRecalc = 1; } return 0; }
static INT32 DrvScan(INT32 nAction, INT32* pnMin) { struct BurnArea ba; if (pnMin != NULL) { *pnMin = 0x029707; } if (nAction & ACB_VOLATILE) { memset(&ba, 0, sizeof(ba)); ba.Data = AllRam; ba.nLen = RamEnd - AllRam; ba.szName = "RAM"; BurnAcb(&ba); SekScan(nAction); ZetScan(nAction); BurnYM3812Scan(nAction, pnMin); SCAN_VAR(nCyclesDone); SCAN_VAR(demonwld_hack); } return 0; }
static int DrvScan(int nAction,int *pnMin) { struct BurnArea ba; if (pnMin) { *pnMin = 0x029706; } if (nAction & ACB_VOLATILE) { memset(&ba, 0, sizeof(ba)); ba.Data = AllRam; ba.nLen = RamEnd - AllRam; ba.szName = "All RAM"; BurnAcb(&ba); } if (nAction & ACB_DRIVER_DATA) { M6809Scan(nAction); ZetScan(nAction); BurnYM2203Scan(nAction, pnMin); } return 0; }
// Scan ram static INT32 DrvScan(INT32 nAction, INT32* pnMin) { struct BurnArea ba; if (pnMin) { // Return minimum compatible version *pnMin = 0x029497; } if (nAction & ACB_VOLATILE) { // Scan volatile ram memset(&ba, 0, sizeof(ba)); ba.Data = RamStart; ba.nLen = RamEnd-RamStart; ba.szName = "All Ram"; BurnAcb(&ba); SekScan(nAction); // scan 68000 states ZetScan(nAction); // Scan Z80 MSM6295Scan(0, nAction); BurnYM2151Scan(nAction); ToaScanGP9001(nAction, pnMin); SCAN_VAR(DrvInput); } return 0; }
// Scan RAM static int SupermanScan(int nAction,int *pnMin) { struct BurnArea ba; if (pnMin) { // Return minimum compatible version *pnMin = 0x029521; } if (nAction & ACB_VOLATILE) { // Scan volatile ram memset(&ba, 0, sizeof(ba)); ba.Data = RamStart; ba.nLen = RamEnd-RamStart; ba.szName = "All Ram"; BurnAcb(&ba); } if (nAction & ACB_DRIVER_DATA) { SekScan(nAction); // Scan 68000 ZetScan(nAction); // Scan Z80 BurnYM2610Scan(nAction, pnMin); // Scan critical driver variables SCAN_VAR(SupermanInput); SCAN_VAR(SupermanDip); SCAN_VAR(Z80Bank); SCAN_VAR(nCurrentBank); SCAN_VAR(nCycles68KSync); } return 0; }
// Scan the current PSound z80 state int PsndZScan(int nAction) { struct BurnArea ba; int i=0; ZetScan(nAction); // Scan Z80 SCAN_VAR(nTimerPeriod) SCAN_VAR(nNextTimer) SCAN_VAR(FmReg) SCAN_VAR(nFmSel) SCAN_VAR(nPsndZBank) // Scan Ram memset(&ba,0,sizeof(ba)); ba.szName="PsndZRam"; ba.Data=PsndZRam; ba.nLen=0x800; BurnAcb(&ba); if (nAction&2) { PsndZBankMap(); // If write, bank could have changed CalcTimerPeriod(); // If write, timer registers could have changed // Resend all the registers to the ym2151 if (bPsmOkay) { for (i=0; i<0x100; i++) { YM2151WriteReg(0,i,FmReg[i]); } } } return 0; }
INT32 Sf2mdtScanSound(INT32 nAction, INT32 *pnMin) { if (nAction & ACB_MEMORY_RAM) { struct BurnArea ba; memset(&ba, 0, sizeof(ba)); ba.Data = Sf2mdtZ80Ram; ba.nLen = 0x00800; ba.szName = "Sf2mdtZ80Ram"; BurnAcb(&ba); } if (nAction & ACB_DRIVER_DATA) { ZetScan(nAction); BurnYM2151Scan(nAction); MSM5205Scan(nAction, pnMin); SCAN_VAR(Sf2mdtZ80BankAddress); SCAN_VAR(Sf2mdtSoundLatch); SCAN_VAR(Sf2mdtSampleBuffer1); SCAN_VAR(Sf2mdtSampleBuffer2); SCAN_VAR(Sf2mdtSampleSelect1); SCAN_VAR(Sf2mdtSampleSelect2); SCAN_VAR(Sf2mdtSoundPos); } return 0; }
// Scan the current QSound z80 state int QsndZScan(int nAction) { ZetScan(nAction); // Scan Z80 SCAN_VAR(nQsndZBank); if (nAction & ACB_WRITE) { // If write, bank could have changed QsndZBankMap(); } return 0; }
// Scan the current QSound z80 state INT32 QsndZScan(INT32 nAction) { ZetScan(nAction); // Scan Z80 SCAN_VAR(nQsndZBank); if (nAction & ACB_WRITE) { // If write, bank could have changed ZetOpen(0); QsndZBankMap(); ZetClose(); } return 0; }
// Scan the current QSound z80 state int QsndZScan(int nAction) { ZetScan(nAction); // Scan Z80 if (nAcbVersion > GGPOFBA_VERSION_0_25) { SCAN_VAR(QscCmd); } SCAN_VAR(nQsndZBank); if (nAction & ACB_WRITE) { // If write, bank could have changed QsndZBankMap(); } return 0; }
// Scan ram static INT32 drvScan(INT32 nAction, INT32* pnMin) { struct BurnArea ba; if (pnMin) { // Return minimum compatible version *pnMin = 0x029496; } if (nAction & ACB_VOLATILE) { // Scan volatile ram memset(&ba, 0, sizeof(ba)); ba.Data = RamStart; ba.nLen = RamEnd - RamStart; ba.szName = "RAM"; BurnAcb(&ba); SekScan(nAction); // Scan 68000 ZetScan(nAction); // Scan Z80 SCAN_VAR(nCurrentBank); MSM6295Scan(0, nAction); MSM6295Scan(1, nAction); BurnYM2151Scan(nAction); ToaScanGP9001(nAction, pnMin); SCAN_VAR(nIRQPending); SCAN_VAR(nTextROMStatus); SCAN_VAR(drvInput); if (nAction & ACB_WRITE) { INT32 n = nTextROMStatus; nTextROMStatus = -1; SekOpen(0); Map68KTextROM(n); SekClose(); n = nCurrentBank; nCurrentBank = -1; ZetOpen(0); drvZ80Bankswitch(n); ZetClose(); } } return 0; }
static int twinhawkScan(int nAction,int *pnMin) { struct BurnArea ba; if (pnMin) { // Return minimum compatible version *pnMin = 0x029521; } if (nAction & ACB_VOLATILE) { // Scan volatile ram memset(&ba, 0, sizeof(ba)); ba.Data = RamStart; ba.nLen = RamEnd-RamStart; ba.szName = "All Ram"; BurnAcb(&ba); } if (nAction & ACB_DRIVER_DATA) { SekScan(nAction); // Scan 68000 state ZetOpen(0); ZetScan(nAction); // Scan Z80 state ZetClose(); SCAN_VAR(nCyclesTotal); SCAN_VAR(nCyclesSegment); // Scan critical driver variables SCAN_VAR(twinhawkInputPort0); SCAN_VAR(twinhawkInputPort1); SCAN_VAR(twinhawkInputPort2); SCAN_VAR(twinhawkInput); SCAN_VAR(twinhawkDip); SCAN_VAR(Z80Bank); SCAN_VAR(nCurrentBank); BurnYM2151Scan(nAction); } return 0; }
// Scan ram static INT32 DrvScan(INT32 nAction,INT32 *pnMin) { struct BurnArea ba; if (pnMin) { // Return minimum compatible version *pnMin = 0x029497; } if (nAction & ACB_VOLATILE) { // Scan volatile data memset(&ba, 0, sizeof(ba)); ba.Data = RamStart; ba.nLen = RamEnd-RamStart; ba.szName = "All Ram"; BurnAcb(&ba); SekScan(nAction); // scan 68000 states ZetScan(nAction); // Scan Z80 SCAN_VAR(nCurrentBank); MSM6295Scan(0, nAction); BurnYM2151Scan(nAction); ToaScanGP9001(nAction, pnMin); SCAN_VAR(DrvInput); SCAN_VAR(nSoundCommand); SCAN_VAR(nIRQPending); if (nAction & ACB_WRITE) { INT32 nBank = nCurrentBank; nCurrentBank = -1; ZetOpen(0); // March 28, 2014: Fix for crash on savestate load - dink drvZ80Bankswitch(nBank); ZetClose(); } } return 0; }
static int DrvScan(int nAction,int *pnMin) { struct BurnArea ba; if (pnMin) { *pnMin = 0x029521; } if (nAction & ACB_VOLATILE) { memset(&ba, 0, sizeof(ba)); ba.Data = Mem + 0x4000; ba.nLen = 0x0800; ba.szName = "All Ram"; BurnAcb(&ba); ZetScan(nAction); SCAN_VAR(nColor); } return 0; }
// Scan ram static int DrvScan(int nAction,int *pnMin) { struct BurnArea ba; if (pnMin) { // Return minimum compatible version *pnMin = 0x029497; } if (nAction & ACB_VOLATILE) { // Scan volatile data memset(&ba, 0, sizeof(ba)); ba.Data = RamStart; ba.nLen = RamEnd-RamStart; ba.szName = "All Ram"; BurnAcb(&ba); SekScan(nAction); // scan 68000 states ZetScan(nAction); // Scan Z80 SCAN_VAR(nCurrentBank); MSM6295Scan(0, nAction); BurnYM2151Scan(nAction); ToaScanGP9001(nAction, pnMin); SCAN_VAR(DrvInput); SCAN_VAR(nSoundCommand); SCAN_VAR(nIRQPending); if (nAction & ACB_WRITE) { int nBank = nCurrentBank; nCurrentBank = -1; drvZ80Bankswitch(nBank); } } return 0; }