unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet) { unsigned long rval; /* MCP is not connected */ if ( enableMCP ) return -1; rval = (clear_hose_errors(0, quiet) & PCI_ERR_BITS)>>8; rval |= clear_hose_errors(BSP_pci_hose1_bus_base, quiet) & PCI_ERR_BITS; /* Tsi148 doesn't propagate VME bus errors to PCI status reg. */ if ( _BSP_clear_vmebridge_errors ) rval |= _BSP_clear_vmebridge_errors(quiet)<<16; return rval; }
unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet) { unsigned long rval; unsigned short pcistat; int count; if (enableMCP) return -1; /* exceptions not supported / MCP not wired */ /* read error status for info return */ pci_read_config_word(0,0,0,PCI_STATUS,&pcistat); rval = pcistat; count=10; do { /* clear error reporting registers */ /* clear PCI status register */ pci_write_config_word(0,0,0,PCI_STATUS, PCI_ERR_BITS); /* read new status */ pci_read_config_word(0,0,0,PCI_STATUS, &pcistat); } while ( ! PCI_STATUS_OK(pcistat) && count-- ); if ( !PCI_STATUS_OK(rval) && !quiet) { printk("Cleared PCI errors: pci_stat was 0x%04x\n", rval); } if ( !PCI_STATUS_OK(pcistat) ) { printk("Unable to clear PCI errors: still 0x%04x after 10 attempts\n", pcistat); } rval &= PCI_ERR_BITS; /* Some VME bridges (Tsi148) don't propagate VME bus errors to PCI status reg. */ if ( _BSP_clear_vmebridge_errors ) rval |= _BSP_clear_vmebridge_errors(quiet)<<16; return rval; }