/*! * \brief Initialize the mmu and set default properties for regions not mapped by * the ACR registers. * * \param[in] mmu_init default properties */ void _mmu_init ( // [IN] default properties void *mmu_init ) { /* Body */ PSP_MMU_INIT_STRUCT_PTR mmu = mmu_init; KERNEL_DATA_STRUCT_PTR kernel_data; PSP_SUPPORT_STRUCT_PTR psp_support_ptr; uint32_t mode; uint32_t tmp; _mqx_int i; _GET_KERNEL_DATA(kernel_data); psp_support_ptr = (PSP_SUPPORT_STRUCT_PTR)kernel_data->PSP_SUPPORT_PTR; if (psp_support_ptr == NULL || mmu == 0) { _mqx_fatal_error(MQX_INVALID_POINTER); } /* Endif */ /* Stop and invalidate the cache */ _DCACHE_DISABLE(); _ICACHE_DISABLE(); _mem_zero(psp_support_ptr->ACR_VALS, sizeof(psp_support_ptr->ACR_VALS)); mode = mmu->INITIAL_CACR_ENABLE_BITS & ~(MCF54XX_CACR_EUSP) | MCF54XX_CACR_SPA; // do not remove SPA flag - fn for flush/invalidate cache use phy address features tmp = _PSP_GET_CACR(); tmp |= mode; _PSP_SET_CACR(tmp); } /* Endbody */
void _bsp_exit_handler ( void ) { /* Body */ _mcf5441_int_mask_all(); _DCACHE_DISABLE(); _ICACHE_DISABLE(); _MMU_DISABLE(); } /* Endbody */
/*! * \cond DOXYGEN_PRIVATE */ void _bsp_exit_handler(void) { _DCACHE_DISABLE(); _ICACHE_DISABLE(); }