void _Thread_Handler( void )
{
Thread_Control *executing = _Thread_Executing;
ISR_Level level;
/*
* Some CPUs need to tinker with the call frame or registers when the
* thread actually begins to execute for the first time. This is a
* hook point where the port gets a shot at doing whatever it requires.
*/
_Context_Initialization_at_thread_begin();
#if !defined(RTEMS_SMP)
/*
* have to put level into a register for those cpu's that use
* inline asm here
*/
level = executing->Start.isr_level;
_ISR_Set_level( level );
#endif
/*
* Initialize the floating point context because we do not come
* through _Thread_Dispatch on our first invocation. So the normal
* code path for performing the FP context switch is not hit.
*/
#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
if ( (executing->fp_context != NULL) &&
!_Thread_Is_allocated_fp( executing ) ) {
if ( _Thread_Allocated_fp != NULL )
_Context_Save_fp( &_Thread_Allocated_fp->fp_context );
_Thread_Allocated_fp = executing;
}
#endif
#endif
/*
* Take care that 'begin' extensions get to complete before
* 'switch' extensions can run. This means must keep dispatch
* disabled until all 'begin' extensions complete.
*/
_User_extensions_Thread_begin( executing );
/*
* At this point, the dispatch disable level BETTER be 1.
*/
#if defined(RTEMS_SMP)
{
/*
* On SMP we enter _Thread_Handler() with interrupts disabled and
* _Thread_Dispatch() obtained the per-CPU lock for us. We have to
* release it here and set the desired interrupt level of the thread.
*/
Per_CPU_Control *cpu_self = _Per_CPU_Get();
_Assert( cpu_self->thread_dispatch_disable_level == 1 );
_Assert( _ISR_Get_level() != 0 );
_Thread_Debug_set_real_processor( executing, cpu_self );
cpu_self->thread_dispatch_disable_level = 0;
_Profiling_Thread_dispatch_enable( cpu_self, 0 );
level = executing->Start.isr_level;
_ISR_Set_level( level);
/*
* The thread dispatch level changed from one to zero. Make sure we lose
* no thread dispatch necessary update.
*/
_Thread_Dispatch();
}
#else
_Thread_Enable_dispatch();
#endif
/*
* RTEMS supports multiple APIs and each API can define a different
* thread/task prototype. The following code supports invoking the
* user thread entry point using the prototype expected.
*/
if ( executing->Start.prototype == THREAD_START_NUMERIC ) {
executing->Wait.return_argument =
(*(Thread_Entry_numeric) executing->Start.entry_point)(
executing->Start.numeric_argument
);
}
#if defined(RTEMS_POSIX_API)
else if ( executing->Start.prototype == THREAD_START_POINTER ) {
executing->Wait.return_argument =
(*(Thread_Entry_pointer) executing->Start.entry_point)(
executing->Start.pointer_argument
);
}
#endif
#if defined(FUNCTIONALITY_NOT_CURRENTLY_USED_BY_ANY_API)
else if ( executing->Start.prototype == THREAD_START_BOTH_POINTER_FIRST ) {
executing->Wait.return_argument =
(*(Thread_Entry_both_pointer_first) executing->Start.entry_point)(
executing->Start.pointer_argument,
executing->Start.numeric_argument
);
}
else if ( executing->Start.prototype == THREAD_START_BOTH_NUMERIC_FIRST ) {
executing->Wait.return_argument =
(*(Thread_Entry_both_numeric_first) executing->Start.entry_point)(
executing->Start.numeric_argument,
executing->Start.pointer_argument
);
}
#endif
/*
* In the switch above, the return code from the user thread body
* was placed in return_argument. This assumed that if it returned
* anything (which is not supporting in all APIs), then it would be
* able to fit in a (void *).
*/
_User_extensions_Thread_exitted( executing );
_Terminate(
INTERNAL_ERROR_CORE,
true,
INTERNAL_ERROR_THREAD_EXITTED
);
}
void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level )
{
Thread_Control *executing;
_Assert( cpu_self->thread_dispatch_disable_level == 1 );
executing = cpu_self->executing;
do {
Thread_Control *heir = _Thread_Get_heir_and_make_it_executing( cpu_self );
/*
* When the heir and executing are the same, then we are being
* requested to do the post switch dispatching. This is normally
* done to dispatch signals.
*/
if ( heir == executing )
goto post_switch;
/*
* Since heir and executing are not the same, we need to do a real
* context switch.
*/
#if __RTEMS_ADA__
executing->rtems_ada_self = rtems_ada_self;
rtems_ada_self = heir->rtems_ada_self;
#endif
if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
heir->cpu_time_budget = rtems_configuration_get_ticks_per_timeslice();
/*
* On SMP the complete context switch must be atomic with respect to one
* processor. See also _Thread_Handler() since _Context_switch() may branch
* to this function.
*/
#if !defined( RTEMS_SMP )
_ISR_Enable( level );
#endif
#ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__
_Thread_Update_cpu_time_used(
executing,
&cpu_self->time_of_last_context_switch
);
#else
{
_TOD_Get_uptime( &cpu_self->time_of_last_context_switch );
heir->cpu_time_used++;
}
#endif
#if !defined(__DYNAMIC_REENT__)
/*
* Switch libc's task specific data.
*/
if ( _Thread_libc_reent ) {
executing->libc_reent = *_Thread_libc_reent;
*_Thread_libc_reent = heir->libc_reent;
}
#endif
_User_extensions_Thread_switch( executing, heir );
_Thread_Save_fp( executing );
_Context_Switch( &executing->Registers, &heir->Registers );
_Thread_Restore_fp( executing );
/*
* We have to obtain this value again after the context switch since the
* heir thread may have migrated from another processor. Values from the
* stack or non-volatile registers reflect the old execution environment.
*/
cpu_self = _Per_CPU_Get();
_Thread_Debug_set_real_processor( executing, cpu_self );
#if !defined( RTEMS_SMP )
_ISR_Disable( level );
#endif
} while (
#if defined( RTEMS_SMP )
false
#else
cpu_self->dispatch_necessary
#endif
);
post_switch:
_Assert( cpu_self->thread_dispatch_disable_level == 1 );
cpu_self->thread_dispatch_disable_level = 0;
_Profiling_Thread_dispatch_enable( cpu_self, 0 );
_ISR_Enable_without_giant( level );
_Thread_Run_post_switch_actions( executing );
}
void _Thread_Dispatch( void )
{
Per_CPU_Control *cpu_self;
Thread_Control *executing;
ISR_Level level;
#if defined( RTEMS_SMP )
/*
* On SMP the complete context switch must be atomic with respect to one
* processor. See also _Thread_Handler() since _Context_switch() may branch
* to this function.
*/
_ISR_Disable_without_giant( level );
#endif
cpu_self = _Per_CPU_Get();
_Assert( cpu_self->thread_dispatch_disable_level == 0 );
_Profiling_Thread_dispatch_disable( cpu_self, 0 );
cpu_self->thread_dispatch_disable_level = 1;
/*
* Now determine if we need to perform a dispatch on the current CPU.
*/
executing = cpu_self->executing;
#if !defined( RTEMS_SMP )
_ISR_Disable( level );
#endif
#if defined( RTEMS_SMP )
if ( cpu_self->dispatch_necessary ) {
#else
while ( cpu_self->dispatch_necessary ) {
#endif
Thread_Control *heir = _Thread_Get_heir_and_make_it_executing( cpu_self );
/*
* When the heir and executing are the same, then we are being
* requested to do the post switch dispatching. This is normally
* done to dispatch signals.
*/
if ( heir == executing )
goto post_switch;
/*
* Since heir and executing are not the same, we need to do a real
* context switch.
*/
#if __RTEMS_ADA__
executing->rtems_ada_self = rtems_ada_self;
rtems_ada_self = heir->rtems_ada_self;
#endif
if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
heir->cpu_time_budget = rtems_configuration_get_ticks_per_timeslice();
#if !defined( RTEMS_SMP )
_ISR_Enable( level );
#endif
#ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__
_Thread_Update_cpu_time_used(
executing,
&cpu_self->time_of_last_context_switch
);
#else
{
_TOD_Get_uptime( &cpu_self->time_of_last_context_switch );
heir->cpu_time_used++;
}
#endif
#if !defined(__DYNAMIC_REENT__)
/*
* Switch libc's task specific data.
*/
if ( _Thread_libc_reent ) {
executing->libc_reent = *_Thread_libc_reent;
*_Thread_libc_reent = heir->libc_reent;
}
#endif
_User_extensions_Thread_switch( executing, heir );
/*
* If the CPU has hardware floating point, then we must address saving
* and restoring it as part of the context switch.
*
* The second conditional compilation section selects the algorithm used
* to context switch between floating point tasks. The deferred algorithm
* can be significantly better in a system with few floating point tasks
* because it reduces the total number of save and restore FP context
* operations. However, this algorithm can not be used on all CPUs due
* to unpredictable use of FP registers by some compilers for integer
* operations.
*/
#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
#if ( CPU_USE_DEFERRED_FP_SWITCH != TRUE )
if ( executing->fp_context != NULL )
_Context_Save_fp( &executing->fp_context );
#endif
#endif
_Context_Switch( &executing->Registers, &heir->Registers );
#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
if ( (executing->fp_context != NULL) &&
!_Thread_Is_allocated_fp( executing ) ) {
if ( _Thread_Allocated_fp != NULL )
_Context_Save_fp( &_Thread_Allocated_fp->fp_context );
_Context_Restore_fp( &executing->fp_context );
_Thread_Allocated_fp = executing;
}
#else
if ( executing->fp_context != NULL )
_Context_Restore_fp( &executing->fp_context );
#endif
#endif
/*
* We have to obtain this value again after the context switch since the
* heir thread may have migrated from another processor. Values from the
* stack or non-volatile registers reflect the old execution environment.
*/
cpu_self = _Per_CPU_Get();
_Thread_Debug_set_real_processor( executing, cpu_self );
#if !defined( RTEMS_SMP )
_ISR_Disable( level );
#endif
}
post_switch:
_Assert( cpu_self->thread_dispatch_disable_level == 1 );
cpu_self->thread_dispatch_disable_level = 0;
_Profiling_Thread_dispatch_enable( cpu_self, 0 );
_ISR_Enable_without_giant( level );
_Thread_Run_post_switch_actions( executing );
}
void rtems_initialize_data_structures(void)
{
_System_state_Handler_initialization( FALSE );
_CPU_Initialize();
/*
* Do this as early as possible to ensure no debugging output
* is even attempted to be printed.
*/
_Debug_Manager_initialization();
_API_extensions_Initialization();
_Thread_Dispatch_initialization();
_User_extensions_Handler_initialization();
_ISR_Handler_initialization();
/*
* Initialize the internal support API and allocator Mutex
*/
_Objects_Information_table[OBJECTS_INTERNAL_API] = _Internal_Objects;
_API_Mutex_Initialization( 2 );
_API_Mutex_Allocate( &_RTEMS_Allocator_Mutex );
_API_Mutex_Allocate( &_Once_Mutex );
_Watchdog_Handler_initialization();
_TOD_Handler_initialization();
_Thread_Handler_initialization();
_Scheduler_Handler_initialization();
_SMP_Handler_initialize();
_CPU_set_Handler_initialization();
/* MANAGERS */
/*
* Install our API Object Management Table and initialize the
* various managers.
*/
_Objects_Information_table[OBJECTS_CLASSIC_API] = _RTEMS_Objects;
_RTEMS_tasks_Manager_initialization();
_Semaphore_Manager_initialization();
/*
* Install our API Object Management Table and initialize the
* various managers.
*/
_Objects_Information_table[OBJECTS_POSIX_API] = _POSIX_Objects;
_POSIX_Key_Manager_initialization();
/*
* Discover and initialize the secondary cores in an SMP system.
*/
_SMP_Handler_initialize();
_System_state_Set( SYSTEM_STATE_BEFORE_MULTITASKING );
/*
* No threads should be created before this point!!!
* _Thread_Executing and _Thread_Heir are not set.
*
* At this point all API extensions are in place. After the call to
* _Thread_Create_idle() _Thread_Executing and _Thread_Heir will be set.
*/
_Thread_Create_idle();
/*
* Scheduling can properly occur now as long as we avoid dispatching.
*/
_System_state_Set( SYSTEM_STATE_UP );
_SMP_Request_start_multitasking();
_Thread_Start_multitasking();
/* Add Initialization of the Thread_Dispatch wrapper */
Init__wrap__Thread_Dispatch();
/*
* Now we are back in a non-dispatching critical section
*/
#if defined(RTEMS_SMP)
{
ISR_Level level;
/*
* On SMP we enter _Thread_Handler() with interrupts disabled and
* _Thread_Dispatch() obtained the per-CPU lock for us. We have to
* release it here and set the desired interrupt level of the thread.
*/
Per_CPU_Control *cpu_self = _Per_CPU_Get();
_Assert( cpu_self->thread_dispatch_disable_level == 1 );
_Assert( _ISR_Get_level() != 0 );
cpu_self->thread_dispatch_disable_level = 0;
_Profiling_Thread_dispatch_enable( cpu_self, 0 );
/* For whatever reason, we haven't locked our per cpu yet in the
* Scheduler Simulator. Until this is done, this release is not needed.
*/
/* _Per_CPU_Release( cpu_self ); */
level = _Thread_Executing->Start.isr_level;
_ISR_Set_level( level);
/*
* The thread dispatch level changed from one to zero. Make sure we lose
* no thread dispatch necessary update.
*/
_Thread_Dispatch();
}
#else
_Thread_Enable_dispatch();
#endif
/*
* Print an initial message
*/
check_heir_and_executing();
}
