//{{{
uint8_t SD_Init() {
//{{{ sdDetect init
SD_DETECT_GPIO_CLK_ENABLE();
GPIO_InitTypeDef gpio_init_structure;
gpio_init_structure.Pin = SD_DETECT_PIN;
gpio_init_structure.Mode = GPIO_MODE_INPUT;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
HAL_GPIO_Init (SD_DETECT_GPIO_PORT, &gpio_init_structure);
//}}}
uSdHandle.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
uSdHandle.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
uSdHandle.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
uSdHandle.Init.BusWide = SDMMC_BUS_WIDE_1B;
uSdHandle.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
uSdHandle.Init.ClockDiv = SDMMC_TRANSFER_CLK_DIV;
__HAL_RCC_DMA2_CLK_ENABLE();
// sd interrupt
#ifdef STM32F746G_DISCO
uSdHandle.Instance = SDMMC1;
__HAL_RCC_SDMMC1_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
//{{{ gpio init
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
gpio_init_structure.Alternate = GPIO_AF12_SDMMC1;
gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
HAL_GPIO_Init (GPIOC, &gpio_init_structure);
gpio_init_structure.Pin = GPIO_PIN_2;
HAL_GPIO_Init (GPIOD, &gpio_init_structure);
//}}}
//{{{ DMA rx parameters
dma_rx_handle.Instance = DMA2_Stream3;
dma_rx_handle.Init.Channel = DMA_CHANNEL_4;
dma_rx_handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
dma_rx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_rx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_rx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_rx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_rx_handle.Init.Mode = DMA_PFCTRL;
dma_rx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_rx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_rx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_rx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_rx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmarx, dma_rx_handle);
HAL_DMA_DeInit (&dma_rx_handle);
HAL_DMA_Init (&dma_rx_handle);
//}}}
//{{{ DMA tx parameters
dma_tx_handle.Instance = DMA2_Stream6;
dma_tx_handle.Init.Channel = DMA_CHANNEL_4;
dma_tx_handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
dma_tx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_tx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_tx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_tx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_tx_handle.Init.Mode = DMA_PFCTRL;
dma_tx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_tx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_tx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_tx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_tx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmatx, dma_tx_handle);
HAL_DMA_DeInit (&dma_tx_handle);
HAL_DMA_Init (&dma_tx_handle);
//}}}
HAL_NVIC_SetPriority (SDMMC1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ (SDMMC1_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream3_IRQn, 6, 0); // f for 769
HAL_NVIC_EnableIRQ (DMA2_Stream3_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream6_IRQn, 6, 0); // f for 769
HAL_NVIC_EnableIRQ (DMA2_Stream6_IRQn);
#else
uSdHandle.Instance = SDMMC2;
__HAL_RCC_SDMMC2_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
//{{{ gpio init
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
gpio_init_structure.Alternate = GPIO_AF10_SDMMC2;
gpio_init_structure.Pin = GPIO_PIN_3 | GPIO_PIN_4;
HAL_GPIO_Init (GPIOB, &gpio_init_structure);
gpio_init_structure.Alternate = GPIO_AF11_SDMMC2;
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
HAL_GPIO_Init (GPIOD, &gpio_init_structure);
gpio_init_structure.Pin = GPIO_PIN_9 | GPIO_PIN_10;
HAL_GPIO_Init (GPIOG, &gpio_init_structure);
//}}}
//{{{ DMA rx parameters
dma_rx_handle.Instance = DMA2_Stream0;
dma_rx_handle.Init.Channel = DMA_CHANNEL_11;
dma_rx_handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
dma_rx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_rx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_rx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_rx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_rx_handle.Init.Mode = DMA_PFCTRL;
dma_rx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_rx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_rx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_rx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_rx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmarx, dma_rx_handle);
HAL_DMA_DeInit (&dma_rx_handle);
HAL_DMA_Init (&dma_rx_handle);
//}}}
//{{{ DMA tx parameters
dma_tx_handle.Instance = DMA2_Stream5;
dma_tx_handle.Init.Channel = DMA_CHANNEL_11;
dma_tx_handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
dma_tx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_tx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_tx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_tx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_tx_handle.Init.Mode = DMA_PFCTRL;
dma_tx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_tx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_tx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_tx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_tx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmatx, dma_tx_handle);
HAL_DMA_DeInit (&dma_tx_handle);
HAL_DMA_Init (&dma_tx_handle);
//}}}
HAL_NVIC_SetPriority (SDMMC2_IRQn, 0x5, 0); //e
HAL_NVIC_EnableIRQ (SDMMC2_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream0_IRQn, 0x6, 0); //f
HAL_NVIC_EnableIRQ (DMA2_Stream0_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream5_IRQn, 0x6, 0); // f
HAL_NVIC_EnableIRQ (DMA2_Stream5_IRQn);
#endif
// HAL SD initialization
if (HAL_SD_Init (&uSdHandle, &uSdCardInfo) != SD_OK)
return MSD_ERROR;
if (HAL_SD_WideBusOperation_Config (&uSdHandle, SDMMC_BUS_WIDE_4B) != SD_OK)
return MSD_ERROR;
if (HAL_SD_HighSpeed (&uSdHandle) != SD_OK)
return MSD_ERROR;
//osMutexDef (sdMutex);
//mSdMutex = osMutexCreate (osMutex (sdMutex));
mReadCache = (uint8_t*)pvPortMalloc (512 * mReadCacheSize);
return MSD_OK;
}
/**
* @brief Initializes the SD MSP.
* @param hsd: SD handle
* @retval None
*/
__weak void BSP_SD_MspInit(SD_HandleTypeDef *hsd, void *Params)
{
static DMA_HandleTypeDef dma_rx_handle;
static DMA_HandleTypeDef dma_tx_handle;
static DMA_HandleTypeDef dma_rx_handle2;
static DMA_HandleTypeDef dma_tx_handle2;
GPIO_InitTypeDef gpio_init_structure;
/* Camera has to be powered down as some signals use same GPIOs between
* SD card and camera bus. Camera drives its signals to low impedance
* when powered ON. So the camera is powered off to let its signals
* in high impedance */
/* Camera power down sequence */
BSP_IO_ConfigPin(RSTI_PIN, IO_MODE_OUTPUT);
BSP_IO_ConfigPin(XSDN_PIN, IO_MODE_OUTPUT);
/* De-assert the camera STANDBY pin (active high) */
BSP_IO_WritePin(XSDN_PIN, BSP_IO_PIN_RESET);
/* Assert the camera RSTI pin (active low) */
BSP_IO_WritePin(RSTI_PIN, BSP_IO_PIN_RESET);
if(hsd->Instance == SDMMC1)
{
/* Enable SDIO clock */
__HAL_RCC_SDMMC1_CLK_ENABLE();
/* Enable DMA2 clocks */
__DMAx_TxRx_CLK_ENABLE();
/* Enable GPIOs clock */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/* Common GPIO configuration */
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
gpio_init_structure.Alternate = GPIO_AF12_SDMMC1;
/* GPIOC configuration: SD1_D0, SD1_D1, SD1_D2, SD1_D3 and SD1_CLK pins */
gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
HAL_GPIO_Init(GPIOC, &gpio_init_structure);
/* GPIOD configuration: SD1_CMD pin */
gpio_init_structure.Pin = GPIO_PIN_2;
HAL_GPIO_Init(GPIOD, &gpio_init_structure);
/* NVIC configuration for SDIO interrupts */
HAL_NVIC_SetPriority(SDMMC1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
dma_rx_handle.Init.Channel = SD1_DMAx_Rx_CHANNEL;
dma_rx_handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
dma_rx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_rx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_rx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_rx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_rx_handle.Init.Mode = DMA_PFCTRL;
dma_rx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_rx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_rx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_rx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_rx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
dma_rx_handle.Instance = SD1_DMAx_Rx_STREAM;
/* Associate the DMA handle */
__HAL_LINKDMA(hsd, hdmarx, dma_rx_handle);
/* Deinitialize the stream for new transfer */
HAL_DMA_DeInit(&dma_rx_handle);
/* Configure the DMA stream */
HAL_DMA_Init(&dma_rx_handle);
dma_tx_handle.Init.Channel = SD1_DMAx_Tx_CHANNEL;
dma_tx_handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
dma_tx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_tx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_tx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_tx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_tx_handle.Init.Mode = DMA_PFCTRL;
dma_tx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_tx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_tx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_tx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_tx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
dma_tx_handle.Instance = SD1_DMAx_Tx_STREAM;
/* Associate the DMA handle */
__HAL_LINKDMA(hsd, hdmatx, dma_tx_handle);
/* Deinitialize the stream for new transfer */
HAL_DMA_DeInit(&dma_tx_handle);
/* Configure the DMA stream */
HAL_DMA_Init(&dma_tx_handle);
/* NVIC configuration for DMA transfer complete interrupt */
HAL_NVIC_SetPriority(SD1_DMAx_Rx_IRQn, 6, 0);
HAL_NVIC_EnableIRQ(SD1_DMAx_Rx_IRQn);
/* NVIC configuration for DMA transfer complete interrupt */
HAL_NVIC_SetPriority(SD1_DMAx_Tx_IRQn, 6, 0);
HAL_NVIC_EnableIRQ(SD1_DMAx_Tx_IRQn);
}
else
{
/* Enable SDIO clock */
__HAL_RCC_SDMMC2_CLK_ENABLE();
/* Enable DMA2 clocks */
__DMAx_TxRx_CLK_ENABLE();
/* Enable GPIOs clock */
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
/* Common GPIO configuration */
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
gpio_init_structure.Alternate = GPIO_AF10_SDMMC2;
/* GPIOB configuration: SD2_D2 and SD2_D3 pins */
gpio_init_structure.Pin = GPIO_PIN_3 | GPIO_PIN_4;
HAL_GPIO_Init(GPIOB, &gpio_init_structure);
/* GPIOD configuration: SD2_CLK and SD2_CMD pins */
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
gpio_init_structure.Alternate = GPIO_AF11_SDMMC2;
HAL_GPIO_Init(GPIOD, &gpio_init_structure);
/* GPIOG configuration: SD2_D0 and SD2_D1 pins */
gpio_init_structure.Pin = GPIO_PIN_9 | GPIO_PIN_10;
HAL_GPIO_Init(GPIOG, &gpio_init_structure);
/* NVIC configuration for SDIO interrupts */
HAL_NVIC_SetPriority(SDMMC2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(SDMMC2_IRQn);
dma_rx_handle2.Init.Channel = SD2_DMAx_Rx_CHANNEL;
dma_rx_handle2.Init.Direction = DMA_PERIPH_TO_MEMORY;
dma_rx_handle2.Init.PeriphInc = DMA_PINC_DISABLE;
dma_rx_handle2.Init.MemInc = DMA_MINC_ENABLE;
dma_rx_handle2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_rx_handle2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_rx_handle2.Init.Mode = DMA_PFCTRL;
dma_rx_handle2.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_rx_handle2.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_rx_handle2.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_rx_handle2.Init.MemBurst = DMA_MBURST_INC4;
dma_rx_handle2.Init.PeriphBurst = DMA_PBURST_INC4;
dma_rx_handle2.Instance = SD2_DMAx_Rx_STREAM;
/* Associate the DMA handle */
__HAL_LINKDMA(hsd, hdmarx, dma_rx_handle2);
/* Deinitialize the stream for new transfer */
HAL_DMA_DeInit(&dma_rx_handle2);
/* Configure the DMA stream */
HAL_DMA_Init(&dma_rx_handle2);
dma_tx_handle2.Init.Channel = SD2_DMAx_Tx_CHANNEL;
dma_tx_handle2.Init.Direction = DMA_MEMORY_TO_PERIPH;
dma_tx_handle2.Init.PeriphInc = DMA_PINC_DISABLE;
dma_tx_handle2.Init.MemInc = DMA_MINC_ENABLE;
dma_tx_handle2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_tx_handle2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_tx_handle2.Init.Mode = DMA_PFCTRL;
dma_tx_handle2.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_tx_handle2.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_tx_handle2.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_tx_handle2.Init.MemBurst = DMA_MBURST_INC4;
dma_tx_handle2.Init.PeriphBurst = DMA_PBURST_INC4;
dma_tx_handle2.Instance = SD2_DMAx_Tx_STREAM;
/* Associate the DMA handle */
__HAL_LINKDMA(hsd, hdmatx, dma_tx_handle2);
/* Deinitialize the stream for new transfer */
HAL_DMA_DeInit(&dma_tx_handle2);
/* Configure the DMA stream */
HAL_DMA_Init(&dma_tx_handle2);
/* NVIC configuration for DMA transfer complete interrupt */
HAL_NVIC_SetPriority(SD2_DMAx_Rx_IRQn, 6, 0);
HAL_NVIC_EnableIRQ(SD2_DMAx_Rx_IRQn);
/* NVIC configuration for DMA transfer complete interrupt */
HAL_NVIC_SetPriority(SD2_DMAx_Tx_IRQn, 6, 0);
HAL_NVIC_EnableIRQ(SD2_DMAx_Tx_IRQn);
}
}
