unsigned long millis() { unsigned long m; istate_t state = __get_interrupt_state(); __disable_interrupt(); // uint8_t oldSREG = SREG; // disable interrupts while we read timer0_millis or we might get an // inconsistent value (e.g. in the middle of a write to timer0_millis) // cli(); m = timer0_millis; __set_interrupt_state(state); // SREG = oldSREG; return m; }
void eeprom_write_bytes(char* bytes, unsigned int num_bytes) { char *Flash_ptr; // Initialize Flash pointer Flash_ptr = (char *) 0x1880; __disable_interrupt(); FCTL3 = FWKEY; // Clear Lock bit FCTL1 = FWKEY+ERASE; // Set Erase bit *Flash_ptr = 0; // Dummy write to erase Flash seg FCTL1 = FWKEY+WRT; // Set WRT bit for write operation unsigned int i; for(i = 0 ; i < num_bytes ; ++ i) *Flash_ptr++ = bytes[i]; // Write value to flash FCTL1 = FWKEY; // Clear WRT bit FCTL3 = FWKEY+LOCK; // Set LOCK bit __enable_interrupt(); }
void i2cRead(unsigned char *field, unsigned char byteCount){ TI_receive_field = field; if ( byteCount == 1 ){ byteCtr = 0 ; __disable_interrupt(); UCB0CTL1 |= UCTXSTT; // I2C start condition while (UCB0CTL1 & UCTXSTT); // Start condition sent? UCB0CTL1 |= UCTXSTP; // I2C stop condition __enable_interrupt(); } else if ( byteCount > 1 ) { byteCtr = byteCount - 2 ; UCB0CTL1 = (UCB0CTL1 & ~UCTR) | UCTXSTT; } else while (1); // illegal parameter return; }
void FlashCtl_unlockInfoA (uint16_t baseAddress) { //Disable global interrupts while doing RMW operation on LOCKA bit uint16_t gieStatus; gieStatus = __get_SR_register() & GIE; //Store current SR register __disable_interrupt(); //Disable global interrupt //Clear the LOCKA bit in FCTL3. //Since LOCKA toggles when you write a 1 (and writing 0 has no effect), //read the register, mask the lower byte, and write it back. HWREG16(baseAddress + OFS_FCTL3) = FWKEY + (HWREG16(baseAddress + OFS_FCTL3) & 0xFF); //Reinstate SR register to restore global interrupt enable status __bis_SR_register(gieStatus); }
void main() { __disable_interrupt(); init_core(); init_device(); init_wdt(); __enable_interrupt(); microrl_init (pointerMicrorl, &serprintf); microrl_set_execute_callback (pointerMicrorl, execute); microrl_set_complete_callback (pointerMicrorl, complet); microrl_set_sigint_callback (pointerMicrorl, sigint); init_app_settings(); print_revision(); DEBUG_PRINTF("FlashMem: %s %s\n\r", get_family_desc_at25df(), get_density_desc_at25df()); enable_default_lis3dh(); init_tasks(); init_reco_drift(); init_can_j1939(); DEBUG_PRINTF("\r\n\r\n"); while (1) { if (pointerRingBuff->size(pointerRingBuff) > 0) { const uint8_t data = pointerRingBuff->get(pointerRingBuff); if (!get_proto_type()) { microrl_insert_char (pointerMicrorl, data); } else { sdp_insert_char(data); } } poll_can_msg(); run_tasks(); clear_wdt(); } }
/* This function indicates the status of the interface intfNum. If a send operation is active for this interface, the function also returns the number of bytes that have been transmitted to the host. If a receiver operation is active for this interface, the function also returns the number of bytes that have been received from the host and are waiting at the assigned address. returns kUSBHID_waitingForSend (indicates that a call to USBHID_SendData() has been made, for which data transfer has not been completed) returns kUSBHID_waitingForReceive (indicates that a receive operation has been initiated, but not all data has yet been received) returns kUSBHID_dataWaiting (indicates that data has been received from the host, waiting in the USB receive buffers) */ BYTE USBHID_intfStatus(BYTE intfNum, WORD* bytesSent, WORD* bytesReceived) { BYTE ret = 0; *bytesSent = 0; *bytesReceived = 0; //interrupts disable __disable_interrupt(); // Is send operation underway? if (HidWriteCtrl.nHidBytesToSendLeft != 0) { ret |= kUSBHID_waitingForSend; *bytesSent = HidWriteCtrl.nHidBytesToSend - HidWriteCtrl.nHidBytesToSendLeft; } //Is receive operation underway? if (HidReadCtrl.pUserBuffer != NULL) { ret |= kUSBHID_waitingForReceive; *bytesReceived = HidReadCtrl.nBytesToReceive - HidReadCtrl.nBytesToReceiveLeft; } else // not receive operation started { // do not access USB memory if suspended (PLL off). It may produce BUS_ERROR if (!bFunctionSuspended) { if((tOutputEndPointDescriptorBlock[EDB(HID_OUTEP_ADDR)].bEPBCTX & EPBCNT_NAK) | //any of buffers has a valid data packet (tOutputEndPointDescriptorBlock[EDB(HID_OUTEP_ADDR)].bEPBCTY & EPBCNT_NAK)) { ret |= kUSBHID_dataWaiting; } } } if ((bFunctionSuspended) || (bEnumerationStatus != ENUMERATION_COMPLETE)) { // if suspended or not enumerated - report no other tasks pending ret = kUSBHID_busNotAvailable; } //interrupts enable __enable_interrupt(); return ret; }
/****************************************************************************** * @fn HalOTAInvRC * * @brief Invalidate the active image so that the boot code will instantiate * the DL image on the next reset. * * @param None. * * @return None. */ void HalOTAInvRC(void) { // Save interrupt and watchdog settings. istate_t ist = __get_interrupt_state(); uint8 wdt = WDTCTL & 0xFF; WDTCTL = WDTPW + WDTHOLD; // Stop watchdog per data sheet. __disable_interrupt(); // Stop interrupts to insure sequential writes in time. FCTL3 = FWKEY; // Clear Lock bit. FCTL1 = FWKEY + WRT; // Set WRT bit for write operation *((uint16 *)LO_ROM_BEG) = 0x0000; FCTL1 = FWKEY; // Clear WRT bit FCTL3 = FWKEY + LOCK; // Set LOCK bit WDTCTL = WDTPW + wdt; // Restore watchdog setting. __set_interrupt_state(ist); // Restore interrupts setting. }
int main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT if (CALBC1_8MHZ==0xFF) // If calibration constant erased { while(1); // do not load, trap CPU!! } DCOCTL = 0; // Select lowest DCOx and MODx settings BCSCTL1 = CALBC1_8MHZ; DCOCTL = CALDCO_8MHZ; // Load 8MHz constants P1OUT &= ~BIT0; // Clear P1.0 P1DIR |= BIT0; // P1.0 output P1SEL |= BIT1 + BIT2; // Use P3.4/P3.5 for USCI_A0 P1SEL2 |= BIT1 + BIT2; // Both P1SEL & P1SEL2 bits must be set for UCA functions UCA0CTL1 |= UCSWRST; // Set SW Reset UCA0CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK, keep SW reset UCA0BR0 = 52; // 8MHz/52=153.8KHz UCA0BR1 = 0; UCA0MCTL = UCBRF_1 + UCOS16; // Set 1st stage modulator to 1 // 16-times oversampling mode UCA0IRTCTL = UCIRTXPL2 + UCIRTXPL0 + UCIRTXCLK + UCIREN; // Pulse length = 6 half clock cyc // Enable BITCLK16, IrDA enc/dec UCA0CTL1 &= ~UCSWRST; // Resume operation TxByte = 0x00; // TX data and pointer, 8-bit while (1) { for (i = 1000; i; i--); // Small delay while (!(IFG2 & UCA0TXIFG)); // USCI_A0 TX buffer ready? UCA0TXBUF = TxByte; // TX character __disable_interrupt(); IE2 |= UCA0RXIE; // Enable RX int __bis_SR_register(CPUOFF + GIE); // Enter LPM0 w/ interrupts RxData[TxByte] = RxByte; // Store RXed character in RAM if (TxByte != RxByte) // RX OK? { P1OUT |= BIT0; // LED P1.0 on while (1); // Trap PC here } TxByte++; // Next character to TX } }
static void EnterShippingMode(void) { /* Turn off the watchdog timer */ WDTCTL = WDTPW | WDTHOLD; EnableRstPin(); __delay_cycles(100000); __disable_interrupt(); __no_operation(); /* * the radio draws more current in reset than it does after * the patch is loaded */ DISABLE_DISPLAY_POWER(); DISABLE_LCD_ENABLE(); BATTERY_CHARGE_DISABLE(); LIGHT_SENSOR_SHUTDOWN(); BATTERY_SENSE_DISABLE(); HARDWARE_CFG_SENSE_DISABLE(); APPLE_POWER_DISABLE(); ACCELEROMETER_INT_DISABLE(); DISABLE_BUTTONS(); SELECT_ACLK(SELA__REFOCLK); SELECT_FLLREF(SELREF__REFOCLK); UCSCTL8 &= ~SMCLKREQEN; UCSCTL6 |= SMCLKOFF; /* disable aclk */ P11SEL &= ~BIT0; XT1_Stop(); /* turn off the regulator */ unsigned char temp = PMMCTL0_L; PMMCTL0_H = PMMPW_H; PMMCTL0_L = PMMREGOFF | temp; LPM4; __no_operation(); __no_operation(); /* should not get here without a power event */ SoftwareReset(); }
//***************************************************************************** // //! \brief Locks the information flash memory segment A //! //! This function is typically called after an erase or write operation on the //! information flash segment is performed by any of the other API functions in //! order to re-lock the information flash segment. //! //! //! \return None // //***************************************************************************** void FLASH_lockInfoA (void) { //Disable global interrupts while doing RMW operation on LOCKA bit uint16_t gieStatus; gieStatus = __get_SR_register() & GIE; //Store current SR register __disable_interrupt(); //Disable global interrupt //Set the LOCKA bit in FCTL3. //Since LOCKA toggles when you write a 1 (and writing 0 has no effect), //read the register, XOR with LOCKA mask, mask the lower byte //and write it back. HWREG16(FLASH_BASE + OFS_FCTL3) = FWKEY + ((HWREG16(FLASH_BASE + OFS_FCTL3) ^ LOCKA) & 0xFF); //Reinstate SR register to restore global interrupt enable status __bis_SR_register(gieStatus); }
int iap_prepare_sector(unsigned char start_sector, unsigned char end_sector) { __disable_interrupt(); iap_entry=(IAP) IAP_LOCATION; IAP_CNTRL.command[0]=CMD_PREPARE_SECTORS; IAP_CNTRL.command[1]= start_sector; IAP_CNTRL.command[2]= end_sector; iap_entry (IAP_CNTRL.command, IAP_CNTRL.result); __enable_interrupt(); if(IAP_CNTRL.result[0] != STATUS_CMD_SUCCESS) { return IAP_CNTRL.result[0]; } return IAP_CNTRL.result[0]; }
/* this is for unrecoverable errors */ void ForceWatchdogReset(void) { __disable_interrupt(); #if USE_LED_FOR_WATCHDOG_DEBUG ENABLE_LCD_LED(); WATCHDOG_LED_DELAY(); #endif #if USE_FAILSAFE_WATCHDOG while(1); #else /* write the inverse of the password and cause a reset */ WDTCTL = ~WDTPW; #endif }
void flash_write(u16 * wptr, u16 data) { // Range check //if ((page < DATALOG_MEMORY_START) || (page > DATALOG_MEMORY_END)) return; // Wait until not busy while ((FCTL3 & BUSY) != 0) ; __disable_interrupt(); FCTL3 = FWKEY; // Clear Lock bit *wptr = 0; // Dummy write to erase Flash seg FCTL1 = FWKEY + WRT; // Set WRT bit for write operation *wptr = data; FCTL1 = FWKEY; // Clear WRT bit FCTL3 = FWKEY + LOCK; // Set LOCK bit __enable_interrupt(); }
void mss_hal_sleep(void) #endif /* (MSS_TASK_USE_TIMER == TRUE) */ { #if (MSS_TASK_USE_TIMER == TRUE) if(sleep_timeout != MSS_SLEEP_NO_TIMEOUT) { // save delay timer ticks delay_timer_cnt = sleep_timeout; } #endif /* (MSS_TASK_USE_TIMER == TRUE) */ // go to LPM0 to keep SMCLK generating WDT interrupt __bis_SR_register(LPM0_bits + GIE); // disable interrupt __disable_interrupt(); }
int iap_write_flash(unsigned long flash_address,unsigned char *ram_address, unsigned long size, unsigned long clk_speed) { __disable_interrupt(); IAP_CNTRL.command[0]= CMD_COPY_RAM_TO_FLASH; IAP_CNTRL.command[1]= (unsigned int)flash_address; IAP_CNTRL.command[2]= (unsigned int) ram_address; IAP_CNTRL.command[3]= size; IAP_CNTRL.command[4]= clk_speed; iap_entry (IAP_CNTRL.command, IAP_CNTRL.result); __enable_interrupt(); if(IAP_CNTRL.result[0] != STATUS_CMD_SUCCESS) { return IAP_CNTRL.result[0]; } return IAP_CNTRL.result[0]; }
/************************************************************************* * Description: sets the current time count with a value * Returns: none * Notes: none *************************************************************************/ unsigned long timer_milliseconds_set( unsigned index, unsigned long value) { uint8_t sreg = 0; /* holds interrupts pending */ unsigned long old_value = 0; /* return value */ if (index < MAX_MILLISECOND_TIMERS) { sreg = SREG; __disable_interrupt(); old_value = Millisecond_Counter[index]; Millisecond_Counter[index] = value; SREG = sreg; } return old_value; }
/* Sends data over interface intfNum, of size size and starting at address data. Returns: kUSBHID_sendStarted kUSBHID_sendComplete kUSBHID_intBusyError */ BYTE USBHID_sendData(const BYTE* data, WORD size, BYTE intfNum) { unsigned short bGIE; BYTE edbIndex; edbIndex = stUsbHandle[intfNum].edb_Index; if (size == 0) { return kUSBHID_generalError; } bGIE = (__get_SR_register() &GIE); //save interrupt status // atomic operation - disable interrupts __disable_interrupt(); // Disable global interrupts // do not access USB memory if suspended (PLL off). It may produce BUS_ERROR if ((bFunctionSuspended) || (bEnumerationStatus != ENUMERATION_COMPLETE)) { // data can not be read because of USB suspended __bis_SR_register(bGIE); //restore interrupt status return kUSBHID_busNotAvailable; } if (HidWriteCtrl[INTFNUM_OFFSET(intfNum)].nHidBytesToSendLeft != 0) { // the USB still sends previous data, we have to wait __bis_SR_register(bGIE); //restore interrupt status return kUSBHID_intfBusyError; } //This function generate the USB interrupt. The data will be sent out from interrupt HidWriteCtrl[INTFNUM_OFFSET(intfNum)].nHidBytesToSend = size; HidWriteCtrl[INTFNUM_OFFSET(intfNum)].nHidBytesToSendLeft = size; HidWriteCtrl[INTFNUM_OFFSET(intfNum)].pHidBufferToSend = data; //trigger Endpoint Interrupt - to start send operation USBIEPIFG |= 1<<(edbIndex+1); //IEPIFGx; __bis_SR_register(bGIE); //restore interrupt status return kUSBHID_sendStarted; }
void nRF_IRQ_Config() { __disable_interrupt(); // 0: Input 1: Output PD_DDR_DDR2 = 0; // 0: Floating input 1: with pull-up PD_CR1_C12 = 0; // 0: External Interrupt Disabled 1: External Interrupt enabled PD_CR2_C22 = 1; // Set up the interrupt. EXTI_CR1_PDIS = 0; // Falling edge and low level EXTI_CR2_TLIS = 0; // Falling edge only. __enable_interrupt(); }
void openserial_startInput() { if (openserial_input_buffer_fill_level>0) { openserial_printError(COMPONENT_OPENSERIAL,ERR_INPUTBUFFER_LENGTH, (errorparameter_t)openserial_input_buffer_fill_level, (errorparameter_t)0); openserial_input_buffer_fill_level = 0; } openserial_input_command[4] = SERIAL_INPUT_BUFFER_SIZE; UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); // clear possible pending interrupts UC1IE |= (UCA1RXIE | UCA1TXIE); // Enable USCI_A1 TX & RX interrupt __disable_interrupt(); openserial_mode = MODE_INPUT; openserial_input_command_index = 0; openserial_ready_receive_command = FALSE; openserial_ready_receive_length = FALSE; UCA1TXBUF = openserial_input_command[openserial_input_command_index]; __enable_interrupt(); }
/***************************************************************************//** * @brief Read a frame of bytes via SPI * @param pBuffer Place to store the received bytes * @param size Indicator of how many bytes to receive * @return None ******************************************************************************/ void SDCard_readFrame (uint8_t *pBuffer, uint16_t size) { uint16_t gie = __get_SR_register() & GIE; //Store current GIE state __disable_interrupt(); //Make this operation atomic UCB1IFG &= ~UCRXIFG; //Ensure RXIFG is clear //Clock the actual data transfer and receive the bytes while (size--){ while (!(UCB1IFG & UCTXIFG)) ; //Wait while not ready for TX UCB1TXBUF = 0xff; //Write dummy byte while (!(UCB1IFG & UCRXIFG)) ; //Wait for RX buffer (full) *pBuffer++ = UCB1RXBUF; } __bis_SR_register(gie); //Restore original GIE state }
void displayMenu(struct Solid* cursor) { ILI9340_setBgColor(COLOR_GREEN); __disable_interrupt(); printf_setFont_properties(3, 0, COLOR_BLUE, COLOR_GREEN); printf_setFont_location(9, 280); _printf("JConsole6 v1.33"); printf_setFont_properties(2, 0, COLOR_BLUE, COLOR_GREEN); printf_setFont_location(35, 280); _printf("by: Jonathan L Clark"); printf_setFont_properties(2, 6, COLOR_BLUE, COLOR_GREEN); printf_setFont_location(61, 280); _printf("Star Trek\r\nBrick Breaker\r\nDebris\r\nPong\r\nDraw"); build_solid(cursor, 65, 290, 8, 8, COLOR_RED); __enable_interrupt(); }
void Port_Mapping(void) { __disable_interrupt(); // Disable Interrupts before altering Port Mapping registers PMAPPWD = 0x02D52; // Enable Write-access to modify port mapping registers #ifdef PORT_MAP_RECFG PMAPCTL = PMAPRECFG; // Allow reconfiguration during runtime #endif P3MAP0 = PM_TD0CLKMCLK; P3MAP1 = PM_TD0_0SMCLK; P3MAP2 = PM_TD1OUTH; PMAPPWD = 0; // Disable Write-Access to modify port mapping registers #ifdef PORT_MAP_EINT __enable_interrupt(); // Re-enable all interrupts #endif }
// // Main program loop. // int main(void) { int d; __disable_interrupt(); InitialiseSystemClock(); InitialiseUSART(); __enable_interrupt(); // Configure pins PD_DDR = 0x01; PD_CR1 = 0x01; // Loop do { PD_ODR ^= 0x01; for(d = 0; d < 29000; d++) { } USARTPrintf("Hello from my microcontroller....\n\r"); } while(1); }
int iap_erase_sector(unsigned char start_sector, unsigned char end_sector, unsigned long clk_speed) { __disable_interrupt(); IAP_CNTRL.command[0]=CMD_ERASE_SECTORS; IAP_CNTRL.command[1]= start_sector; IAP_CNTRL.command[2]= end_sector; IAP_CNTRL.command[3]= clk_speed; iap_entry (IAP_CNTRL.command, IAP_CNTRL.result); __enable_interrupt(); if(IAP_CNTRL.result[0] != STATUS_CMD_SUCCESS) { return IAP_CNTRL.result[0]; } return IAP_CNTRL.result[0]; }
uint16_t MeasureSMCLK() { TACTL = TASSEL_2 | MC_2 | TACLR; TACCTL0 = CCIS_1 | CAP | CM_1 | CCIE; __enable_interrupt(); LPM0; __disable_interrupt(); _i = 0; for (uint16_t i = 9; i > 0; i --) { _s[i] -= _s[i-1]; } _s[0] = 0; return _s[8]; }
error_t openserial_printData(uint8_t* buffer, uint8_t length) { uint8_t counter; __disable_interrupt(); openserial_somethingInOutputBuffer=TRUE; openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^'; //preamble openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^'; openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)'^'; openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)'D'; //this is data // openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)((idmanager_getMyID(ADDR_16B))->addr_16b[1]); // openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)((idmanager_getMyID(ADDR_16B))->addr_16b[0]); for (counter=0;counter<length;counter++){ openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)buffer[counter]; } openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$'; //postamble openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$'; openserial_output_buffer[output_buffer_index_write_increment()]=(uint8_t)'$'; __enable_interrupt(); return E_SUCCESS; }
void main(void) { WDTCTL = WDTPW + WDTHOLD; // Stop WDT if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF) { while(1); // If calibration constants erased // do not load, trap CPU!! } DCOCTL = CALDCO_8MHZ; // Load 8MHz constants BCSCTL1 = CALBC1_8MHZ; P2SEL |= 0x10; // Use P2.4 for Timer_A P2DIR |= 0x10; // P2.4 output P3SEL |= 0x30; // Use P3.4/P3.5 for USCI_A0 UCA0CTL1 |= UCSWRST; // Set SW Reset UCA0CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK, keep SW reset UCA0BR0 = 52; // 8MHz/52=153.8KHz UCA0BR1 = 0; UCA0MCTL = UCBRF_1 + UCOS16; // Set 1st stage modulator to 1 // 16-times oversampling mode UCA0IRTCTL = UCIRTXPL2 + UCIRTXPL0 + UCIRTXCLK + UCIREN; // Pulse length = 6 half clock cyc // Enable BITCLK16, IrDA enc/dec UCA0IRRCTL = UCIRRXPL; // Light = low pulse UCA0CTL1 &= ~UCSWRST; // Resume operation TACCTL2 = OUT; // TXD Idle as Mark TACTL = TASSEL_2 + MC_2; // SMCLK, continuous mode while (1) { __disable_interrupt(); IE2 |= UCA0RXIE; // Enable RX int __bis_SR_register(CPUOFF + GIE); // Enter LPM0 w/ interrupts TX_Byte(Nibble2ASCII[(RxByte >> 4) & 0x0f]); // TX upper nibble while (TACCTL2 & CCIE); // Loop while TX is pending TX_Byte(Nibble2ASCII[RxByte & 0x0f]); // TX lower nibble while (TACCTL2 & CCIE); // Loop while TX is pending TX_Byte(' '); // TX space character while (TACCTL2 & CCIE); // Loop while TX is pending } }
// czyszczenie segmentu wskazanego przez mem_ptr void clear_memory(unsigned int *mem_ptr) { unsigned short wdog_state; istate_t state = __get_interrupt_state(); __disable_interrupt(); wdog_state = WDTCTL; // zachowaj stan watchdoga WDTCTL = WDTPW + WDTCNTCL; // zresetuj watchdoga WDTCTL = WDTPW + WDTHOLD; // wylacz watch-doga //flash. 514 kHz < SMCLK < 952 kHz FCTL2 = FWKEY +FSSEL1+FN0; // ustawienie zegarow SMLCK/2 FCTL3 = FWKEY; // wyczysc LOCK FCTL1 = FWKEY + ERASE; // wlacz kasowanie *mem_ptr = 0; // kasowanie segmentu FCTL1 = FWKEY; // wylacz zapis FCTL3 = FWKEY + LOCK; // ustaw LOCK if ((WATCHDOG_ON) && !(wdog_state & WDTHOLD)) WDTCTL = WDTPW; // wlacz watchdoga __set_interrupt_state(state); }
void changeI2CDevice(int commID){ __disable_interrupt(); unsigned char IER=UCB1IE; UCB1CTL1|=UCSWRST; UCB1BRW=deviceArray[commID]->BaudDiv; RXBytes=deviceArray[commID]->rxPnt; UCB1I2CSA=(deviceArray[commID]->rAddr); UCB1CTL1 &= ~UCSWRST; __enable_interrupt(); UCB1IE=IER; }
/*! \brief Write a '0' to the bus(es). (Software only driver) * * Generates the waveform for transmission of a '0' bit on the 1-Wire(R) * bus. * * \param pins A bitmask of the buses to write to. */ void OWI_WriteBit0(unsigned char pins) { unsigned char intState; // Disable interrupts. intState = __save_interrupt(); __disable_interrupt(); // Drive bus low and delay. OWI_PULL_BUS_LOW(pins); __delay_cycles(OWI_DELAY_C_STD_MODE); // Release bus and delay. OWI_RELEASE_BUS(pins); __delay_cycles(OWI_DELAY_D_STD_MODE); // Restore interrupts. __restore_interrupt(intState); }