void ARQ_Init() { u32 level; #ifdef _ARQ_DEBUG printf("ARQ_Init(%02x)\n",__ARQInitFlag); #endif if(__ARQInitFlag) return; _CPU_ISR_Disable(level); __ARQReqPendingLo = NULL; __ARQReqPendingHi = NULL; __ARQCallbackLo = NULL; __ARQCallbackHi = NULL; __ARQChunkSize = ARQ_DEF_CHUNK_SIZE; LWP_InitQueue(&__ARQSyncQueue); __lwp_queue_init_empty(&__ARQReqQueueLo); __lwp_queue_init_empty(&__ARQReqQueueHi); AR_RegisterCallback(__ARInterruptServiceRoutine); __ARQInitFlag = 1; _CPU_ISR_Restore(level); }
void ARQ_FlushQueue() { u32 level; _CPU_ISR_Disable(level); __lwp_queue_init_empty(&__ARQReqQueueLo); __lwp_queue_init_empty(&__ARQReqQueueHi); if(!__ARQCallbackLo) __ARQReqPendingLo = NULL; _CPU_ISR_Restore(level); }
static void __exi_initmap(exibus_priv *exim) { s32 i; exibus_priv *m; __lwp_queue_initialize(&_lckdev_queue,lckdevs,EXI_LOCK_DEVS,sizeof(struct _lck_dev)); for(i=0;i<EXI_MAX_CHANNELS;i++) { m = &exim[i]; m->CallbackEXI = NULL; m->CallbackEXT = NULL; m->CallbackTC = NULL; m->imm_buff = NULL; m->exi_id = 0; m->exi_idtime = 0; m->flags = 0; m->imm_len = 0; m->lck_cnt = 0; m->lockeddev = 0; m->lckd_dev_bits = 0; __lwp_queue_init_empty(&m->lckd_dev); } }