uint32_t _kuart_mix_enable
(
/* [IN] the address of the device specific information */
KUART_INFO_STRUCT_PTR io_info_ptr
)
{ /* Body */
uint8_t flags = IO_PERIPHERAL_MODULE_ENABLE | IO_PERIPHERAL_CLOCK_ENABLE;
UART_MemMapPtr sci_ptr = io_info_ptr->SCI_PTR;
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (io_info_ptr->INIT.DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Enable/disable module */
if (flags & IO_PERIPHERAL_MODULE_ENABLE) {
_kuart_mix_peripheral_enable (sci_ptr);
}
else {
_kuart_mix_peripheral_disable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE) {
_bsp_serial_io_init (io_info_ptr->INIT.DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
/* start the convert receive of RX */
dma_request_enable(io_info_ptr->RX_DCH);
return MQX_OK;
} /* Endbody */
uint_32 _kuart_int_enable
(
/* [IN] the address of the device specific information */
KUART_INFO_STRUCT_PTR io_info_ptr
)
{ /* Body */
uint_8 flags = IO_PERIPHERAL_MODULE_ENABLE | IO_PERIPHERAL_CLOCK_ENABLE;
UART_MemMapPtr sci_ptr = io_info_ptr->SCI_PTR;
#if MQX_ENABLE_LOW_POWER
uint_32 clock, mode = _lpm_get_operation_mode ();
if (mode >= LPM_OPERATION_MODES)
{
return MQX_INVALID_CONFIGURATION;
}
flags = io_info_ptr->INIT.OPERATION_MODE[mode].FLAGS;
clock = _lpm_get_clock_configuration ();
if (clock >= BSP_CLOCK_CONFIGURATIONS)
{
return MQX_INVALID_CONFIGURATION;
}
#endif
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (io_info_ptr->INIT.DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Enable/disable module */
if (flags & IO_PERIPHERAL_MODULE_ENABLE)
{
_kuart_int_peripheral_enable (sci_ptr);
}
else
{
_kuart_int_peripheral_disable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE)
{
_bsp_serial_io_init (io_info_ptr->INIT.DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
return MQX_OK;
} /* Endbody */
LPM_NOTIFICATION_RESULT _io_serial_int_operation_mode_callback
(
/* [IN] Low power notification */
LPM_NOTIFICATION_STRUCT_PTR notification,
/* [IN/OUT] Device specific data */
pointer device_specific_data
)
{
IO_SERIAL_INT_DEVICE_STRUCT_PTR dev_ptr = device_specific_data;
KUART_INIT_STRUCT_PTR init_data = dev_ptr->DEV_INIT_DATA_PTR;
uint_8 flags, tmp, bits;
if (LPM_NOTIFICATION_TYPE_PRE == notification->NOTIFICATION_TYPE)
{
/* Get the device registers */
UART_MemMapPtr sci_ptr = _bsp_get_serial_base_address (init_data->DEVICE);
if (NULL == sci_ptr)
{
return LPM_NOTIFICATION_RESULT_ERROR;
}
/* Lock access from the higher level */
_lwsem_wait (&(dev_ptr->LPM_INFO.LOCK));
/* Get required HW changes */
flags = init_data->OPERATION_MODE[notification->OPERATION_MODE].FLAGS;
/* Setup module clock to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Flush output if enabled */
if (sci_ptr->C2 & UART_C2_TE_MASK)
{
while (! (sci_ptr->SFIFO & UART_SFIFO_TXEMPT_MASK))
{ };
while (! (sci_ptr->S1 & UART_S1_TC_MASK))
{ };
}
/* Setup pin mux */
_bsp_serial_io_init (init_data->DEVICE, flags & (~ IO_PERIPHERAL_CLOCK_DISABLE));
/* Setup wakeup */
if (flags & IO_PERIPHERAL_WAKEUP_ENABLE)
{
bits = init_data->OPERATION_MODE[notification->OPERATION_MODE].WAKEUP_BITS;
tmp = sci_ptr->C1 & (~ (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
sci_ptr->C1 = tmp | (bits & (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
tmp = sci_ptr->C4 & (~ (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->C4 = tmp | (bits & (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->MA1 = init_data->OPERATION_MODE[notification->OPERATION_MODE].MA1;
sci_ptr->MA2 = init_data->OPERATION_MODE[notification->OPERATION_MODE].MA2;
tmp = sci_ptr->C2 & (~ (UART_C2_RWU_MASK));
sci_ptr->C2 = tmp | (bits & UART_C2_RWU_MASK);
dev_ptr->LPM_INFO.FLAGS = (flags & (IO_PERIPHERAL_WAKEUP_ENABLE | IO_PERIPHERAL_WAKEUP_SLEEPONEXIT_DISABLE));
}
else
{
sci_ptr->C2 &= (~ (UART_C2_RWU_MASK));
sci_ptr->C1 &= (~ (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
sci_ptr->C4 &= (~ (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->MA1 = 0;
sci_ptr->MA2 = 0;
dev_ptr->LPM_INFO.FLAGS = 0;
}
/* Enable/disable module according to operation mode */
if ((flags & IO_PERIPHERAL_MODULE_ENABLE) && (dev_ptr->COUNT > 0))
{
_kuart_int_peripheral_enable (sci_ptr);
}
else
{
_kuart_int_peripheral_disable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE)
{
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
/* Unlock */
_lwsem_post (&(dev_ptr->LPM_INFO.LOCK));
}
return LPM_NOTIFICATION_RESULT_OK;
}
LPM_NOTIFICATION_RESULT _io_serial_int_clock_configuration_callback
(
/* [IN] Low power notification */
LPM_NOTIFICATION_STRUCT_PTR notification,
/* [IN/OUT] Device specific data */
pointer device_specific_data
)
{
IO_SERIAL_INT_DEVICE_STRUCT_PTR dev_ptr = device_specific_data;
KUART_INIT_STRUCT_PTR init_data = dev_ptr->DEV_INIT_DATA_PTR;
uint_8 flags;
/* Get the device registers */
UART_MemMapPtr sci_ptr = _bsp_get_serial_base_address (init_data->DEVICE);
if (NULL == sci_ptr)
{
return LPM_NOTIFICATION_RESULT_ERROR;
}
if (LPM_NOTIFICATION_TYPE_PRE == notification->NOTIFICATION_TYPE)
{
/* Lock access from the higher level */
_lwsem_wait (&(dev_ptr->LPM_INFO.LOCK));
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Flush output if enabled */
if (sci_ptr->C2 & UART_C2_TE_MASK)
{
while (! (sci_ptr->SFIFO & UART_SFIFO_TXEMPT_MASK))
{ };
while (! (sci_ptr->S1 & UART_S1_TC_MASK))
{ };
}
/* Turn off module */
_kuart_int_peripheral_disable (sci_ptr);
}
if (LPM_NOTIFICATION_TYPE_POST == notification->NOTIFICATION_TYPE)
{
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Setup same baudrate for new clock frequency */
_kuart_change_baudrate (sci_ptr, _cm_get_clock (notification->CLOCK_CONFIGURATION, init_data->CLOCK_SOURCE), init_data->BAUD_RATE);
/* Turn on module if requested */
flags = init_data->OPERATION_MODE[notification->OPERATION_MODE].FLAGS;
if ((flags & IO_PERIPHERAL_MODULE_ENABLE) && (dev_ptr->COUNT > 0))
{
_kuart_int_peripheral_enable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE)
{
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
/* Unlock */
_lwsem_post (&(dev_ptr->LPM_INFO.LOCK));
}
return LPM_NOTIFICATION_RESULT_OK;
}
uint_32 _mcf53xx_uart_serial_polled_init
(
/* [IN] the initialization information for the device being opened */
MCF53XX_UART_SERIAL_INIT_STRUCT_PTR io_init_ptr,
/* [OUT] the address to store device specific information */
pointer _PTR_ io_info_ptr_ptr,
/* [IN] the rest of the name of the device opened */
char _PTR_ open_name_ptr
)
{ /* Body */
volatile MCF53XX_UART_STRUCT _PTR_ uart_ptr;
MCF53XX_UART_SERIAL_INFO_STRUCT _PTR_ uart_info_ptr;
uint_32 channel;
uint_32 baud;
uart_info_ptr = _mem_alloc_system_zero((uint_32)
sizeof(MCF53XX_UART_SERIAL_INFO_STRUCT));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if ( uart_info_ptr == NULL ) {
return(MQX_OUT_OF_MEMORY);
}/* Endif */
#endif
_mem_set_type(uart_info_ptr,MEM_TYPE_IO_SERIAL_INFO_STRUCT);
*io_info_ptr_ptr = uart_info_ptr;
/* Save initialization values */
uart_info_ptr->INIT = *io_init_ptr;
channel = uart_info_ptr->INIT.DEVICE;
_bsp_serial_io_init (channel);
uart_ptr = _bsp_get_serial_base_address (channel);
uart_info_ptr->UART_PTR = (pointer)uart_ptr;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_RX;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_TX;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_ERROR;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_BREAK;
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_RESET_POINTER;
uart_ptr->WRITE.UMR = uart_info_ptr->INIT.UMR1_VALUE;
uart_ptr->WRITE.UMR = uart_info_ptr->INIT.UMR2_VALUE;
uart_ptr->WRITE.UCSR = MCF53XX_UART_UCSR_RX_TIMER |
MCF53XX_UART_UCSR_TX_TIMER;
uart_ptr->WRITE.UIMR = 0; /* Disable all interrupts */
/* Set up the baud rate */
/* baud = fsck / (32 * baudrate) + 0.5 */
baud = (uart_info_ptr->INIT.CLOCK_SPEED + (16 * uart_info_ptr->INIT.BAUD_RATE) ) / (32 * uart_info_ptr->INIT.BAUD_RATE);
uart_ptr->WRITE.UBG1 = (uchar)((baud >> 8) & 0xFF);
uart_ptr->WRITE.UBG2 = (uchar)(baud & 0xFF);
uart_ptr->WRITE.UCR = MCF53XX_UART_UCR_TX_ENABLE |
MCF53XX_UART_UCR_RX_ENABLE;
return( MQX_OK );
} /* Endbody */
/*FUNCTION*-------------------------------------------------------------------
*
* Function Name : _bsp_spi_io_init
* Returned Value : 0 for success, -1 for failure
* Comments :
* This function performs BSP-specific initialization related to I2C
*
*END*----------------------------------------------------------------------*/
_mqx_int _bsp_spi_io_init
(
uint_8 dev_num
)
{
MPC5125_IO_CONTROL_STRUCT_PTR ioc_ptr = MPC5125_IOC_ADDR();
_bsp_serial_io_init(dev_num);
#if BSP_SPI_MEMORY_GPIO_CS
switch (dev_num) {
case 0:
#if BSPCFG_PCS0_USES_PSC0
ioc_ptr->PSC0_1 = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT1,MPC5125_GPIO_PIN(16),MPC5125_GPIO_OUT_EN,1,0,1);
#elif BSPCFG_PCS0_USES_FEC1
ioc_ptr->FEC1_RX_CLK = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3;/* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT1,MPC5125_GPIO_PIN(5),MPC5125_GPIO_OUT_EN,1,0,1);
#else
return IO_ERROR;
#endif
break;
case 1:
return IO_ERROR; /* PSC1 can not set SPI_SS as GPIO out put function */
case 2:
#if BSPCFG_PCS2_USES_EMB
ioc_ptr->EMB_AD14 = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT1,MPC5125_GPIO_PIN(22),MPC5125_GPIO_OUT_EN,1,0,1);
#elif BSPCFG_PCS2_USES_FEC1
ioc_ptr->FEC1_TXD_3 = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT2,MPC5125_GPIO_PIN(20),MPC5125_GPIO_OUT_EN,1,0,1);
#else
return IO_ERROR;
#endif
break;
case 3:
#if BSPCFG_PCS3_USES_LPC_EMB
ioc_ptr->LPC_RWB = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT1,MPC5125_GPIO_PIN(6),MPC5125_GPIO_OUT_EN,1,0,1);
#elif BSPCFG_PCS3_USES_FEC1
ioc_ptr->FEC1_RXD_1 = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT2,MPC5125_GPIO_PIN(25),MPC5125_GPIO_OUT_EN,1,0,1);
#else
return IO_ERROR;
#endif
break;
case 4:
#if BSPCFG_PCS4_USES_DUI
ioc_ptr->DIU_DE = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* PSC4 can not set SPI_SS as GPIO out put function */
#elif BSPCFG_PCS4_USES_USB1
ioc_ptr->USB1_DATA6 = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* PSC4 can not set SPI_SS as GPIO out put function */
#else
return IO_ERROR;
#endif
break;
case 5:
#if BSPCFG_PCS5_USES_DIU
/* This mode PSC5 can not set SPI_SS as GPIO out put function */
return IO_ERROR;
#elif BSPCFG_PCS5_USES_SDHC1
ioc_ptr->SDHC1_D0 = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT1,MPC5125_GPIO_PIN(13),MPC5125_GPIO_OUT_EN,1,0,1);
#else
return IO_ERROR;
#endif
break;
case 6:
#if BSPCFG_PCS6_USES_DIU
ioc_ptr->DIU_LD09 = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT2,MPC5125_GPIO_PIN(6),MPC5125_GPIO_OUT_EN,1,0,1);
#else
return IO_ERROR;
#endif
break;
case 7:
/* PSC7 can not set SPI_SS as GPIO out put function */
return IO_ERROR;
case 8:
#if BSPCFG_PCS8_USES_DIU_I2C
ioc_ptr->DIU_LD21 = IO_CONTROL_FUNCTION_1|IO_CONTROL_SLEW_RATE_3; /* SPI_SS */
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT1,MPC5125_GPIO_PIN(15),MPC5125_GPIO_OUT_EN,1,0,1);
#else
return IO_ERROR;
#endif
break;
case 9:
#if BSPCFG_PCS9_USES_CAN
ioc_ptr->CAN2_TX = IO_CONTROL_FUNCTION_3|IO_CONTROL_SLEW_RATE_3;
/* Set SPI_SS as GPIO out put function */
_mpc5125_gpio_pin_config(MPC5125_GPIO_PORT2,MPC5125_GPIO_PIN(27),MPC5125_GPIO_OUT_EN,1,0,1);
#else
return IO_ERROR;
#endif
break;
default:
return IO_ERROR;
}
#endif
ioc_ptr->GBOBE = IO_CONTROL_ENABLE;
return MQX_OK;
}
