/* Assign the global native and preset table pointers, find the native
table's size in memory and then call the preset setup routine. */
int
setup_x86_presets( int cputype )
{
int retval = PAPI_OK;
if ( ( retval = _papi_libpfm_init(&MY_VECTOR) ) != PAPI_OK ) {
return retval;
}
if ( is_pentium4() ) {
/* load the baseline event map for all Pentium 4s */
_papi_libpfm_setup_presets( "Intel Pentium4", 0 ); /* base events */
/* fix up the floating point and vector ops */
if ( ( retval = _papi_p4_hwd_fixup_fp( ) ) != PAPI_OK )
return ( retval );
if ( ( retval = _papi_hwd_fixup_vec( ) ) != PAPI_OK )
return ( retval );
/* install L3 cache events iff 3 levels of cache exist */
if ( _papi_hwi_system_info.hw_info.mem_hierarchy.levels == 3 )
_papi_libpfm_setup_presets( "Intel Pentium4 L3", 0 );
/* overload with any model dependent events */
if ( cputype == PERFCTR_X86_INTEL_P4 ) {
/* do nothing besides the base map */
} else if ( cputype == PERFCTR_X86_INTEL_P4M2 ) {
}
#ifdef PERFCTR_X86_INTEL_P4M3
else if ( cputype == PERFCTR_X86_INTEL_P4M3 ) {
}
#endif
else {
PAPIERROR( MODEL_ERROR );
return ( PAPI_ESBSTR );
}
} else {
switch ( cputype ) {
case PERFCTR_X86_GENERIC:
case PERFCTR_X86_WINCHIP_C6:
case PERFCTR_X86_WINCHIP_2:
case PERFCTR_X86_VIA_C3:
case PERFCTR_X86_INTEL_P5:
case PERFCTR_X86_INTEL_P5MMX:
SUBDBG( "This cpu is supported by the perfctr-x86 substrate\n" );
PAPIERROR( MODEL_ERROR );
return ( PAPI_ESBSTR );
case PERFCTR_X86_INTEL_P6:
_papi_libpfm_setup_presets( "Intel P6", 0 ); /* base events */
break;
case PERFCTR_X86_INTEL_PII:
_papi_libpfm_setup_presets( "Intel P6", 0 ); /* base events */
break;
case PERFCTR_X86_INTEL_PIII:
_papi_libpfm_setup_presets( "Intel P6", 0 ); /* base events */
_papi_libpfm_setup_presets( "Intel PentiumIII", 0 ); /* events that differ from Pentium M */
break;
#ifdef PERFCTR_X86_INTEL_PENTM
case PERFCTR_X86_INTEL_PENTM:
_papi_libpfm_setup_presets( "Intel P6", 0 ); /* base events */
_papi_libpfm_setup_presets( "Intel PentiumM", 0 ); /* events that differ from PIII */
break;
#endif
#ifdef PERFCTR_X86_INTEL_CORE
case PERFCTR_X86_INTEL_CORE:
_papi_libpfm_setup_presets( "Intel Core Duo/Solo", 0 );
break;
#endif
#ifdef PERFCTR_X86_INTEL_CORE2
case PERFCTR_X86_INTEL_CORE2:
_papi_libpfm_setup_presets( "Intel Core2", 0 );
break;
#endif
case PERFCTR_X86_AMD_K7:
_papi_libpfm_setup_presets( "AMD64 (K7)", 0 );
break;
#ifdef PERFCTR_X86_AMD_K8 /* this is defined in perfctr 2.5.x */
case PERFCTR_X86_AMD_K8:
_papi_libpfm_setup_presets( "AMD64", 0 );
_papi_hwd_fixup_fp( "AMD64" );
break;
#endif
#ifdef PERFCTR_X86_AMD_K8C /* this is defined in perfctr 2.6.x */
case PERFCTR_X86_AMD_K8C:
_papi_libpfm_setup_presets( "AMD64", 0 );
_papi_hwd_fixup_fp( "AMD64" );
break;
#endif
#ifdef PERFCTR_X86_AMD_FAM10 /* this is defined in perfctr 2.6.29 */
case PERFCTR_X86_AMD_FAM10:
_papi_libpfm_setup_presets( "AMD64 (Barcelona)", 0 );
break;
#endif
#ifdef PERFCTR_X86_INTEL_ATOM /* family 6 model 28 */
case PERFCTR_X86_INTEL_ATOM:
_papi_libpfm_setup_presets( "Intel Atom", 0 );
break;
#endif
#ifdef PERFCTR_X86_INTEL_NHLM /* family 6 model 26 */
case PERFCTR_X86_INTEL_NHLM:
_papi_libpfm_setup_presets( "Intel Nehalem", 0 );
break;
#endif
#ifdef PERFCTR_X86_INTEL_WSTMR
case PERFCTR_X86_INTEL_WSTMR:
_papi_libpfm_setup_presets( "Intel Westmere", 0 );
break;
#endif
default:
PAPIERROR( MODEL_ERROR );
return PAPI_ESBSTR;
}
SUBDBG( "Number of native events: %d\n",
MY_VECTOR.cmp_info.num_native_events );
}
return retval;
}
int
_perfctr_init_component( int cidx )
{
int retval;
struct perfctr_info info;
char abiv[PAPI_MIN_STR_LEN];
#if defined(PERFCTR26)
int fd;
#else
struct vperfctr *dev;
#endif
#if defined(PERFCTR26)
/* Get info from the kernel */
/* Use lower level calls per Mikael to get the perfctr info
without actually creating a new kernel-side state.
Also, close the fd immediately after retrieving the info.
This is much lighter weight and doesn't reserve the counter
resources. Also compatible with perfctr 2.6.14.
*/
fd = _vperfctr_open( 0 );
if ( fd < 0 ) {
strncpy(_perfctr_vector.cmp_info.disabled_reason,
VOPEN_ERROR,PAPI_MAX_STR_LEN);
return PAPI_ESYS;
}
retval = perfctr_info( fd, &info );
close( fd );
if ( retval < 0 ) {
strncpy(_perfctr_vector.cmp_info.disabled_reason,
VINFO_ERROR,PAPI_MAX_STR_LEN);
return PAPI_ESYS;
}
/* copy tsc multiplier to local variable */
/* this field appears in perfctr 2.6 and higher */
tb_scale_factor = ( long long ) info.tsc_to_cpu_mult;
#else
/* Opened once for all threads. */
if ( ( dev = vperfctr_open( ) ) == NULL ) {
strncpy(_perfctr_vector.cmp_info.disabled_reason,
VOPEN_ERROR,PAPI_MAX_STR_LEN);
return PAPI_ESYS;
}
SUBDBG( "_perfctr_init_component vperfctr_open = %p\n", dev );
/* Get info from the kernel */
retval = vperfctr_info( dev, &info );
if ( retval < 0 ) {
strncpy(_perfctr_vector.cmp_info.disabled_reason,
VINFO_ERROR,PAPI_MAX_STR_LEN);
return ( PAPI_ESYS );
}
vperfctr_close( dev );
#endif
/* Fill in what we can of the papi_system_info. */
retval = _papi_os_vector.get_system_info( &_papi_hwi_system_info );
if ( retval != PAPI_OK )
return ( retval );
/* Setup memory info */
retval = _papi_os_vector.get_memory_info( &_papi_hwi_system_info.hw_info,
( int ) info.cpu_type );
if ( retval )
return ( retval );
strcpy( _perfctr_vector.cmp_info.name,"perfctr.c" );
strcpy( _perfctr_vector.cmp_info.version, "$Revision$" );
sprintf( abiv, "0x%08X", info.abi_version );
strcpy( _perfctr_vector.cmp_info.support_version, abiv );
strcpy( _perfctr_vector.cmp_info.kernel_version, info.driver_version );
_perfctr_vector.cmp_info.CmpIdx = cidx;
_perfctr_vector.cmp_info.num_cntrs = ( int ) PERFCTR_CPU_NRCTRS( &info );
_perfctr_vector.cmp_info.num_mpx_cntrs=_perfctr_vector.cmp_info.num_cntrs;
if ( info.cpu_features & PERFCTR_FEATURE_RDPMC )
_perfctr_vector.cmp_info.fast_counter_read = 1;
else
_perfctr_vector.cmp_info.fast_counter_read = 0;
_perfctr_vector.cmp_info.fast_real_timer = 1;
_perfctr_vector.cmp_info.fast_virtual_timer = 1;
_perfctr_vector.cmp_info.attach = 1;
_perfctr_vector.cmp_info.attach_must_ptrace = 1;
_perfctr_vector.cmp_info.default_domain = PAPI_DOM_USER;
#if !defined(PPC64)
/* AMD and Intel ia386 processors all support unit mask bits */
_perfctr_vector.cmp_info.cntr_umasks = 1;
#endif
#if defined(PPC64)
_perfctr_vector.cmp_info.available_domains =
PAPI_DOM_USER | PAPI_DOM_KERNEL | PAPI_DOM_SUPERVISOR;
#else
_perfctr_vector.cmp_info.available_domains = PAPI_DOM_USER | PAPI_DOM_KERNEL;
#endif
_perfctr_vector.cmp_info.default_granularity = PAPI_GRN_THR;
_perfctr_vector.cmp_info.available_granularities = PAPI_GRN_THR;
if ( info.cpu_features & PERFCTR_FEATURE_PCINT )
_perfctr_vector.cmp_info.hardware_intr = 1;
else
_perfctr_vector.cmp_info.hardware_intr = 0;
SUBDBG( "Hardware/OS %s support counter generated interrupts\n",
_perfctr_vector.cmp_info.hardware_intr ? "does" : "does not" );
strcpy( _papi_hwi_system_info.hw_info.model_string,
PERFCTR_CPU_NAME( &info ) );
_papi_hwi_system_info.hw_info.model = ( int ) info.cpu_type;
#if defined(PPC64)
_papi_hwi_system_info.hw_info.vendor = PAPI_VENDOR_IBM;
if ( strlen( _papi_hwi_system_info.hw_info.vendor_string ) == 0 )
strcpy( _papi_hwi_system_info.hw_info.vendor_string, "IBM" );
#else
_papi_hwi_system_info.hw_info.vendor =
xlate_cpu_type_to_vendor( info.cpu_type );
#endif
/* Setup presets last. Some platforms depend on earlier info */
#if !defined(PPC64)
// retval = setup_p3_vector_table(vtable);
if ( !retval )
retval = _papi_libpfm_init(&_perfctr_vector, cidx );
#else
/* Setup native and preset events */
// retval = ppc64_setup_vector_table(vtable);
if ( !retval )
retval = perfctr_ppc64_setup_native_table( );
if ( !retval )
retval = setup_ppc64_presets( info.cpu_type, cidx );
#endif
if ( retval )
return ( retval );
return ( PAPI_OK );
}
