uint_32 _bsp_enable_card ( void ) { /* Body */ KERNEL_DATA_STRUCT_PTR kernel_data; uint_32 result; _GET_KERNEL_DATA(kernel_data); /* Set the CPU type */ /* Set the CPU type */ _mqx_set_cpu_type(MQX_CPU); #if MQX_EXIT_ENABLED /* Set the bsp exit handler, called by _mqx_exit */ _mqx_set_exit_handler(_bsp_exit_handler); #endif /* Initialize the MCF51CN support functions */ _mcf51EM_initialize_support(0); /* ** Initialize the interrupt handling */ /* Mask all interrupts */ _mcf51EM_int_mask_all(); _int_set_vector_table(BSP_INTERRUPT_VECTOR_TABLE); result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED); if (result != MQX_OK) { return result; } /* Endif */ /* Initialize the timer interrupt */ _time_set_timer_vector(BSP_TIMER_INTERRUPT_VECTOR); if (_int_install_isr(BSP_TIMER_INTERRUPT_VECTOR, (void (_CODE_PTR_)(pointer))_bsp_timer_isr, NULL) == NULL) { return MQX_TIMER_ISR_INSTALL_FAIL; } /* Endif */ kernel_data->TIMER_HW_REFERENCE = _mcf51EM_timer_init_freq(BSP_TIMER, BSP_BUS_CLOCK / BSP_ALARM_FREQUENCY, FALSE); _time_set_hwtick_function(_bsp_get_hwticks, (pointer)kernel_data->TIMER_HW_REFERENCE); _time_set_hwticks_per_tick(kernel_data->TIMER_HW_REFERENCE); _time_set_ticks_per_sec(BSP_ALARM_FREQUENCY); _mcf51EM_timer_unmask_int(BSP_TIMER); #if BSPCFG_ENABLE_CPP /* initialize C++ constructors */ __cpp_init(); #endif /* Initialize RTC and MQX time */ #if BSPCFG_ENABLE_RTCDEV _bsp_rtc_io_init (); _rtc_sync_with_mqx (TRUE); #endif #if BSPCFG_ENABLE_IO_SUBSYSTEM /* Initialize the I/O Sub-system */ result = _io_init(); if (result != MQX_OK) { return result; } /* Endif */ /* Install device drivers */ #if BSPCFG_ENABLE_TTYA _mcf51xx_sci_polled_install("ttya:", &_bsp_sci0_init, _bsp_sci0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYB _mcf51xx_sci_polled_install("ttyb:", &_bsp_sci1_init, _bsp_sci1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYC _mcf51xx_sci_polled_install("ttyc:", &_bsp_sci2_init, _bsp_sci2_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYA _mcf51xx_sci_int_install("ittya:", &_bsp_sci0_init, _bsp_sci0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYB _mcf51xx_sci_int_install("ittyb:", &_bsp_sci1_init, _bsp_sci1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYC _mcf51xx_sci_int_install("ittyc:", &_bsp_sci2_init, _bsp_sci2_init.QUEUE_SIZE); #endif /* Initialize the default serial I/O */ _io_serial_default_init(); #if BSPCFG_ENABLE_I2C0 _mcf51xx_i2c_polled_install("i2c0:", &_bsp_i2c0_init); #endif #if BSPCFG_ENABLE_II2C0 _mcf51xx_i2c_int_install("ii2c0:", &_bsp_i2c0_init); #endif /* Install the GPIO driver */ #if BSPCFG_ENABLE_GPIODEV _io_gpio_install("gpio:"); #endif /* Install the LCD driver */ #if BSPCFG_ENABLE_LCD _bsp_lcd_io_init(); #endif /* Install ADC driver */ #if BSPCFG_ENABLE_ADC1 _io_adc_install("adc1:", &_bsp_adc1_init); #endif #if BSPCFG_ENABLE_ADC2 _io_adc_install("adc2:", &_bsp_adc2_init); #endif #if BSPCFG_ENABLE_ADC3 _io_adc_install("adc3:", &_bsp_adc3_init); #endif #if BSPCFG_ENABLE_ADC4 _io_adc_install("adc4:", &_bsp_adc4_init); #endif #if BSPCFG_ENABLE_SPI0 _mcf5xxx_spi16_polled_install("spi0:", &_bsp_spi0_init); #endif #if BSPCFG_ENABLE_ISPI0 _mcf5xxx_spi16_int_install("ispi0:", &_bsp_spi0_init); #endif #if BSPCFG_ENABLE_SPI1 _mcf5xxx_spi8_polled_install("spi1:", &_bsp_spi1_init); #endif #if BSPCFG_ENABLE_ISPI1 _mcf5xxx_spi8_int_install("ispi1:", &_bsp_spi1_init); #endif #if BSPCFG_ENABLE_SPI2 _mcf5xxx_spi8_polled_install("spi2:", &_bsp_spi2_init); #endif #if BSPCFG_ENABLE_ISPI2 _mcf5xxx_spi8_int_install("ispi2:", &_bsp_spi2_init); #endif /* install internal flash */ /* FLASHX1 array1 always start at address 0x00 to 0x1FFFF */ #if BSPCFG_ENABLE_FLASHX1 _mcf51em_internal_flash_array1_install("flashx1:", BSPCFG_FLASHX_SIZE1); #endif /* FLASHX2 array2 always start at address 0x20000 to 0x3FFFF */ #if BSPCFG_ENABLE_FLASHX2 _mcf51em_internal_flash_array2_install("flashx2:", BSPCFG_FLASHX_SIZE2); #endif #endif return MQX_OK; } /* Endbody */
uint_32 _bsp_enable_card ( void ) { KERNEL_DATA_STRUCT_PTR kernel_data; uint_32 result; _GET_KERNEL_DATA(kernel_data); _mqx_set_cpu_type(MQX_CPU); #if MQX_EXIT_ENABLED /* Set the bsp exit handler, called by _mqx_exit */ _mqx_set_exit_handler(_bsp_exit_handler); #endif /* Memory splitter - prevent accessing both ram banks in one instruction */ _mem_alloc_at(0, (void*)0x20000000); /* === Debugging is not allowed from here === */ /* Initialize the interrupt handling */ result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED); /* === Debugging may now resume === */ if (result != MQX_OK) { return result; } /* set possible new interrupt vector table - if MQX_ROM_VECTORS = 0 switch to ram interrupt table which was initialized in _psp_int_init) */ (void)_int_set_vector_table(BSP_INTERRUPT_VECTOR_TABLE); /* Store timer interrupt vector for debugger */ _time_set_timer_vector(BSP_TIMER_INTERRUPT_VECTOR); /* Install Timer ISR. */ if (_int_install_isr(BSP_TIMER_INTERRUPT_VECTOR, (void (_CODE_PTR_)(pointer))_bsp_systick, NULL) == NULL) { return MQX_TIMER_ISR_INSTALL_FAIL; } /** bsp low level internal initialization. ***/ _bsp_low_level_init(); /* System timer initialization */ systick_init(); /* MCG initialization and internal oscillators trimming */ if (CM_ERR_OK != _bsp_set_clock_configuration(BSP_CLOCK_CONFIGURATION_AUTOTRIM)) { return MQX_TIMER_ISR_INSTALL_FAIL; } if (CM_ERR_OK != _bsp_osc_autotrim()) { return MQX_TIMER_ISR_INSTALL_FAIL; } /* Switch to startup clock configuration */ if (CM_ERR_OK != _bsp_set_clock_configuration(BSP_CLOCK_CONFIGURATION_STARTUP)) { return MQX_TIMER_ISR_INSTALL_FAIL; } /* Initialize the system ticks */ _GET_KERNEL_DATA(kernel_data); kernel_data->TIMER_HW_REFERENCE = (BSP_SYSTEM_CLOCK / BSP_ALARM_FREQUENCY); _time_set_ticks_per_sec(BSP_ALARM_FREQUENCY); _time_set_hwticks_per_tick(kernel_data->TIMER_HW_REFERENCE); _time_set_hwtick_function(_bsp_get_hwticks, (pointer)NULL); #if MQX_ENABLE_USER_MODE _kinetis_mpu_init(); // supervisor full access, user no access for whole memory _kinetis_mpu_add_region(0, ((uchar_ptr)kernel_data->INIT.START_OF_USER_NO_MEMORY) - 1, \ MPU_WORD_M3SM(MPU_SM_RWX) | MPU_WORD_M3UM(MPU_UM_R | MPU_UM_X) | \ MPU_WORD_M2SM(MPU_SM_RWX) | MPU_WORD_M2UM(MPU_UM_R | MPU_UM_X) | \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_X) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_X)); _kinetis_mpu_add_region(((uchar_ptr)kernel_data->INIT.END_OF_USER_NO_MEMORY), (uchar_ptr)0xffffffff, \ MPU_WORD_M3SM(MPU_SM_RWX) | MPU_WORD_M3UM(MPU_UM_R | MPU_UM_X) | \ MPU_WORD_M2SM(MPU_SM_RWX) | MPU_WORD_M2UM(MPU_UM_R | MPU_UM_X) | \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_X) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_X)); // set access for user memory area #if MQX_DEFAULT_USER_ACCESS_RW // user .data RW _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_DEFAULT_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_DEFAULT_MEMORY) - 1, \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_W) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_W)); #else // user RO - this is by default // user .data RO /*_kinetis_mpu_add_region(kernel_data->INIT.START_OF_KERNEL_AREA, kernel_data->INIT.END_OF_KERNEL_AREA, \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R)); */ #endif // MQX_DEFAULT_USER_ACCESS_RW // set access for user memory area if (0 == kernel_data->INIT.END_OF_USER_HEAP) { // create user heap automaticaly, we have specified only size of heap (end of heap is zero, start of heap mean size) LWMEM_POOL_STRUCT_PTR lwmem_pool_ptr; uchar_ptr start; //start = _lwmem_alloc((char*)kernel_data->INIT.END_OF_USER_HEAP - (char*)kernel_data->INIT.START_OF_USER_HEAP + sizeof(LWMEM_POOL_STRUCT)); start = _lwmem_alloc((uint_32)kernel_data->INIT.START_OF_USER_HEAP + sizeof(LWMEM_POOL_STRUCT)); lwmem_pool_ptr = (LWMEM_POOL_STRUCT_PTR)start; start = (pointer)((uchar_ptr)start + sizeof(LWMEM_POOL_STRUCT)); _lwmem_create_pool(lwmem_pool_ptr, start, (uint_32)kernel_data->INIT.START_OF_USER_HEAP); _mem_set_pool_access(lwmem_pool_ptr, POOL_USER_RW_ACCESS); kernel_data->KD_USER_POOL = lwmem_pool_ptr; } else { // manual user heap definition _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_HEAP, ((uchar_ptr)kernel_data->INIT.END_OF_USER_HEAP) - 1, \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_W) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_W)); } // set access for user read-write memory area if (kernel_data->INIT.START_OF_USER_RW_MEMORY < kernel_data->INIT.END_OF_USER_RW_MEMORY) { _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_RW_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_RW_MEMORY) - 1, \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R | MPU_UM_W) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R | MPU_UM_W)); } // set access for user read-only memory area if (kernel_data->INIT.START_OF_USER_RO_MEMORY < kernel_data->INIT.END_OF_USER_RO_MEMORY) { _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_RO_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_RO_MEMORY) - 1, \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(MPU_UM_R) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(MPU_UM_R)); } // set access for user no access memory area if (kernel_data->INIT.START_OF_USER_NO_MEMORY < kernel_data->INIT.END_OF_USER_NO_MEMORY) { _kinetis_mpu_add_region(kernel_data->INIT.START_OF_USER_NO_MEMORY, ((uchar_ptr)kernel_data->INIT.END_OF_USER_NO_MEMORY) - 1, \ MPU_WORD_M1SM(MPU_SM_RWX) | MPU_WORD_M1UM(0) | \ MPU_WORD_M0SM(MPU_SM_RWX) | MPU_WORD_M0UM(0)); } _kinetis_mpu_enable(); #else _kinetis_mpu_disable(); #endif /* MQX_ENABLE_USER_MODE */ /* Install low power support */ #if MQX_ENABLE_LOW_POWER MC_PMPROT = MC_PMPROT_AVLP_MASK | MC_PMPROT_ALLS_MASK; // allow VLPx, LLS, disallow VLLSx _lpm_install (LPM_CPU_OPERATION_MODES, LPM_OPERATION_MODE_RUN); #endif /* MQX_ENABLE_LOW_POWER */ #if BSPCFG_ENABLE_IO_SUBSYSTEM /*------------------------------------------------------------------------*/ /* ** Initialize the I/O Sub-system */ result = _io_init(); if (result != MQX_OK) { return result; } /* Endif */ /* Initialize RTC and MQX time */ #if BSPCFG_ENABLE_RTCDEV if (MQX_OK == _bsp_rtc_io_init()) { _rtc_init (RTC_INIT_FLAG_ENABLE); _rtc_sync_with_mqx (TRUE); } #endif /* Install device drivers */ #if BSPCFG_ENABLE_TTYA _kuart_polled_install("ttya:", &_bsp_sci0_init, _bsp_sci0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYA _kuart_int_install("ittya:", &_bsp_sci0_init, _bsp_sci0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYB _kuart_polled_install("ttyb:", &_bsp_sci1_init, _bsp_sci1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYB _kuart_int_install("ittyb:", &_bsp_sci1_init, _bsp_sci1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYC _kuart_polled_install("ttyc:", &_bsp_sci2_init, _bsp_sci2_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYC _kuart_int_install("ittyc:", &_bsp_sci2_init, _bsp_sci2_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYD _kuart_polled_install("ttyd:", &_bsp_sci3_init, _bsp_sci3_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYD _kuart_int_install("ittyd:", &_bsp_sci3_init, _bsp_sci3_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYE _kuart_polled_install("ttye:", &_bsp_sci4_init, _bsp_sci4_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYE _kuart_int_install("ittye:", &_bsp_sci4_init, _bsp_sci4_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYF _kuart_polled_install("ttyf:", &_bsp_sci5_init, _bsp_sci5_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYF _kuart_int_install("ittyf:", &_bsp_sci5_init, _bsp_sci5_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_I2C0 _ki2c_polled_install("i2c0:", &_bsp_i2c0_init); #endif #if BSPCFG_ENABLE_I2C1 _ki2c_polled_install("i2c1:", &_bsp_i2c1_init); #endif #if BSPCFG_ENABLE_II2C0 _ki2c_int_install("ii2c0:", &_bsp_i2c0_init); #endif #if BSPCFG_ENABLE_II2C1 _ki2c_int_install("ii2c1:", &_bsp_i2c1_init); #endif #if BSPCFG_ENABLE_SPI0 _dspi_polled_install("spi0:", &_bsp_dspi0_init); #endif #if BSPCFG_ENABLE_ISPI0 _dspi_dma_install("ispi0:", &_bsp_dspi0_init); #endif #if BSPCFG_ENABLE_SPI1 _dspi_polled_install("spi1:", &_bsp_dspi1_init); #endif #if BSPCFG_ENABLE_ISPI1 _dspi_dma_install("ispi1:", &_bsp_dspi1_init); #endif #if BSPCFG_ENABLE_SPI2 _dspi_polled_install("spi2:", &_bsp_dspi2_init); #endif #if BSPCFG_ENABLE_ISPI2 _dspi_dma_install("ispi2:", &_bsp_dspi2_init); #endif /* Install the GPIO driver */ #if BSPCFG_ENABLE_GPIODEV _io_gpio_install("gpio:"); #endif #if BSPCFG_ENABLE_ADC0 _io_adc_install("adc0:", (pointer) &_bsp_adc0_init); #endif #if BSPCFG_ENABLE_ADC1 _io_adc_install("adc1:", (pointer) &_bsp_adc1_init); #endif #if BSPCFG_ENABLE_ESDHC _esdhc_install ("esdhc:", &_bsp_esdhc0_init); #endif /* Install the PCCard Flash drivers */ #if BSPCFG_ENABLE_PCFLASH _io_pccardflexbus_install("pccarda:", (PCCARDFLEXBUS_INIT_STRUCT _PTR_) &_bsp_cfcard_init); _io_apcflash_install("pcflasha:"); #endif #if BSPCFG_ENABLE_FLASHX _io_flashx_install("flashx:", &_bsp_flashx_init); #endif #if BSPCFG_ENABLE_IODEBUG _io_debug_install("iodebug:", &_bsp_iodebug_init); #endif #if BSPCFG_ENABLE_II2S0 _ki2s_int_install("ii2s0:", &_bsp_i2s0_init); #endif /* Initialize the default serial I/O */ _io_serial_default_init(); #endif // BSPCFG_ENABLE_IO_SUBSYSTEM return MQX_OK; }
uint_32 _bsp_enable_card ( void ) { /* Body */ KERNEL_DATA_STRUCT_PTR kernel_data; uint_32 result; _mqx_int i; /* Set the CPU type */ _mqx_set_cpu_type(MQX_CPU); /* Set the bsp exit handler, called by _mqx_exit */ _mqx_set_exit_handler(_bsp_exit_handler); /* Initialize the MCF5301x support functions */ _mcf5301_initialize_support(0); /* ** Initialize the interrupt handling */ _int_set_vector_table(BSP_RAM_INTERRUPT_VECTOR_TABLE); result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED); if (result != MQX_OK) { return result; } /* Endif */ /* Initialize the timer interrupt */ _time_set_timer_vector(BSP_TIMER_INTERRUPT_VECTOR); if (_int_install_isr(BSP_TIMER_INTERRUPT_VECTOR, (void (_CODE_PTR_)(pointer))_bsp_timer_isr, NULL) == NULL) { return MQX_TIMER_ISR_INSTALL_FAIL; } /* Endif */ _GET_KERNEL_DATA(kernel_data); /* ** Initialize the slice timer to interrupt the specified ** number of times per second */ kernel_data->TIMER_HW_REFERENCE = _mcf5301_timer_init_freq(BSP_TIMER, BSP_ALARM_FREQUENCY, BSP_SYSTEM_CLOCK, FALSE); _time_set_hwtick_function(_bsp_get_hwticks, 0); _time_set_hwticks_per_tick(kernel_data->TIMER_HW_REFERENCE); _time_set_ticks_per_sec(BSP_ALARM_FREQUENCY); /* Initialize and enable the timer interrupt */ _mcf5301_int_init(BSP_TIMER_INTERRUPT_VECTOR, BSP_TIMER_INTERRUPT_LEVEL, /*BSP_SLICE_TIMER0_INT_PRIORITY, */TRUE); /* Initialize and enable the serial UART interrupts */ _mcf5301_int_init(BSP_UART0_INT_VECTOR, BSP_UART0_INT_LEVEL, /*BSP_UART0_INT_PRIORITY, */TRUE); _mcf5301_int_init(BSP_UART1_INT_VECTOR, BSP_UART1_INT_LEVEL, /*BSP_UART1_INT_PRIORITY, */TRUE); /* Install and mask the DMA interrupt handler */ /*_int_install_isr(BSP_ENET_DMA_INTERRUPT, _mcf5301_dma_isr, (pointer)0); _mcf5301_int_init(BSP_ENET_DMA_INTERRUPT, BSP_ENET_DMA_INT_LEVEL, BSP_ENET_DMA_INT_PRIORITY, FALSE); */ #if BSP_TRAP_EXCEPTIONS _int_install_unexpected_isr(); #endif if (_mqx_monitor_type == MQX_MONITOR_TYPE_NONE) { static const PSP_MMU_INIT_STRUCT mmu_init = { /* We define the default cacheability of non-ACR mapped regions */ /* as non-cacheable and unbuffered */ MCF53XX_CACR_DCM(MCF53XX_CACHE_NONCACHEABLE_UNBUFFERED) }; /* Initialize Cache Control Register CACR */ _mmu_init((pointer)&mmu_init); /* Set up 1 instruction and 1 data ACR in two separate SDRAM areas */ /* Caution: Consider memory map in linker command file before changing regions */ /* Note: Second arg to _mmu_add_region is used in mask value in ACR */ result = _mmu_add_region(__CACHED_CODE_START, __CACHED_CODE_END - __CACHED_CODE_START, PSP_MMU_EXEC_ALLOWED); if (result != MQX_OK) return result; result = _mmu_add_region(__UNCACHED_DATA_START, __UNCACHED_DATA_END - __UNCACHED_DATA_START, PSP_MMU_DATA_CACHE_INHIBITED); if (result != MQX_OK) return result; /* Copy ACR table into ACR registers */ _MMU_ENABLE(); /* Enable cache ** 0 - Instruction cache only ** 1 - Data cache only ** 2 - Both Instruction & Data cache */ _CACHE_ENABLE(2); } /* Endif */ #if BSPCFG_ENABLE_CPP /* initialize C++ constructors */ __cpp_init(); #endif /* Initialize RTC and MQX time */ #if BSPCFG_ENABLE_RTCDEV _bsp_rtc_io_init (); _rtc_sync_with_mqx (TRUE); #endif #if BSPCFG_ENABLE_IO_SUBSYSTEM /* Initialize the I/O Sub-system */ result = _io_init(); if (result != MQX_OK) { return result; } /* Endif */ #if BSPCFG_ENABLE_TTYA _mcf53xx_uart_serial_polled_install("ttya:", &_bsp_uart0_init, _bsp_uart0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYB _mcf53xx_uart_serial_polled_install("ttyb:", &_bsp_uart1_init, _bsp_uart1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYC _mcf53xx_uart_serial_polled_install("ttyc:", &_bsp_uart2_init, _bsp_uart2_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYA _mcf53xx_uart_serial_int_install("ittya:", &_bsp_uart0_init, _bsp_uart0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYB _mcf53xx_uart_serial_int_install("ittyb:", &_bsp_uart1_init, _bsp_uart1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYC _mcf53xx_uart_serial_int_install("ittyc:", &_bsp_uart2_init, _bsp_uart2_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_I2C0 _mcf53xx_i2c_polled_install("i2c0:", &_bsp_i2c0_init); #endif #if BSPCFG_ENABLE_II2C0 _mcf53xx_i2c_int_install("ii2c0:", &_bsp_i2c0_init); #endif #if BSPCFG_ENABLE_SPI0 _mcf5xxx_dspi_polled_install("spi0:", &_bsp_dspi0_init); #endif #if BSPCFG_ENABLE_ISPI0 _mcf5xxx_dspi_int_install("ispi0:", &_bsp_dspi0_init); #endif #if BSPCFG_ENABLE_EXT_FLASH result = _io_flashx_install(&_bsp_flashx_init); #endif /* Initialize the default serial I/O */ _io_serial_default_init(); #endif /* BSPCFG_ENABLE_IO_SUBSYSTEM */ /*#if !BSP_PEG_PCI_ENABLE Initialize the PCI in master mode. This will enumerate the bus. _io_pci_init(TRUE); #endif */ /* Install the GPIO driver */ #if BSPCFG_ENABLE_GPIODEV _io_gpio_install("gpio:"); #endif #if BSPCFG_ENABLE_ESDHC _esdhc_install ("esdhc:", &_bsp_esdhc_init); #endif return MQX_OK; } /* Endbody */
void main_task ( uint_32 initial_data ) { DATE_STRUCT time_rtc; TIME_STRUCT time_mqx; if (_lwevent_create(&lwevent,0) != MQX_OK) { printf("\nMake event failed"); _task_block(); } printf ("\fStart time (MQX synchronized to RTC time during bsp init):\n\n"); /* initialize time */ time_rtc.YEAR = 2010; time_rtc.MONTH = 10; time_rtc.DAY = 15; time_rtc.HOUR = 10; time_rtc.MINUTE = 8; time_rtc.SECOND = 0; time_rtc.MILLISEC = 0; _time_from_date (&time_rtc, &time_mqx); _time_set( &time_mqx); if( _rtc_sync_with_mqx(FALSE) != MQX_OK ) { printf("\nError synchronize time!\n"); _task_block(); } _time_get (&time_mqx); _time_to_date (&time_mqx, &time_rtc); print_mqx_time(&time_rtc, &time_mqx); print_current_time(); /* except MPC5125 */ #ifndef BSP_TWRMPC5125 install_interrupt(); /* enable stopwatch */ install_stopwatch(); /* enable alarm */ install_alarm(); _lwevent_wait_ticks(&lwevent,LWE_ALARM,FALSE,0); _lwevent_clear(&lwevent,LWE_ALARM); printf ("\nALARM!\n"); print_current_time(); /* end of alarm */ printf ("Continue wasting time (2 minutes max) ...\n"); _lwevent_wait_ticks(&lwevent,LWE_STOPWATCH,FALSE,0); _lwevent_clear(&lwevent,LWE_STOPWATCH); printf ("\nSTOPWATCH!\n"); print_current_time(); printf ("\nClearing RTC:\n"); _rtc_init (RTC_INIT_FLAG_CLEAR | RTC_INIT_FLAG_ENABLE); print_current_time(); install_alarm(); _lwevent_wait_ticks(&lwevent,LWE_ALARM,FALSE,0); _lwevent_clear(&lwevent,LWE_ALARM); printf ("ALARM!\n"); print_current_time(); #else /* BSP_TWRMPC5125 */ printf ("Waste 10 seconds here\n"); _time_delay(10000); _rtc_get_time_mqxd (&time_rtc); print_rtc_time(&time_rtc, &time_mqx); #endif printf ("Synchronize RTC to MQX time again:\n"); _rtc_sync_with_mqx (FALSE); _rtc_get_time_mqxd (&time_rtc); _time_from_date (&time_rtc, &time_mqx); print_rtc_time(&time_rtc, &time_mqx); #if PSP_HAS_IRTC == 1 irtc_test(); #endif /* PSP_HAS_IRTC == 1 */ /* Test tamper event functionality on MCF51EMxx device */ #if PSP_MQX_CPU_IS_MCF51EM test_tamper(); #else printf ("Finish, press/hold reset to repeat.\n"); _task_block() ; #endif }
uint_32 _bsp_enable_card ( void ) { /* Body */ KERNEL_DATA_STRUCT_PTR kernel_data; uint_32 result; /* Set the CPU type */ _mqx_set_cpu_type(MQX_CPU); #if MQX_EXIT_ENABLED /* Set the bsp exit handler, called by _mqx_exit */ _mqx_set_exit_handler(_bsp_exit_handler); #endif /* Initialize the MCF5225 support functions */ _mcf5225_initialize_support(0); /* ** Initialize the interrupt handling */ /* Mask all interrupts */ _mcf5225_int_mask_all(); _int_set_vector_table(BSP_INTERRUPT_VECTOR_TABLE); result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED); if (result != MQX_OK) { return result; } /* Endif */ /* Initialize the timer interrupt */ _time_set_timer_vector(BSP_TIMER_INTERRUPT_VECTOR); if (_int_install_isr(BSP_TIMER_INTERRUPT_VECTOR, (void (_CODE_PTR_)(pointer))_bsp_timer_isr, NULL) == NULL) { return MQX_TIMER_ISR_INSTALL_FAIL; } /* Endif */ _GET_KERNEL_DATA(kernel_data); kernel_data->TIMER_HW_REFERENCE = _mcf5225_timer_init_freq(BSP_TIMER, BSP_ALARM_FREQUENCY, BSP_SYSTEM_CLOCK, FALSE); _time_set_hwtick_function(_bsp_get_hwticks, (pointer)kernel_data->TIMER_HW_REFERENCE); _time_set_hwticks_per_tick(kernel_data->TIMER_HW_REFERENCE); _time_set_ticks_per_sec(BSP_ALARM_FREQUENCY); _mcf5225_timer_unmask_int(BSP_TIMER); #if BSPCFG_ENABLE_CPP /* initialize C++ constructors */ __cpp_init(); #endif /* Initialize RTC and MQX time */ #if BSPCFG_ENABLE_RTCDEV _bsp_rtc_io_init (); _rtc_sync_with_mqx (TRUE); #endif #if BSPCFG_ENABLE_IO_SUBSYSTEM /* Initialize the I/O Sub-system */ result = _io_init(); if (result != MQX_OK) { return result; } /* Endif */ /* Install device drivers */ #if BSPCFG_ENABLE_TTYA _mcf52xx_uart_serial_polled_install("ttya:", &_bsp_uart0_init, _bsp_uart0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYB _mcf52xx_uart_serial_polled_install("ttyb:", &_bsp_uart1_init, _bsp_uart1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_TTYC _mcf52xx_uart_serial_polled_install("ttyc:", &_bsp_uart2_init, _bsp_uart2_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYA _mcf52xx_uart_serial_int_install("ittya:", &_bsp_uart0_init, _bsp_uart0_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYB _mcf52xx_uart_serial_int_install("ittyb:", &_bsp_uart1_init, _bsp_uart1_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_ITTYC _mcf52xx_uart_serial_int_install("ittyc:", &_bsp_uart2_init, _bsp_uart2_init.QUEUE_SIZE); #endif #if BSPCFG_ENABLE_I2C0 _mcf52xx_i2c_polled_install("i2c0:", &_bsp_i2c0_init); #endif #if BSPCFG_ENABLE_I2C1 _mcf52xx_i2c_polled_install("i2c1:", &_bsp_i2c1_init); #endif #if BSPCFG_ENABLE_II2C0 _mcf52xx_i2c_int_install("ii2c0:", &_bsp_i2c0_init); #endif #if BSPCFG_ENABLE_II2C1 _mcf52xx_i2c_int_install("ii2c1:", &_bsp_i2c1_init); #endif #if BSPCFG_ENABLE_SPI0 _mcf5xxx_qspi_polled_install("spi0:", &_bsp_qspi0_init); #endif #if BSPCFG_ENABLE_ISPI0 _mcf5xxx_qspi_int_install("ispi0:", &_bsp_qspi0_init); #endif #if BSPCFG_ENABLE_ADC _io_adc_install("adc:", NULL); #endif /* Initialize the default serial I/O */ _io_serial_default_init(); /* Install the GPIO driver */ #if BSPCFG_ENABLE_GPIODEV _io_gpio_install("gpio:"); #endif /* install internal flash */ #if BSPCFG_ENABLE_FLASHX _mcf5225_internal_flash_install("flashx:", BSPCFG_FLASHX_SIZE); #endif #endif /* ** Enable/disable the watchdog timer ** The initialization mode is defined by BSP_WATCHDOG_INITIALIZATION macro */ _bsp_setup_watchdog(); return MQX_OK; } /* Endbody */