/***************************************************************************//** * @brief Calibrates the AD9122 DCI. * * @return Returns negative error code or 0 in case of success. *******************************************************************************/ int32_t ad9122_tune_dci(struct cf_axi_converter *conv) { uint32_t reg; int32_t i = 0, dci; uint32_t err_bfield = 0; for (dci = 0; dci < 4; dci++) { ad9122_write(AD9122_REG_DCI_DELAY, dci); for (i = 0; i < ARRAY_SIZE(dac_sed_pattern); i++) { ad9122_write(AD9122_REG_SED_CTRL, 0); if(conv->pcore_set_sed_pattern) { conv->pcore_set_sed_pattern(0, dac_sed_pattern[i].i0, dac_sed_pattern[i].i1); conv->pcore_set_sed_pattern(1, dac_sed_pattern[i].q0, dac_sed_pattern[i].q1); } ad9122_write(AD9122_REG_COMPARE_I0_LSBS, dac_sed_pattern[i].i0 & 0xFF); ad9122_write(AD9122_REG_COMPARE_I0_MSBS, dac_sed_pattern[i].i0 >> 8); ad9122_write(AD9122_REG_COMPARE_Q0_LSBS, dac_sed_pattern[i].q0 & 0xFF); ad9122_write(AD9122_REG_COMPARE_Q0_MSBS, dac_sed_pattern[i].q0 >> 8); ad9122_write(AD9122_REG_COMPARE_I1_LSBS, dac_sed_pattern[i].i1 & 0xFF); ad9122_write(AD9122_REG_COMPARE_I1_MSBS, dac_sed_pattern[i].i1 >> 8); ad9122_write(AD9122_REG_COMPARE_Q1_LSBS, dac_sed_pattern[i].q1 & 0xFF); ad9122_write(AD9122_REG_COMPARE_Q1_MSBS, dac_sed_pattern[i].q1 >> 8); ad9122_write(AD9122_REG_SED_CTRL, AD9122_SED_CTRL_SED_COMPARE_EN); ad9122_write(AD9122_REG_EVENT_FLAG_2, AD9122_EVENT_FLAG_2_AED_COMPARE_PASS | AD9122_EVENT_FLAG_2_AED_COMPARE_FAIL | AD9122_EVENT_FLAG_2_SED_COMPARE_FAIL); ad9122_write(AD9122_REG_SED_CTRL, AD9122_SED_CTRL_SED_COMPARE_EN | AD9122_SED_CTRL_AUTOCLEAR_EN); msleep(100); reg = ad9122_read(AD9122_REG_SED_CTRL); if(!(reg & (AD9122_SED_CTRL_SAMPLE_ERR_DETECTED | AD9122_SED_CTRL_COMPARE_PASS))) { return -1; } if (reg & AD9122_SED_CTRL_SAMPLE_ERR_DETECTED) set_bit(dci, &err_bfield); } } dci = ad9122_find_dci(&err_bfield, 4); if(dci < 0) { return -1; } ad9122_write(AD9122_REG_DCI_DELAY, dci); ad9122_write(AD9122_REG_SED_CTRL, 0); return 0; }
/***************************************************************************//** * @brief Calibrates the AD9122 DCI. * * @return Returns negative error code or 0 in case of success. *******************************************************************************/ int32_t ad9122_tune_dci(struct cf_axi_converter *conv) { uint32_t reg, err_mask, pwr; int32_t i = 0, dci; uint32_t err_bfield = 0; pwr = ad9122_read(AD9122_REG_POWER_CTRL); ad9122_write(AD9122_REG_POWER_CTRL, pwr | AD9122_POWER_CTRL_PD_I_DAC | AD9122_POWER_CTRL_PD_Q_DAC); for (dci = 0; dci < 4; dci++) { ad9122_write(AD9122_REG_DCI_DELAY, dci); for (i = 0; i < ARRAY_SIZE(dac_sed_pattern); i++) { ad9122_write(AD9122_REG_SED_CTRL, 0); #ifdef CF_AXI_DDS if(conv->pcore_set_sed_pattern) conv->pcore_set_sed_pattern( (dac_sed_pattern[i].i1 << 16) | dac_sed_pattern[i].i0, (dac_sed_pattern[i].q1 << 16) | dac_sed_pattern[i].q0); #endif ad9122_write(AD9122_REG_COMPARE_I0_LSBS, dac_sed_pattern[i].i0 & 0xFF); ad9122_write(AD9122_REG_COMPARE_I0_MSBS, dac_sed_pattern[i].i0 >> 8); ad9122_write(AD9122_REG_COMPARE_Q0_LSBS, dac_sed_pattern[i].q0 & 0xFF); ad9122_write(AD9122_REG_COMPARE_Q0_MSBS, dac_sed_pattern[i].q0 >> 8); ad9122_write(AD9122_REG_COMPARE_I1_LSBS, dac_sed_pattern[i].i1 & 0xFF); ad9122_write(AD9122_REG_COMPARE_I1_MSBS, dac_sed_pattern[i].i1 >> 8); ad9122_write(AD9122_REG_COMPARE_Q1_LSBS, dac_sed_pattern[i].q1 & 0xFF); ad9122_write(AD9122_REG_COMPARE_Q1_MSBS, dac_sed_pattern[i].q1 >> 8); ad9122_write(AD9122_REG_SED_CTRL, AD9122_SED_CTRL_SED_COMPARE_EN); ad9122_write(AD9122_REG_EVENT_FLAG_2, AD9122_EVENT_FLAG_2_AED_COMPARE_PASS | AD9122_EVENT_FLAG_2_AED_COMPARE_FAIL | AD9122_EVENT_FLAG_2_SED_COMPARE_FAIL); ad9122_write(AD9122_REG_SED_CTRL, AD9122_SED_CTRL_SED_COMPARE_EN); msleep(100); reg = ad9122_read(AD9122_REG_SED_CTRL); err_mask = ad9122_read(AD9122_REG_SED_I_LSBS); err_mask |= ad9122_read(AD9122_REG_SED_I_MSBS); err_mask |= ad9122_read(AD9122_REG_SED_Q_LSBS); err_mask |= ad9122_read(AD9122_REG_SED_Q_MSBS); if (err_mask || (reg & AD9122_SED_CTRL_SAMPLE_ERR_DETECTED)) set_bit(dci, &err_bfield); } } ad9122_write(AD9122_REG_DCI_DELAY, ad9122_find_dci(&err_bfield, 4)); ad9122_write(AD9122_REG_SED_CTRL, 0); ad9122_write(AD9122_REG_POWER_CTRL, pwr); return 0; }