/***************************************************************************//** * @brief Writes interpolation data to the AD9122. * * @return Returns negative error code or the written data in case of success. *******************************************************************************/ uint32_t ad9122_interpolation_store(uint32_t address, int32_t readin) { struct cf_axi_converter *conv = &dds_conv; unsigned pwr; int32_t ret; pwr = ad9122_read(AD9122_REG_POWER_CTRL); ad9122_write(AD9122_REG_POWER_CTRL, pwr | AD9122_POWER_CTRL_PD_I_DAC | AD9122_POWER_CTRL_PD_Q_DAC); switch (address) { case 0: ret = ad9122_set_interpol_freq(conv, readin); break; case 1: ret = ad9122_set_interpol_fcent_freq(conv, readin); break; default: ret = -1; } if (conv->pcore_sync) conv->pcore_sync(); ad9122_write(AD9122_REG_POWER_CTRL, pwr); return ret ? ret : readin; }
/***************************************************************************//** * @brief Writes interpolation data to the AD9122. * * @return Returns negative error code or the written data in case of success. *******************************************************************************/ uint32_t ad9122_interpolation_store(uint32_t address, int32_t readin) { struct cf_axi_converter *conv = &dds_conv; int32_t ret; switch (address) { case 0: ret = ad9122_set_interpol_freq(conv, readin); break; case 1: ret = ad9122_set_interpol_fcent_freq(conv, readin); break; default: ret = -1; } if (conv->pcore_sync) conv->pcore_sync(); return ret ? ret : readin; }