struct device_d *add_dm9000_device(int id, resource_size_t base,
resource_size_t data, int flags, void *pdata)
{
struct resource *res;
resource_size_t size;
res = xzalloc(sizeof(struct resource) * 2);
switch (flags) {
case IORESOURCE_MEM_32BIT:
size = 8;
break;
case IORESOURCE_MEM_16BIT:
size = 4;
break;
case IORESOURCE_MEM_8BIT:
size = 2;
break;
default:
printf("dm9000: memory width flag missing\n");
return NULL;
}
res[0].start = base;
res[0].size = size;
res[0].flags = IORESOURCE_MEM | flags;
res[1].start = data;
res[1].size = size;
res[1].flags = IORESOURCE_MEM | flags;
return add_generic_device_res("dm9000", id, res, 2, pdata);
}
static int cfa10036_devices_init(void)
{
int i, ret;
/* initizalize muxing */
for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++)
imx_gpio_mode(cfa10036_pads[i]);
armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100);
armlinux_set_architecture(MACH_TYPE_CFA10036);
add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, SZ_8K,
IORESOURCE_MEM, &mci_pdata);
add_generic_device("ocotp", 0, NULL, IMX_OCOTP_BASE, SZ_8K,
IORESOURCE_MEM, NULL);
i2c_register_board_info(0, cfa10036_i2c_devices, ARRAY_SIZE(cfa10036_i2c_devices));
add_generic_device_res("i2c-gpio", 0, NULL, 0, &i2c_gpio_pdata);
cfa10036_detect_hw();
ret = envfs_register_partition("disk0", 1);
if (ret != 0)
printf("Cannot create the 'env0' persistent "
"environment storage (%d)\n", ret);
return 0;
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
if (!data)
return;
at91_set_A_periph(AT91_PIN_PC5, 0); /* D0 */
at91_set_A_periph(AT91_PIN_PC6, 0); /* D1 */
at91_set_A_periph(AT91_PIN_PC7, 0); /* D2 */
at91_set_A_periph(AT91_PIN_PC8, 0); /* D3 */
at91_set_A_periph(AT91_PIN_PC9, 0); /* D4 */
at91_set_A_periph(AT91_PIN_PC10, 0); /* D5 */
at91_set_A_periph(AT91_PIN_PC11, 0); /* D6 */
at91_set_A_periph(AT91_PIN_PC12, 0); /* D7 */
at91_set_A_periph(AT91_PIN_PC13, 0); /* RE */
at91_set_A_periph(AT91_PIN_PC14, 0); /* WE */
at91_set_A_periph(AT91_PIN_PC15, 1); /* NCS */
at91_set_A_periph(AT91_PIN_PC16, 1); /* RDY */
at91_set_A_periph(AT91_PIN_PC17, 1); /* ALE */
at91_set_A_periph(AT91_PIN_PC18, 1); /* CLE */
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", 0, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
static int cfa10036_devices_init(void)
{
int i;
/* initizalize muxing */
for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++)
imx_gpio_mode(cfa10036_pads[i]);
armlinux_set_architecture(MACH_TYPE_CFA10036);
add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, SZ_8K,
IORESOURCE_MEM, &mci_pdata);
add_generic_device("ocotp", 0, NULL, IMX_OCOTP_BASE, SZ_8K,
IORESOURCE_MEM, NULL);
i2c_register_board_info(0, cfa10036_i2c_devices, ARRAY_SIZE(cfa10036_i2c_devices));
add_generic_device_res("i2c-gpio", 0, NULL, 0, &i2c_gpio_pdata);
cfa10036_detect_hw();
default_environment_path_set("/dev/disk0.1");
return 0;
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH);
data->pmecc_lookup_table_offset = 0x8000;
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", 0, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
void at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices)
{
struct i2c_gpio_platform_data *pdata;
i2c_register_board_info(i2c_id, devices, nr_devices);
switch (i2c_id) {
case 0:
pdata = &pdata_i2c0;
break;
case 1:
pdata = &pdata_i2c1;
break;
case 2:
pdata = &pdata_i2c2;
break;
default:
return;
}
at91_set_GPIO_periph(pdata->sda_pin, 1); /* TWD (SDA) */
at91_set_multi_drive(pdata->sda_pin, 1);
at91_set_GPIO_periph(pdata->scl_pin, 1); /* TWCK (SCL) */
at91_set_multi_drive(pdata->scl_pin, 1);
add_generic_device_res("i2c-gpio", i2c_id, NULL, 0, pdata);
}
void at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = readl(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
csa |= AT91SAM9263_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA;
writel(csa, AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", DEVICE_ID_DYNAMIC, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
void at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (data->enable_pin)
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (data->rdy_pin)
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (data->det_pin)
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", DEVICE_ID_DYNAMIC, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
static void ek_add_device_w1(void)
{
at91_set_gpio_input(w1_pdata.pin, 0);
at91_set_multi_drive(w1_pdata.pin, 1);
add_generic_device_res("w1-gpio", DEVICE_ID_SINGLE, NULL, 0, &w1_pdata);
at91sam9x5ek_devices_detect_hw();
}
static int at91_soc_device(void)
{
struct device_d *dev;
dev = add_generic_device_res("soc", DEVICE_ID_SINGLE, NULL, 0, NULL);
dev_add_param_fixed(dev, "name", (char*)at91_get_soc_type(&at91_soc_initdata));
dev_add_param_fixed(dev, "subname", (char*)at91_get_soc_subtype(&at91_soc_initdata));
return 0;
}
struct device_d *add_usb_ehci_device(int id, resource_size_t hccr,
resource_size_t hcor, void *pdata)
{
struct resource *res;
res = xzalloc(sizeof(struct resource) * 2);
res[0].start = hccr;
res[0].flags = IORESOURCE_MEM;
res[1].start = hcor;
res[1].flags = IORESOURCE_MEM;
return add_generic_device_res("ehci", id, res, 2, pdata);
}
void at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices)
{
struct i2c_gpio_platform_data *pdata = &pdata_i2c;
i2c_register_board_info(0, devices, nr_devices);
at91_set_GPIO_periph(pdata->sda_pin, 1); /* TWD (SDA) */
at91_set_multi_drive(pdata->sda_pin, 1);
at91_set_GPIO_periph(pdata->scl_pin, 1); /* TWCK (SCL) */
at91_set_multi_drive(pdata->scl_pin, 1);
add_generic_device_res("i2c-gpio", 0, NULL, 0, pdata);
}
static __maybe_unused void add_cadence_qspi_device(int id, resource_size_t ctrl,
resource_size_t data, void *pdata)
{
struct resource *res;
res = xzalloc(sizeof(struct resource) * 2);
res[0].start = ctrl;
res[0].end = ctrl + 0x100 - 1;
res[0].flags = IORESOURCE_MEM;
res[1].start = data;
res[1].end = data + 0x100 - 1;
res[1].flags = IORESOURCE_MEM;
add_generic_device_res("cadence_qspi", id, res, 2, pdata);
}
struct device_d *add_generic_device(const char* devname, int id, const char *resname,
resource_size_t start, resource_size_t size, unsigned int flags,
void *pdata)
{
struct resource *res;
res = xzalloc(sizeof(struct resource));
if (resname)
res[0].name = xstrdup(resname);
res[0].start = start;
res[0].size = size;
res[0].flags = flags;
return add_generic_device_res(devname, id, res, 1, pdata);
}
static int pm9263_devices_init(void)
{
at91_set_gpio_input(w1_pdata.pin, 0);
add_generic_device_res("w1-gpio", DEVICE_ID_SINGLE, NULL, 0, &w1_pdata);
pm_add_device_nand();
pm9263_add_device_eth();
add_cfi_flash_device(0, AT91_CHIPSELECT_0, 4 * 1024 * 1024, 0);
devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0");
devfs_add_partition("nor0", 0x40000, 0x10000, DEVFS_PARTITION_FIXED, "env0");
armlinux_set_architecture(MACH_TYPE_PM9263);
return 0;
}
static int pm9g45_devices_init(void)
{
at91_set_gpio_input(w1_pdata.pin, 0);
add_generic_device_res("w1-gpio", DEVICE_ID_SINGLE, NULL, 0, &w1_pdata);
pm_add_device_nand();
pm9g45_add_device_mci();
pm9g45_add_device_eth();
pm9g45_add_device_usbh();
devfs_add_partition("nand0", 0x00000, SZ_128K, DEVFS_PARTITION_FIXED, "at91bootstrap_raw");
dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap");
devfs_add_partition("nand0", SZ_128K, SZ_256K, DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K, DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
armlinux_set_architecture(MACH_TYPE_PM9G45);
return 0;
}
int fsl_eth_init(int num, struct gfar_info_struct *gf)
{
struct resource *res;
res = xzalloc(3 * sizeof(struct resource));
/* TSEC interface registers */
res[0].start = GFAR_BASE_ADDR + ((num - 1) * 0x1000);
res[0].end = res[0].start + 0x1000 - 1;
res[0].flags = IORESOURCE_MEM;
/* External PHY access always through eTSEC1 */
res[1].start = MDIO_BASE_ADDR;
res[1].end = res[1].start + 0x1000 - 1;
res[1].flags = IORESOURCE_MEM;
/* Access to TBI/RTBI interface. */
res[2].start = MDIO_BASE_ADDR + ((num - 1) * 0x1000);
res[2].end = res[2].start + 0x1000 - 1;
res[2].flags = IORESOURCE_MEM;
add_generic_device_res("gfar", DEVICE_ID_DYNAMIC, res, 3, gf);
return 0;
}
static int archosg9_devices_init(void){
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
omap44xx_add_i2c1(NULL);
omap44xx_add_mmc1(NULL);
#if defined(CONFIG_KEYBOARD_TWL6030) && defined(CONFIG_KEYBOARD_GPIO)
add_generic_device_res("twl6030_pwrbtn", DEVICE_ID_DYNAMIC, 0, 0,
&pwrbtn_data);
add_gpio_keys_device(DEVICE_ID_DYNAMIC, &gk_data);
#endif
armlinux_set_bootparams((void *)0x80000100);
/*
* This should be:
* armlinux_set_architecture(MACH_TYPE_OMAP4_ARCHOSG9);
* But Archos has not registered it's board to arch/arm/tools/mach-types
* So here there is the hardcoded value
*/
armlinux_set_architecture(5032);
armlinux_set_revision(5);
armlinux_set_atag_appender(archos_append_atags);
return 0;
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
if (!data)
return;
switch (data->pmecc_sector_size) {
case 512:
data->pmecc_lookup_table_offset = 0x10000;
break;
case 1024:
data->pmecc_lookup_table_offset = 0x18000;
break;
default:
pr_err("%s: invalid pmecc_sector_size (%d)\n", __func__,
data->pmecc_sector_size);
return;
}
at91_set_A_periph(AT91_PIN_PE21, 1); /* ALE */
at91_set_A_periph(AT91_PIN_PE22, 1); /* CLE */
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", 0, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
static void at91sama5d3xek_devices_detect_one(const char *name)
{
struct one_wire_info info;
struct board_info* binfo;
struct vendor_info* vinfo;
struct device_d *dev = NULL;
char str[16];
char *bname, *vname;
u8 vendor_id = 0;
if (at91sama5d3xek_read_w1(name, &info))
return;
binfo = get_board_info_by_name(info.board_name);
if (!binfo) {
pr_err("board %s no supported\n", info.board_name);
return;
}
bname = binfo->name;
vinfo = get_vendor_info_by_name(info.vendor_name);
vname = info.vendor_name;
if (vinfo) {
vendor_id = vinfo->id;
vname = vinfo->name;
}
switch (binfo->type) {
case BOARD_TYPE_CPU:
dev = add_generic_device_res("sama5d3xcm", DEVICE_ID_SINGLE, NULL, 0, NULL);
if (!dev)
return;
sn |= (binfo->id & 0x1f);
sn |= ((vendor_id & 0x1f) << 5);
rev |= (info.revision_board - 'A');
rev |= (((info.revision_schema - '0') & 0x3) << 15);
pr_info("CM");
break;
case BOARD_TYPE_MB:
dev = add_generic_device_res("sama5d3xmb", DEVICE_ID_SINGLE, NULL, 0, NULL);
if (!dev)
return;
sn |= ((binfo->id & 0x1f) << 20);
sn |= ((vendor_id & 0x1f) << 25);
rev |= ((info.revision_board - 'A') << 10);
rev |= (((info.revision_schema - '0') & 0x3) << 21);
pr_info("MB");
break;
case BOARD_TYPE_DM:
dev = add_generic_device_res("sama5d3xdm", DEVICE_ID_SINGLE, NULL, 0, NULL);
if (!dev)
return;
sn |= ((binfo->id & 0x1f) << 10);
sn |= ((vendor_id & 0x1f) << 15);
rev |= ((info.revision_board - 'A') << 5);
rev |= (((info.revision_schema - '0') & 0x3) << 18);
pr_info("DM");
break;
}
pr_info(": %s [%c%c] from %s\n",
bname, info.revision_board, info.revision_schema, vname);
dev_add_param_fixed(dev, "vendor", vname);
dev_add_param_fixed(dev, "board", bname);
sprintf(str, "%.2s", info.vendor_country);
dev_add_param_fixed(dev, "country", str);
dev_add_param_uint32_fixed(dev, "year", info.year, "%u");
dev_add_param_uint32_fixed(dev, "week", info.week, "%u");
sprintf(str, "%c", info.revision_board);
dev_add_param_fixed(dev, "revision_board", str);
sprintf(str, "%c", info.revision_schema);
dev_add_param_fixed(dev, "revision_schema", str);
sprintf(str, "%c", info.revision_bom);
dev_add_param_fixed(dev, "revision_bom", str);
}
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
if (!data)
return;
data->pmecc_lookup_table_offset = 0x8000;
csa = readl(AT91SAM9N12_BASE_MATRIX + AT91SAM9N12_MATRIX_EBICSA);
/* Assign CS3 to NAND/SmartMedia Interface */
csa |= AT91SAM9N12_MATRIX_EBI_CS3A_SMC_NANDFLASH;
/* Configure databus */
if (!data->bus_on_d0)
csa |= AT91SAM9N12_MATRIX_NFD0_ON_D16;
else
csa &= ~AT91SAM9N12_MATRIX_NFD0_ON_D16;
/* Configure IO drive */
csa |= AT91SAM9N12_MATRIX_EBI_HIGH_DRIVE;
writel(csa, AT91SAM9N12_BASE_MATRIX + AT91SAM9N12_MATRIX_EBICSA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
/* configure NANDOE */
at91_set_A_periph(AT91_PIN_PD0, 1);
/* configure NANDWE */
at91_set_A_periph(AT91_PIN_PD1, 1);
/* configure ALE */
at91_set_A_periph(AT91_PIN_PD2, 1);
/* configure CLE */
at91_set_A_periph(AT91_PIN_PD3, 1);
/* configure multiplexed pins for D16~D31 */
if (!data->bus_on_d0) {
at91_set_A_periph(AT91_PIN_PD6, 1);
at91_set_A_periph(AT91_PIN_PD7, 1);
at91_set_A_periph(AT91_PIN_PD8, 1);
at91_set_A_periph(AT91_PIN_PD9, 1);
at91_set_A_periph(AT91_PIN_PD10, 1);
at91_set_A_periph(AT91_PIN_PD11, 1);
at91_set_A_periph(AT91_PIN_PD12, 1);
at91_set_A_periph(AT91_PIN_PD13, 1);
if (data->bus_width_16) {
at91_set_A_periph(AT91_PIN_PD14, 1);
at91_set_A_periph(AT91_PIN_PD15, 1);
at91_set_A_periph(AT91_PIN_PD16, 1);
at91_set_A_periph(AT91_PIN_PD17, 1);
at91_set_A_periph(AT91_PIN_PD18, 1);
at91_set_A_periph(AT91_PIN_PD19, 1);
at91_set_A_periph(AT91_PIN_PD20, 1);
at91_set_A_periph(AT91_PIN_PD21, 1);
}
}
add_generic_device_res("atmel_nand", DEVICE_ID_SINGLE, nand_resources,
ARRAY_SIZE(nand_resources), data);
}
static void at91sam9m10ihd_devices_detect_one(const char *name)
{
struct one_wire_info info;
struct board_info* binfo;
struct vendor_info* vinfo;
struct device_d *dev = NULL;
char str[16];
u8 vendor_id = 0;
if (at91sam9m10ihd_read_w1(name, &info))
return;
binfo = get_board_info_by_name(info.board_name);
if (!binfo) {
pr_err("board %s no supported\n", info.board_name);
return;
}
vinfo = get_vendor_info_by_name(info.vendor_name);
if (vinfo)
vendor_id = vinfo->id;
switch (binfo->type) {
case BOARD_TYPE_CPU:
dev = add_generic_device_res("at91sam9m10ihd", DEVICE_ID_SINGLE, NULL, 0, NULL);
if (!dev)
return;
sn |= (binfo->id & 0x1f);
sn |= ((vendor_id & 0x1f) << 5);
rev |= (info.revision_code - 'A');
rev |= (((info.revision_id - '0') & 0x3) << 15);
pr_info("CM");
break;
case BOARD_TYPE_DB:
dev = add_generic_device_res("at91sam9m10ihd-db", DEVICE_ID_SINGLE, NULL, 0, NULL);
if (!dev)
return;
sn |= ((binfo->id & 0x1f) << 20);
sn |= ((vendor_id & 0x1f) << 25);
rev |= ((info.revision_code - 'A') << 10);
rev |= (((info.revision_id - '0') & 0x3) << 21);
pr_info("DB");
break;
}
pr_info(": %s [%c%c] from %s\n",
info.board_name, info.revision_code, info.revision_id,
info.vendor_name);
dev_add_param_fixed(dev, "vendor", info.vendor_name);
dev_add_param_fixed(dev, "board", info.board_name);
sprintf(str, "%.2s", info.vendor_country);
dev_add_param_fixed(dev, "country", str);
dev_add_param_int_ro(dev, "year", info.year, "%d");
dev_add_param_int_ro(dev, "week", info.week, "%d");
sprintf(str, "%c", info.revision_code);
dev_add_param_fixed(dev, "revision_code", str);
sprintf(str, "%c", info.revision_id);
dev_add_param_fixed(dev, "revision_id", str);
}
