void ol_tx_desc_free(struct ol_txrx_pdev_t *pdev, struct ol_tx_desc_t *tx_desc) { adf_os_spin_lock_bh(&pdev->tx_mutex); #ifdef QCA_SUPPORT_TXDESC_SANITY_CHECKS tx_desc->pkt_type = ol_tx_frm_freed; #ifdef QCA_COMPUTE_TX_DELAY tx_desc->entry_timestamp_ticks = 0xffffffff; #endif #endif ((union ol_tx_desc_list_elem_t *)tx_desc)->next = pdev->tx_desc.freelist; pdev->tx_desc.freelist = (union ol_tx_desc_list_elem_t *) tx_desc; pdev->tx_desc.num_free++; #if defined(CONFIG_PER_VDEV_TX_DESC_POOL) #ifdef QCA_LL_TX_FLOW_CT if ( (adf_os_atomic_read(&tx_desc->vdev->os_q_paused)) && (adf_os_atomic_read(&tx_desc->vdev->tx_desc_count) < TXRX_HL_TX_FLOW_CTRL_VDEV_LOW_WATER_MARK) ) { /* wakeup netif_queue */ adf_os_atomic_set(&tx_desc->vdev->os_q_paused, 0); tx_desc->vdev->osif_flow_control_cb(tx_desc->vdev->osif_dev, tx_desc->vdev->vdev_id, A_TRUE); } #endif /* QCA_LL_TX_FLOW_CT */ adf_os_atomic_dec(&tx_desc->vdev->tx_desc_count); #endif #if defined(CONFIG_HL_SUPPORT) tx_desc->vdev = NULL; #endif adf_os_spin_unlock_bh(&pdev->tx_mutex); }
void wmi_set_d0wow_flag(wmi_unified_t wmi_handle, A_BOOL flag) { tp_wma_handle wma = wmi_handle->scn_handle; struct ol_softc *scn = vos_get_context(VOS_MODULE_ID_HIF, wma->vos_context); adf_os_atomic_set(&scn->hif_sc->in_d0wow, flag); }
void wmi_set_runtime_pm_inprogress(wmi_unified_t wmi_handle, A_BOOL val) { adf_os_atomic_set(&wmi_handle->runtime_pm_inprogress, val); }
void wmi_set_target_suspend(wmi_unified_t wmi_handle, A_BOOL val) { adf_os_atomic_set(&wmi_handle->is_target_suspended, val); }