static int am33xx_pm_begin(suspend_state_t state)
{
int ret = 0;
int state_id = 0;
disable_hlt();
switch (state) {
case PM_SUSPEND_STANDBY:
state_id = 0xb;
break;
case PM_SUSPEND_MEM:
state_id = 0x3;
break;
}
/*
* Populate the resume address as part of IPC data
* The offset to be added comes from sleep33xx.S
* Add 4 bytes to ensure that resume happens from
* the word *after* the word which holds the resume offset
*/
am33xx_lp_ipc.resume_addr = (DS_RESUME_BASE + am33xx_resume_offset + 4);
am33xx_lp_ipc.sleep_mode = state_id;
am33xx_lp_ipc.ipc_data1 = DS_IPC_DEFAULT;
am33xx_lp_ipc.ipc_data2 = DS_IPC_DEFAULT;
am33xx_ipc_cmd(&am33xx_lp_ipc);
m3_state = M3_STATE_MSG_FOR_LP;
omap_mbox_enable_irq(m3_mbox, IRQ_RX);
ret = omap_mbox_msg_send(m3_mbox, 0xABCDABCD);
if (ret) {
pr_err("A8<->CM3 MSG for LP failed\n");
am33xx_m3_state_machine_reset();
ret = -1;
}
if (!wait_for_completion_timeout(&a8_m3_sync, msecs_to_jiffies(5000))) {
pr_err("A8<->CM3 sync failure\n");
am33xx_m3_state_machine_reset();
ret = -1;
} else {
pr_debug("Message sent for entering %s\n",
(DS_MODE == DS0_ID ? "DS0" : "DS1"));
omap_mbox_disable_irq(m3_mbox, IRQ_RX);
}
suspend_state = state;
return ret;
}
static void am33xx_m3_state_machine_reset(void)
{
int ret = 0;
am33xx_lp_ipc.resume_addr = 0x0;
am33xx_lp_ipc.sleep_mode = 0xe;
am33xx_lp_ipc.ipc_data1 = DS_IPC_DEFAULT;
am33xx_lp_ipc.ipc_data2 = DS_IPC_DEFAULT;
am33xx_ipc_cmd(&am33xx_lp_ipc);
m3_state = M3_STATE_MSG_FOR_RESET;
ret = omap_mbox_msg_send(m3_mbox, 0xABCDABCD);
if (!ret) {
pr_debug("Message sent for resetting M3 state machine\n");
if (!wait_for_completion_timeout(&a8_m3_sync, msecs_to_jiffies(5000)))
pr_err("A8<->CM3 sync failure\n");
} else {
pr_err("Could not reset M3 state machine!!!\n");
m3_state = M3_STATE_UNKNOWN;
}
}
static int am33xx_pm_begin(suspend_state_t state)
{
int ret = 0;
disable_hlt();
am33xx_lp_ipc.resume_addr = DS_RESUME_ADDR;
am33xx_lp_ipc.sleep_mode = DS_MODE;
am33xx_lp_ipc.ipc_data1 = DS_IPC_DEFAULT;
am33xx_lp_ipc.ipc_data2 = DS_IPC_DEFAULT;
am33xx_ipc_cmd(&am33xx_lp_ipc);
m3_state = M3_STATE_MSG_FOR_LP;
omap_mbox_enable_irq(m3_mbox, IRQ_RX);
ret = omap_mbox_msg_send(m3_mbox, 0xABCDABCD);
if (ret) {
pr_err("A8<->CM3 MSG for LP failed\n");
am33xx_m3_state_machine_reset();
ret = -1;
}
if (!wait_for_completion_timeout(&a8_m3_sync, msecs_to_jiffies(5000))) {
pr_err("A8<->CM3 sync failure\n");
am33xx_m3_state_machine_reset();
ret = -1;
} else {
pr_debug("Message sent for entering %s\n",
(DS_MODE == DS0_ID ? "DS0" : "DS1"));
omap_mbox_disable_irq(m3_mbox, IRQ_RX);
}
suspend_state = state;
return ret;
}
