static void ar9003_mci_mute_bt(struct ath_hw *ah) { struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci; /* disable all MCI messages */ REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, 0xffff0000); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS0, 0xffffffff); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS1, 0xffffffff); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS2, 0xffffffff); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS3, 0xffffffff); REG_SET_BIT(ah, AR_MCI_TX_CTRL, AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); /* wait pending HW messages to flush out */ udelay(10); /* * Send LNA_TAKE and SYS_SLEEPING when * 1. reset not after resuming from full sleep * 2. before reset MCI RX, to quiet BT and avoid MCI RX misalignment */ if (MCI_ANT_ARCH_PA_LNA_SHARED(mci)) { ar9003_mci_send_lna_take(ah, true); udelay(5); } ar9003_mci_send_sys_sleeping(ah, true); }
static void ar9003_mci_mute_bt(struct ath_hw *ah) { REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, 0xffff0000); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS0, 0xffffffff); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS1, 0xffffffff); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS2, 0xffffffff); REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS3, 0xffffffff); REG_SET_BIT(ah, AR_MCI_TX_CTRL, AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); udelay(10); ar9003_mci_send_lna_take(ah, true); udelay(5); ar9003_mci_send_sys_sleeping(ah, true); }
static void ar9003_mci_mute_bt(struct ath_hw *ah) { /* disable all MCI messages */ REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, 0xffff0000); REG_SET_BIT(ah, AR_MCI_TX_CTRL, AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); /* wait pending HW messages to flush out */ udelay(10); /* * Send LNA_TAKE and SYS_SLEEPING when * 1. reset not after resuming from full sleep * 2. before reset MCI RX, to quiet BT and avoid MCI RX misalignment */ ar9003_mci_send_lna_take(ah, true); udelay(5); ar9003_mci_send_sys_sleeping(ah, true); }