void __noprof kernel_main_thread(void *data)
{
struct thread *me = CURRENT();
struct thread_queue tmp_q;
tq_init(&tmp_q);
tq_insert_head(me, &tmp_q);
bug_on(!scheduler_enqueue(&tmp_q));
mach_running();
kprintf("Initializing vfs core... ");
fs_init();
kprintf("Done.\n");
call_late_init();
run_tests();
load_init();
for (;;) {
scheduler_yield();
arch_idle();
}
bug();
}
void platform_halt(platform_halt_action suggested_action,
platform_halt_reason reason)
{
#if ENABLE_PANIC_SHELL
if (reason == HALT_REASON_SW_PANIC) {
dprintf(ALWAYS, "CRASH: starting debug shell... (reason = %d)\n", reason);
arch_disable_ints();
panic_shell_start();
}
#endif // ENABLE_PANIC_SHELL
switch (suggested_action) {
default:
case HALT_ACTION_SHUTDOWN:
case HALT_ACTION_HALT:
dprintf(ALWAYS, "HALT: spinning forever... (reason = %d)\n", reason);
arch_disable_ints();
for (;;)
arch_idle();
break;
case HALT_ACTION_REBOOT:
dprintf(INFO, "REBOOT\n");
arch_disable_ints();
for (;;) {
NVIC_SystemReset();
}
break;
}
dprintf(ALWAYS, "HALT: spinning forever... (reason = %d)\n", reason);
arch_disable_ints();
for (;;);
}
static void * idle_run(void *arg) {
while (1) {
arch_idle();
}
return NULL;
}
void emxx_pm_idle(void)
{
local_irq_disable();
local_fiq_disable();
if (need_resched()) {
local_fiq_enable();
local_irq_enable();
return;
}
pm_idle_count++;
if (sleep_while_idle_enable && !suspend_disable) {
#ifdef CONFIG_SMP
if ((0 == hard_smp_processor_id()) &&
!(inl(SMU_CLKSTOPSIG_ST) & PWSTATE_PD_NE1)) {
/* cpu1 wfi */
emxx_close_clockgate(EMXX_CLK_TI1);
#endif
if (emxx_can_sleep()) {
emxx_sleep_while_idle = 1;
if (0 == emxx_pm_suspend(PM_SUSPEND_STANDBY)) {
emxx_add_neigh_timer();
emxx_add_timer_writeback();
emxx_add_workqueue_timer();
emxx_sleep_while_idle = 0;
sleep_while_idle_count++;
#ifdef CONFIG_SMP
emxx_open_clockgate(EMXX_CLK_TI1);
#endif
set_need_resched();
local_fiq_enable();
local_irq_enable();
return;
}
emxx_add_neigh_timer();
emxx_add_timer_writeback();
emxx_add_workqueue_timer();
emxx_sleep_while_idle = 0;
}
#ifdef CONFIG_SMP
emxx_open_clockgate(EMXX_CLK_TI1);
}
#endif
}
arch_idle();
local_fiq_enable();
local_irq_enable();
}
static int mxs_suspend_enter(suspend_state_t state)
{
switch (state) {
case PM_SUSPEND_MEM:
arch_idle();
break;
default:
return -EINVAL;
}
return 0;
}
void kmain(void)
{
task_t *task_shell;
int ret;
/*************** Init Arch ****************/
arch_early_init();
show_logo();
/*************** Init Platform ****************/
platform_init();
timer_init();
buses_init();
/*************** Init Task ****************/
task_init();
task_create_init();
/*************** Init Workqueu ****************/
init_workqueues();
/*************** Init File System ****************/
register_filesystem(&fat_fs);
/*************** Creating Shell TASK ****************/
task_shell = task_alloc("shell", 0x2000, 5);
if (NULL == task_shell)
{
return;
}
ret = task_create(task_shell, init_shell, 0);
if (ret) {
printk("Create init shell task failed\n");
}
sema_init(&sem, 1);
arch_enable_ints();
while(1)
{
enter_critical_section();
arch_idle();
task_schedule();
exit_critical_section();
}
task_free(task_shell);
}
static int mx27_suspend_enter(suspend_state_t state)
{
u32 cscr;
switch (state) {
case PM_SUSPEND_MEM:
/* Clear MPEN and SPEN to disable MPLL/SPLL */
cscr = __raw_readl(MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
cscr &= 0xFFFFFFFC;
__raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
/* Executes WFI */
arch_idle();
break;
default:
return -EINVAL;
}
return 0;
}
int ksleep(useconds_t msec) {
volatile int wait_flag; // for sleep func
sys_timer_t timer;
if(0 == msec) {
return 0;
}
wait_flag = 1;
if (timer_init_start_msec(&timer, TIMER_ONESHOT, msec , &wake_up, (void *) &wait_flag)) {
return 1;
}
while (wait_flag) {
arch_idle();
}
timer_close(&timer);
return 0;
}
/* zynq specific halt */
void platform_halt(platform_halt_action suggested_action,
platform_halt_reason reason)
{
switch (suggested_action) {
default:
case HALT_ACTION_SHUTDOWN:
case HALT_ACTION_HALT:
printf("HALT: spinning forever... (reason = %d)\n", reason);
enter_critical_section();
for(;;)
arch_idle();
break;
case HALT_ACTION_REBOOT:
printf("REBOOT\n");
enter_critical_section();
for (;;) {
zynq_slcr_unlock();
SLCR->PSS_RST_CTRL = 1;
}
break;
}
}
/*
* This function resets the system. It is called by machine_restart().
*
* @param mode indicates different kinds of resets
*/
void arch_reset(char mode)
{
#if defined(CONFIG_MOT_FEAT_SYSREBOOT_ATLAS)
int retval, mema, step = 0;
struct timeval tv;
#elif defined(CONFIG_MOT_FEAT_SYSREBOOT_CRM)
unsigned long amcr;
unsigned long crm_ap_amcr = IO_ADDRESS(CRM_AP_BASE_ADDR + CRM_AP_AMCR);
#endif /* CONFIG_MOT_FEAT_SYSREBOOT_CRM */
if (system_rev == CHIP_REV_2_0) {
/* Workaround reset problem on PASS2 by manually reset WEIM */
__raw_writel(0x00001E00, IO_ADDRESS(WEIM_CTRL_CS0 + CSCRU));
__raw_writel(0x20000D01, IO_ADDRESS(WEIM_CTRL_CS0 + CSCRL));
__raw_writel(0x0, IO_ADDRESS(WEIM_CTRL_CS0 + CSCRA));
}
#if defined(CONFIG_MOT_FEAT_SYSREBOOT_ATLAS)
/*
* Set bit 4 of the Atlas MEMA register. This bit indicates to the
* MBM that the phone is to be reset.
*/
retval = power_ic_backup_memory_read(POWER_IC_BACKUP_MEMORY_ID_ATLAS_BACKUP_SOFT_RESET,
&mema);
if(retval != 0) {
step = 1;
goto die;
}
mema |= 1;
retval = power_ic_backup_memory_write(POWER_IC_BACKUP_MEMORY_ID_ATLAS_BACKUP_SOFT_RESET,
mema);
if(retval != 0) {
step = 2;
goto die;
}
/*
* Set the Atlas RTC alarm to go off in 2 seconds. Experience indicates
* that values less than 2 may not work reliably.
*/
retval = power_ic_rtc_get_time(&tv);
if(retval != 0) {
step = 3;
goto die;
}
tv.tv_sec += 2;
retval = power_ic_rtc_set_time_alarm(&tv);
if(retval != 0) {
step = 4;
goto die;
}
/* power down the system */
__mxc_power_off();
die:
printk("recieved error %d from power_ic driver at step %d in reboot",
retval, step);
/* fall through to existing reset code */
#elif defined(CONFIG_MOT_FEAT_SYSREBOOT_CRM)
/*
* Need to Reboot via Clock Reset Module with Software reset
*/
amcr = readl( crm_ap_amcr );
amcr &= ~CRM_AP_AMCR_SW_AP;
writel( amcr, crm_ap_amcr );
while(1) {
/* stay here, software reset */
arch_idle();
}
#endif /* CONFIG_MOT_FEAT_SYSREBOOT_CRM */
if ((__raw_readw(IO_ADDRESS(WDOG1_BASE_ADDR)) & 0x4) != 0) {
asm("cpsid iaf");
while (1) {
}
} else {
__raw_writew(__raw_readw(IO_ADDRESS(WDOG1_BASE_ADDR)) | 0x4,
IO_ADDRESS(WDOG1_BASE_ADDR));
}
}
