static noinline void socrates_entry(void)
{
int ret;
arm_early_mmu_cache_invalidate();
relocate_to_current_adr();
setup_c();
socfpga_lowlevel_init(&cm_default_cfg,
sys_mgr_init_table, ARRAY_SIZE(sys_mgr_init_table));
puts_ll("lowlevel init done\n");
puts_ll("SDRAM setup...\n");
socfpga_sdram_mmr_init();
puts_ll("SDRAM calibration...\n");
ret = socfpga_sdram_calibration(inst_rom_init, inst_rom_init_size,
ac_rom_init, ac_rom_init_size);
if (ret)
hang();
puts_ll("done\n");
barebox_arm_entry(0x0, SZ_1G, 0);
}
static void __imx53_guf_vincell_init(int is_lt)
{
arm_early_mmu_cache_invalidate();
imx5_cpu_lowlevel_init();
relocate_to_current_adr();
setup_c();
barrier();
imx53_guf_vincell_init(is_lt);
}
static void noinline uncompress(uint32_t membase,
uint32_t memsize, uint32_t boarddata)
{
uint32_t offset;
uint32_t pg_len;
void __noreturn (*barebox)(uint32_t, uint32_t, uint32_t);
uint32_t endmem = membase + memsize;
unsigned long barebox_base;
uint32_t *ptr;
void *pg_start;
arm_early_mmu_cache_invalidate();
endmem -= STACK_SIZE; /* stack */
if (IS_ENABLED(CONFIG_PBL_RELOCATABLE))
relocate_to_current_adr();
/* Get offset between linked address and runtime address */
offset = get_runtime_offset();
if (IS_ENABLED(CONFIG_RELOCATABLE))
barebox_base = arm_barebox_image_place(membase + memsize);
else
barebox_base = TEXT_BASE;
setup_c();
if (IS_ENABLED(CONFIG_MMU_EARLY)) {
endmem &= ~0x3fff;
endmem -= SZ_16K; /* ttb */
mmu_early_enable(membase, memsize, endmem);
}
endmem -= SZ_128K; /* early malloc */
free_mem_ptr = endmem;
free_mem_end_ptr = free_mem_ptr + SZ_128K;
ptr = (void *)__image_end;
pg_start = ptr + 1;
pg_len = *(ptr);
pbl_barebox_uncompress((void*)barebox_base, pg_start, pg_len);
arm_early_mmu_cache_flush();
flush_icache();
if (IS_ENABLED(CONFIG_THUMB2_BAREBOX))
barebox = (void *)(barebox_base + 1);
else
barebox = (void *)barebox_base;
barebox(membase, memsize, boarddata);
}
ENTRY_FUNCTION(start_imx7s_element14_warp7, r0, r1, r2)
{
imx7_cpu_lowlevel_init();
arm_early_mmu_cache_invalidate();
relocate_to_current_adr();
setup_c();
barrier();
warp7_start();
}
void __naked __noreturn barebox_arm_entry(unsigned long membase,
unsigned long memsize, void *boarddata)
{
arm_setup_stack(arm_mem_stack(membase, membase + memsize) + STACK_SIZE - 16);
arm_early_mmu_cache_invalidate();
if (IS_ENABLED(CONFIG_PBL_MULTI_IMAGES))
barebox_multi_pbl_start(membase, memsize, boarddata);
else if (IS_ENABLED(CONFIG_PBL_SINGLE_IMAGE))
barebox_single_pbl_start(membase, memsize, boarddata);
else
barebox_non_pbl_start(membase, memsize, boarddata);
}
ENTRY_FUNCTION(start_imx6dl_mba6x, r0, r1, r2)
{
void *fdt;
imx6_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL)) {
writel(0x2, 0x020e035c);
imx6_uart_setup_ll();
putc_ll('a');
}
arm_early_mmu_cache_invalidate();
fdt = __dtb_imx6dl_mba6x_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_512M, fdt);
}
ENTRY_FUNCTION(start_imx6dl_mba6x)(void)
{
uint32_t fdt;
__barebox_arm_head();
arm_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL)) {
writel(0x2, 0x020e035c);
setup_uart();
putc_ll('a');
}
arm_early_mmu_cache_invalidate();
fdt = (uint32_t)__dtb_imx6dl_mba6x_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_512M, fdt);
}
static noinline __noreturn void __barebox_arm_entry(uint32_t membase,
uint32_t memsize, uint32_t boarddata)
{
uint32_t offset;
uint32_t pg_start, pg_end, pg_len;
void __noreturn (*barebox)(uint32_t, uint32_t, uint32_t);
uint32_t endmem = membase + memsize;
unsigned long barebox_base;
endmem -= STACK_SIZE; /* stack */
arm_early_mmu_cache_invalidate();
if (IS_ENABLED(CONFIG_PBL_RELOCATABLE))
relocate_to_current_adr();
/* Get offset between linked address and runtime address */
offset = get_runtime_offset();
pg_start = (uint32_t)&input_data - offset;
pg_end = (uint32_t)&input_data_end - offset;
pg_len = pg_end - pg_start;
if (IS_ENABLED(CONFIG_RELOCATABLE))
barebox_base = arm_barebox_image_place(membase + memsize);
else
barebox_base = TEXT_BASE;
if (offset && (IS_ENABLED(CONFIG_PBL_FORCE_PIGGYDATA_COPY) ||
region_overlap(pg_start, pg_len, barebox_base, pg_len * 4))) {
/*
* copy piggydata binary to its link address
*/
memcpy(&input_data, (void *)pg_start, pg_len);
pg_start = (uint32_t)&input_data;
}
setup_c();
if (IS_ENABLED(CONFIG_MMU_EARLY)) {
endmem &= ~0x3fff;
endmem -= SZ_16K; /* ttb */
mmu_early_enable(membase, memsize, endmem);
}
endmem -= SZ_128K; /* early malloc */
free_mem_ptr = endmem;
free_mem_end_ptr = free_mem_ptr + SZ_128K;
pbl_barebox_uncompress((void*)barebox_base, (void *)pg_start, pg_len);
arm_early_mmu_cache_flush();
flush_icache();
if (IS_ENABLED(CONFIG_THUMB2_BAREBOX))
barebox = (void *)(barebox_base + 1);
else
barebox = (void *)barebox_base;
barebox(membase, memsize, boarddata);
}
__noreturn void barebox_non_pbl_start(unsigned long membase,
unsigned long memsize, void *boarddata)
{
unsigned long endmem = membase + memsize;
unsigned long malloc_start, malloc_end;
unsigned long barebox_size = barebox_image_size + MAX_BSS_SIZE;
if (IS_ENABLED(CONFIG_RELOCATABLE)) {
unsigned long barebox_base = arm_mem_barebox_image(membase,
endmem,
barebox_size);
relocate_to_adr(barebox_base);
}
setup_c();
barrier();
pr_debug("memory at 0x%08lx, size 0x%08lx\n", membase, memsize);
arm_stack_top = endmem;
arm_barebox_size = barebox_size;
malloc_end = arm_mem_barebox_image(membase, endmem,
arm_barebox_size);
if (IS_ENABLED(CONFIG_MMU_EARLY)) {
unsigned long ttb = arm_mem_ttb(membase, endmem);
if (IS_ENABLED(CONFIG_PBL_IMAGE)) {
arm_set_cache_functions();
} else {
pr_debug("enabling MMU, ttb @ 0x%08lx\n", ttb);
arm_early_mmu_cache_invalidate();
mmu_early_enable(membase, memsize, ttb);
}
}
if (boarddata) {
uint32_t totalsize = 0;
const char *name;
if (blob_is_fdt(boarddata)) {
totalsize = get_unaligned_be32(boarddata + 4);
name = "DTB";
} else if (blob_is_compressed_fdt(boarddata)) {
struct barebox_arm_boarddata_compressed_dtb *bd = boarddata;
totalsize = bd->datalen + sizeof(*bd);
name = "Compressed DTB";
} else if (blob_is_arm_boarddata(boarddata)) {
totalsize = sizeof(struct barebox_arm_boarddata);
name = "machine type";
}
if (totalsize) {
unsigned long mem = arm_mem_boarddata(membase, endmem,
totalsize);
pr_debug("found %s in boarddata, copying to 0x%08lx\n",
name, mem);
barebox_boarddata = memcpy((void *)mem, boarddata,
totalsize);
barebox_boarddata_size = totalsize;
malloc_end = mem;
}
}
/*
* Maximum malloc space is the Kconfig value if given
* or 1GB.
*/
if (MALLOC_SIZE > 0) {
malloc_start = malloc_end - MALLOC_SIZE;
if (malloc_start < membase)
malloc_start = membase;
} else {
malloc_start = malloc_end - (malloc_end - membase) / 2;
if (malloc_end - malloc_start > SZ_1G)
malloc_start = malloc_end - SZ_1G;
}
pr_debug("initializing malloc pool at 0x%08lx (size 0x%08lx)\n",
malloc_start, malloc_end - malloc_start);
mem_malloc_init((void *)malloc_start, (void *)malloc_end - 1);
pr_debug("starting barebox...\n");
start_barebox();
}
