u_int
initarm(void *arg)
{
#ifdef MEMSIZE
psize_t memsize = (unsigned) MEMSIZE * 1024 * 1024;
#else
/* If MEMSIZE is not defined, use QEMU's default value (128 MB) */
psize_t memsize = (unsigned) 128 * 1024 * 1024;
#endif
pmap_devmap_register(vexpress_devmap);
set_cpufuncs();
consinit();
/* Talk to the user */
#define BDSTR(s) _BDSTR(s)
#define _BDSTR(s) #s
printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
#ifdef VERBOSE_INIT_ARM
printf("initarm: cbar=%#x\n", armreg_cbar_read());
#endif
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = KERN_VTOPHYS(KERNEL_BASE);
bootconfig.dram[0].pages = memsize / PAGE_SIZE;
arm32_bootmem_init(bootconfig.dram[0].address, memsize,
(uintptr_t) KERNEL_BASE_phys);
arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, vexpress_devmap,
true);
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#endif
cortex_pmc_ccnt_init();
/* We've a specific device_register routine */
evbarm_device_register = vexpress_device_register;
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Relocating the kernel to the bottom of physical memory
*/
u_int
initarm(void *arg)
{
pmap_devmap_register(devmap);
awin_bootstrap(AWIN_CORE_VBASE, CONADDR_VA);
/* Heads up ... Setup the CPU / MMU / TLB functions. */
if (set_cpufuncs())
panic("cpu not recognized!");
/* The console is going to try to map things. Give pmap a devmap. */
consinit();
#ifdef VERBOSE_INIT_ARM
printf("\nuboot arg = %#x, %#x, %#x, %#x\n",
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
#endif
#ifdef KGDB
kgdb_port_init();
#endif
cpu_reset_address = awin_wdog_reset;
#ifdef VERBOSE_INIT_ARM
/* Talk to the user */
printf("\nNetBSD/evbarm (cubie) booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) || defined(CPU_CORTEXA15)
printf("initarm: cbar=%#x\n", armreg_cbar_read());
#endif
#endif
/*
* Set up the variables that define the availability of physical
* memory.
*/
psize_t ram_size = awin_memprobe();
/*
* If MEMSIZE specified less than what we really have, limit ourselves
* to that.
*/
#ifdef MEMSIZE
if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
ram_size = (unsigned)MEMSIZE * 1024 * 1024;
#else
KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
#endif
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = AWIN_SDRAM_PBASE;
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
const bool mapallmem_p = true;
KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
#else
const bool mapallmem_p = false;
#endif
KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
KERNEL_BASE_PHYS);
arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap,
mapallmem_p);
if (mapallmem_p) {
/*
* "bootargs" env variable is passed as 4th argument
* to kernel but it's using the physical address and
* we to convert that to a virtual address.
*/
if (uboot_args[3] - AWIN_SDRAM_PBASE < ram_size) {
const char * const args = (const char *)
(uboot_args[3] + KERNEL_PHYS_VOFFSET);
strlcpy(bootargs, args, sizeof(bootargs));
}
}
boot_args = bootargs;
parse_mi_bootargs(boot_args);
/* we've a specific device_register routine */
evbarm_device_register = cubie_device_register;
#if NAWIN_FB > 0
char *ptr;
if (get_bootconf_option(boot_args, "console",
BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
use_fb_console = true;
}
#endif
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Relocating the kernel to the bottom of physical memory
*/
u_int
initarm(void *arg)
{
pmap_devmap_register(devmap);
awin_bootstrap(AWIN_CORE_VBASE, CONADDR_VA);
/* Heads up ... Setup the CPU / MMU / TLB functions. */
if (set_cpufuncs())
panic("cpu not recognized!");
/* The console is going to try to map things. Give pmap a devmap. */
consinit();
#ifdef VERBOSE_INIT_ARM
printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
#endif
#ifdef KGDB
kgdb_port_init();
#endif
cpu_reset_address = awin_wdog_reset;
#ifdef VERBOSE_INIT_ARM
/* Talk to the user */
printf("\nNetBSD/evbarm (" BOARDTYPE ") booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) || defined(CPU_CORTEXA15)
if (!CPU_ID_CORTEX_A8_P(curcpu()->ci_arm_cpuid)) {
printf("initarm: cbar=%#x\n", armreg_cbar_read());
}
#endif
#endif
/*
* Set up the variables that define the availability of physical
* memory.
*/
psize_t ram_size = awin_memprobe();
#if AWIN_board == AWIN_cubieboard
/* the cubietruck has 2GB whereas the cubieboards only has 1GB */
cubietruck_p = (ram_size == 0x80000000);
#endif
/*
* If MEMSIZE specified less than what we really have, limit ourselves
* to that.
*/
#ifdef MEMSIZE
if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
ram_size = (unsigned)MEMSIZE * 1024 * 1024;
#else
KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
#endif
/*
* Configure DMA tags
*/
awin_dma_bootstrap(ram_size);
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = AWIN_SDRAM_PBASE;
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
const bool mapallmem_p = true;
#ifndef PMAP_NEED_ALLOC_POOLPAGE
if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
printf("%s: dropping RAM size from %luMB to %uMB\n",
__func__, (unsigned long) (ram_size >> 20),
(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
ram_size = KERNEL_VM_BASE - KERNEL_BASE;
}
u_int
initarm(void *arg)
{
const struct pmap_devmap const *devmap;
bus_addr_t rambase;
const psize_t ram_reserve = 0x200000;
psize_t ram_size;
/* allocate/map our basic memory mapping */
switch (EXYNOS_PRODUCT_FAMILY(exynos_soc_id)) {
#if defined(EXYNOS4)
case EXYNOS4_PRODUCT_FAMILY:
devmap = e4_devmap;
rambase = EXYNOS4_SDRAM_PBASE;
break;
#endif
#if defined(EXYNOS5)
case EXYNOS5_PRODUCT_FAMILY:
devmap = e5_devmap;
rambase = EXYNOS5_SDRAM_PBASE;
break;
#endif
default:
/* Won't work, but... */
panic("Unknown product family %llx",
EXYNOS_PRODUCT_FAMILY(exynos_soc_id));
}
pmap_devmap_register(devmap);
/* bootstrap soc. uart_address is determined in odroid_start */
paddr_t uart_address = armreg_tpidruro_read();
exynos_bootstrap(EXYNOS_CORE_VBASE, EXYNOS_IOPHYSTOVIRT(uart_address));
/* set up CPU / MMU / TLB functions */
if (set_cpufuncs())
panic("cpu not recognized!");
/* get normal console working */
consinit();
#ifdef KGDB
kgdb_port_init();
#endif
#ifdef VERBOSE_INIT_ARM
printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
printf("Exynos SoC ID %08x\n", exynos_soc_id);
printf("initarm: cbar=%#x\n", armreg_cbar_read());
#endif
/* determine cpu0 clock rate */
exynos_clocks_bootstrap();
#ifdef VERBOSE_INIT_ARM
printf("CPU0 now running on %"PRIu64" Mhz\n", exynos_get_cpufreq()/(1000*1000));
#endif
#if NARML2CC > 0
if (CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid)) {
/* probe and enable the PL310 L2CC */
const bus_space_handle_t pl310_bh =
EXYNOS_IOPHYSTOVIRT(armreg_cbar_read());
#ifdef ARM_TRUSTZONE_FIRMWARE
exynos4_l2cc_init();
#endif
arml2cc_init(&exynos_bs_tag, pl310_bh, 0x2000);
}
#endif
cpu_reset_address = exynos_wdt_reset;
#ifdef VERBOSE_INIT_ARM
printf("\nNetBSD/evbarm (odroid) booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
boot_args = bootargs;
parse_mi_bootargs(boot_args);
exynos_extract_mac_adress();
/*
* Determine physical memory by looking at the PoP package. This PoP
* package ID seems to be only available on Exynos4
*
* First assume the default 2Gb of memory, dictated by mapping too
*/
ram_size = (psize_t) 0xC0000000 - 0x40000000;
#if defined(EXYNOS4)
switch (exynos_pop_id) {
case EXYNOS_PACKAGE_ID_2_GIG:
KASSERT(ram_size <= 2UL*1024*1024*1024);
break;
default:
printf("Unknown PoP package id 0x%08x, assuming 1Gb\n",
exynos_pop_id);
ram_size = (psize_t) 0x10000000;
}
#endif
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = rambase;
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
const bool mapallmem_p = true;
#ifndef PMAP_NEED_ALLOC_POOLPAGE
if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
printf("%s: dropping RAM size from %luMB to %uMB\n",
__func__, (unsigned long) (ram_size >> 20),
(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
ram_size = KERNEL_VM_BASE - KERNEL_BASE;
}
