示例#1
0
/*
 * enable/disable the glitch filter. mostly used with IRQ handling.
 */
int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;

#if defined(CPU_HAS_PIO4)
		writel(mask, &at91_port->mskr);
		if (is_on) { 
			writel((readl(&at91_port->cfgr)
				& (~AT91_PIO_CFGR_IFSCEN)) | AT91_PIO_CFGR_IFEN,
				&at91_port->cfgr);
		} else {
			writel(readl(&at91_port->cfgr)
				& (~AT91_PIO_CFGR_IFEN), &at91_port->cfgr);
		}
#else

		if (is_on) {
#if defined(CPU_HAS_PIO3)
			writel(mask, &at91_port->ifscdr);
#endif
			writel(mask, &at91_port->ifer);
		} else {
			writel(mask, &at91_port->ifdr);
		}
#endif
	}

	return 0;
}
示例#2
0
/*
 * enable/disable the multi-driver. This is only valid for output and
 * allows the output pin to run as an open collector output.
 */
int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;

#if defined(CPU_HAS_PIO4)
		writel(mask, &at91_port->mskr);
		if (is_on) {
			writel(readl(&at91_port->cfgr)
				| AT91_PIO_CFGR_OPD, &at91_port->cfgr);
		} else {
			writel(readl(&at91_port->cfgr)
				& (~AT91_PIO_CFGR_OPD), &at91_port->cfgr);
		}
#else
		if (is_on)
			writel(mask, &at91_port->mder);
		else
			writel(mask, &at91_port->mddr);
#endif
	}

	return 0;
}
示例#3
0
/*
 * mux the pin to the "B" internal peripheral role.
 */
int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;

#if defined(CPU_HAS_PIO4)
		if (pio4_set_pio_func(at91_port, mask, AT91_PIO_CFGR_FUNC_PERIPH_B, use_pullup))
			return -1;
#else
		writel(mask, &at91_port->idr);
		at91_set_pio_pullup(port, pin, use_pullup);
#if defined(CPU_HAS_PIO3)
		writel(readl(&at91_port->abcdsr1) | mask,
		       &at91_port->abcdsr1);
		writel(readl(&at91_port->abcdsr2) & ~mask,
		       &at91_port->abcdsr2);
#else
		writel(mask, &at91_port->bsr);
#endif
		writel(mask, &at91_port->pdr);
#endif
	}

	return 0;
}
示例#4
0
int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
{
	struct at91_port *at91_port = at91_pio_get_port(port);

	if (at91_port && (pin < GPIO_PER_BANK))
		at91_set_port_pullup(at91_port, pin, use_pullup);

	return 0;
}
示例#5
0
/*
 * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
 * and configure it for an output.
 */
int at91_set_pio_output(unsigned port, u32 pin, int value)
{
	struct at91_port *at91_port = at91_pio_get_port(port);

	if (at91_port && (pin < GPIO_PER_BANK))
		at91_set_port_output(at91_port, pin, value);

	return 0;
}
示例#6
0
/*
 * read the pin's value (works even if it's not muxed as a gpio).
 */
int at91_get_pio_value(unsigned port, unsigned pin)
{
	struct at91_port *at91_port = at91_pio_get_port(port);

	if (at91_port && (pin < GPIO_PER_BANK))
		return at91_get_port_value(at91_port, pin);

	return 0;
}
示例#7
0
文件: at91_gpio.c 项目: Bing0/u-boot
/*
 * read the pin's value (works even if it's not muxed as a gpio).
 */
int at91_get_pio_value(unsigned port, unsigned pin)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 pdsr = 0, mask;

	if (at91_port && (pin < 32)) {
		mask = 1 << pin;
		pdsr = readl(&at91_port->pdsr) & mask;
	}

	return pdsr != 0;
}
示例#8
0
/* REVIST_PIO4 */
int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;
		writel(readl(&at91_port->schmitt) | mask,
		       &at91_port->schmitt);
	}

	return 0;
}
示例#9
0
/*
 * mux the pin to the "G" internal peripheral role.
 */
int at91_set_g_periph(unsigned port, unsigned pin, int use_pullup)
{
#if defined(CPU_HAS_PIO4)
	struct at91_port *at91_port = at91_pio_get_port(port);

	u32 mask = 1 << pin;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		if (pio4_set_pio_func(at91_port, mask, AT91_PIO_CFGR_FUNC_PERIPH_G, use_pullup))
			return -1;
	}
#endif
	return 0;
}
示例#10
0
/*
 * mux the pin to the "GPIO" peripheral role.
 */
int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;
		writel(mask, &at91_port->idr);
		at91_set_pio_pullup(port, pin, use_pullup);
		writel(mask, &at91_port->per);
	}

	return 0;
}
示例#11
0
文件: at91_gpio.c 项目: Bing0/u-boot
/*
 * assuming the pin is muxed as a gpio output, set its value.
 */
int at91_set_pio_value(unsigned port, unsigned pin, int value)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < 32)) {
		mask = 1 << pin;
		if (value)
			writel(mask, &at91_port->sodr);
		else
			writel(mask, &at91_port->codr);
	}

	return 0;
}
示例#12
0
文件: at91_gpio.c 项目: Bing0/u-boot
/*
 * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
 * configure it for an input.
 */
int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < 32)) {
		mask = 1 << pin;
		writel(mask, &at91_port->idr);
		at91_set_pio_pullup(port, pin, use_pullup);
		writel(mask, &at91_port->odr);
		writel(mask, &at91_port->per);
	}

	return 0;
}
示例#13
0
/*
 * enable/disable the multi-driver. This is only valid for output and
 * allows the output pin to run as an open collector output.
 */
int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;
		if (is_on)
			writel(mask, &at91_port->mder);
		else
			writel(mask, &at91_port->mddr);
	}

	return 0;
}
示例#14
0
/* REVIST_PIO4 */
int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;
		writel(mask, &at91_port->pudr);
		if (is_on)
			writel(mask, &at91_port->ppder);
		else
			writel(mask, &at91_port->ppddr);
	}

	return 0;
}
示例#15
0
文件: at91_gpio.c 项目: Bing0/u-boot
int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < 32)) {
		mask = 1 << pin;
		if (use_pullup)
			writel(1 << pin, &at91_port->puer);
		else
			writel(1 << pin, &at91_port->pudr);
		writel(mask, &at91_port->per);
	}

	return 0;
}
示例#16
0
文件: at91_gpio.c 项目: Bing0/u-boot
/*
 * mux the pin to the "D" internal peripheral role.
 */
int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < 32)) {
		mask = 1 << pin;
		writel(mask, &at91_port->idr);
		at91_set_pio_pullup(port, pin, use_pullup);
		writel(readl(&at91_port->abcdsr1) | mask,
		       &at91_port->abcdsr1);
		writel(readl(&at91_port->abcdsr2) | mask,
		       &at91_port->abcdsr2);
		writel(mask, &at91_port->pdr);
	}

	return 0;
}
示例#17
0
/* REVIST_PIO4 */
int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;
		if (is_on) {
			writel(mask, &at91_port->ifscer);
			writel(div & PIO_SCDR_DIV, &at91_port->scdr);
			writel(mask, &at91_port->ifer);
		} else {
			writel(mask, &at91_port->ifdr);
		}
	}

	return 0;
}
示例#18
0
文件: at91_gpio.c 项目: Bing0/u-boot
/*
 * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
 * and configure it for an output.
 */
int at91_set_pio_output(unsigned port, u32 pin, int value)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
		mask = 1 << pin;
		writel(mask, &at91_port->idr);
		writel(mask, &at91_port->pudr);
		if (value)
			writel(mask, &at91_port->sodr);
		else
			writel(mask, &at91_port->codr);
		writel(mask, &at91_port->oer);
		writel(mask, &at91_port->per);
	}

	return 0;
}
示例#19
0
/*
 * enable/disable the glitch filter. mostly used with IRQ handling.
 */
int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;
		if (is_on) {
#if defined(CPU_HAS_PIO3)
			writel(mask, &at91_port->ifscdr);
#endif
			writel(mask, &at91_port->ifer);
		} else {
			writel(mask, &at91_port->ifdr);
		}
	}

	return 0;
}
示例#20
0
/*
 * mux the pin to the "A" internal peripheral role.
 */
int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
{
	struct at91_port *at91_port = at91_pio_get_port(port);
	u32 mask;

	if (at91_port && (pin < GPIO_PER_BANK)) {
		mask = 1 << pin;
		writel(mask, &at91_port->idr);
		at91_set_pio_pullup(port, pin, use_pullup);
#if defined(CPU_HAS_PIO3)
		writel(readl(&at91_port->abcdsr1) & ~mask,
		       &at91_port->abcdsr1);
		writel(readl(&at91_port->abcdsr2) & ~mask,
		       &at91_port->abcdsr2);
#else
		writel(mask, &at91_port->asr);
#endif
		writel(mask, &at91_port->pdr);
	}

	return 0;
}