static void __init cus227_register_spi_devices( struct spi_board_info const *info) { gpio_request(CUS227_GPIO_SPI_CLK, "SPI CLK"); ath79_gpio_output_select(CUS227_GPIO_SPI_CLK, AR934X_GPIO_OUT_MUX_SPI_CLK); gpio_direction_output(CUS227_GPIO_SPI_CLK, 0); gpio_request(CUS227_GPIO_SPI_MOSI, "SPI MOSI"); ath79_gpio_output_select(CUS227_GPIO_SPI_MOSI, AR934X_GPIO_OUT_MUX_SPI_MOSI); gpio_direction_output(CUS227_GPIO_SPI_MOSI, 0); gpio_request(CUS227_GPIO_SPI_CS1, "SPI CS1"); ath79_gpio_output_select(CUS227_GPIO_SPI_CS1, AR934X_GPIO_OUT_MUX_SPI_CS1); gpio_direction_output(CUS227_GPIO_SPI_CS1, 0); /* a dedicated GPIO pin is used as SPI MISO since SPI controller doesn't support modes other than mode-0 */ gpio_request(CUS227_GPIO_SPI_MISO, "SPI MISO"); ath79_gpio_input_select(CUS227_GPIO_SPI_MISO, AR934X_GPIO_IN_MUX_SPI_MISO); gpio_direction_input(CUS227_GPIO_SPI_MISO); ath79_spi_data.bus_num = 0; ath79_spi_data.num_chipselect = 2; ath79_spi_data.miso_line = CUS227_GPIO_SPI_MISO; ath79_register_spi(&ath79_spi_data, info, 1); }
void __init ath79_register_m25p80(struct flash_platform_data *pdata) { ath79_spi_data.bus_num = 0; ath79_spi_data.num_chipselect = 1; ath79_spi_info[0].platform_data = pdata; ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); }
static void __init alfa_ap96_init(void) { alfa_ap96_gpio_setup(); ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; ath79_eth1_pll_data.pll_1000 = 0x110000; ath79_register_eth(0); ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; ath79_eth1_pll_data.pll_1000 = 0x110000; ath79_register_eth(1); ath79_register_pci(); ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info, ARRAY_SIZE(alfa_ap96_spi_info)); ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, ARRAY_SIZE(alfa_ap96_gpio_keys), alfa_ap96_gpio_keys); ath79_register_usb(); }
void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) { multi_pdata = pdata; add_mtd_concat_notifier(); ath79_spi_data.bus_num = 0; ath79_spi_data.num_chipselect = 2; ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2); }
static void __init ap81_setup(void) { u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR); ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio), ap81_leds_gpio); ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL, ARRAY_SIZE(ap81_gpio_keys), ap81_gpio_keys); ath79_register_spi(&ap81_spi_data, ap81_spi_info, ARRAY_SIZE(ap81_spi_info)); ath79_register_ar913x_wmac(cal_data); }
static void __init ubnt_xm_init(void) { ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), ubnt_xm_leds_gpio); ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ARRAY_SIZE(ubnt_xm_gpio_keys), ubnt_xm_gpio_keys); ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, ARRAY_SIZE(ubnt_xm_spi_info)); ubnt_xm_pci_init(); }
static void __init db120_setup(void) { u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), db120_leds_gpio); ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, ARRAY_SIZE(db120_gpio_keys), db120_gpio_keys); ath79_register_spi(&db120_spi_data, db120_spi_info, ARRAY_SIZE(db120_spi_info)); ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); }
static void __init ap136_setup(void) { u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), ap136_leds_gpio); ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, ARRAY_SIZE(ap136_gpio_keys), ap136_gpio_keys); ath79_register_spi(&ap136_spi_data, ap136_spi_info, ARRAY_SIZE(ap136_spi_info)); ath79_register_usb(); ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); }
static void __init pb44_init(void) { i2c_register_board_info(0, pb44_i2c_board_info, ARRAY_SIZE(pb44_i2c_board_info)); platform_device_register(&pb44_i2c_gpio_device); ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio), pb44_leds_gpio); ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL, ARRAY_SIZE(pb44_gpio_keys), pb44_gpio_keys); ath79_register_spi(&pb44_spi_data, pb44_spi_info, ARRAY_SIZE(pb44_spi_info)); ath79_register_usb(); }
/* * Common peripherals init routine for all SPI NOR devices. * Sets SPI and USB. */ static void __init rbspi_peripherals_setup(u32 flags) { unsigned spi_n; if (flags & RBSPI_HAS_SSR) spi_n = ARRAY_SIZE(rbspi_spi_info); else spi_n = 1; /* only one device on bus0 */ rbspi_ath79_spi_data.num_chipselect = spi_n; rbspi_ath79_spi_data.cs_gpios = rbspi_spi_cs_gpios; ath79_register_spi(&rbspi_ath79_spi_data, rbspi_spi_info, spi_n); if (flags & RBSPI_HAS_USB) ath79_register_usb(); }
static void __init gl_ar300m_setup(void) { u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); u8 tmpmac[ETH_ALEN]; ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); ath79_register_spi(&gl_ar300m_spi_data, gl_ar300m_spi_info, 2); /* register gpio LEDs and keys */ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar300m_leds_gpio), gl_ar300m_leds_gpio); ath79_register_gpio_keys_polled(-1, GL_AR300M_KEYS_POLL_INTERVAL, ARRAY_SIZE(gl_ar300m_gpio_keys), gl_ar300m_gpio_keys); ath79_register_mdio(0, 0x0); /* WAN */ ath79_init_mac(ath79_eth0_data.mac_addr, art + GL_AR300M_MAC0_OFFSET, 0); ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ath79_eth0_data.speed = SPEED_100; ath79_eth0_data.duplex = DUPLEX_FULL; ath79_eth0_data.phy_mask = BIT(4); ath79_register_eth(0); /* LAN */ ath79_init_mac(ath79_eth1_data.mac_addr, art + GL_AR300M_MAC1_OFFSET, 0); ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ath79_eth1_data.speed = SPEED_1000; ath79_eth1_data.duplex = DUPLEX_FULL; ath79_switch_data.phy_poll_mask |= BIT(4); ath79_switch_data.phy4_mii_en = 1; ath79_register_eth(1); ath79_init_mac(tmpmac, art + GL_AR300M_WMAC_CALDATA_OFFSET + 2, 0); ath79_register_wmac(art + GL_AR300M_WMAC_CALDATA_OFFSET, tmpmac); /* enable usb */ ath79_register_usb(); /* enable pci */ ath79_register_pci(); }