static int
atse_attach_fdt(device_t dev)
{
struct atse_softc *sc;
int error;
sc = device_get_softc(dev);
sc->atse_dev = dev;
sc->atse_unit = device_get_unit(dev);
/*
* FDT has the list of our resources. Given we are using multiple
* memory regions and possibly multiple interrupts, we need to attach
* them in the order specified in .dts:
* MAC, RX and RXC FIFO, TX and TXC FIFO; RX INTR, TX INTR.
*/
/* MAC: Avalon-MM, atse management register region. */
sc->atse_mem_rid = 0;
sc->atse_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->atse_mem_rid, RF_ACTIVE);
if (sc->atse_mem_res == NULL) {
device_printf(dev, "failed to map memory for ctrl region\n");
/* Cleanup. */
atse_detach_resources(dev);
return (ENXIO);
}
if (bootverbose)
device_printf(sc->atse_dev, "MAC ctrl region at mem %p-%p\n",
(void *)rman_get_start(sc->atse_mem_res),
(void *)(rman_get_start(sc->atse_mem_res) +
rman_get_size(sc->atse_mem_res)));
error = atse_attach(dev);
if (error) {
/* Cleanup. */
atse_detach_resources(dev);
return (error);
}
return (0);
}
static int
atse_attach_nexus(device_t dev)
{
struct atse_softc *sc;
int error;
sc = device_get_softc(dev);
sc->atse_dev = dev;
sc->atse_unit = device_get_unit(dev);
/* Get RX and TX IRQ and FIFO information from hints. */
error = atse_resource_int(dev, "rx_irq", &sc->atse_rx_irq);
error += atse_resource_long(dev, "rx_maddr", &sc->atse_rx_maddr);
error += atse_resource_long(dev, "rx_msize", &sc->atse_rx_msize);
error += atse_resource_long(dev, "rxc_maddr", &sc->atse_rxc_maddr);
error += atse_resource_long(dev, "rxc_msize", &sc->atse_rxc_msize);
error += atse_resource_int(dev, "tx_irq", &sc->atse_tx_irq);
error += atse_resource_long(dev, "tx_maddr", &sc->atse_tx_maddr);
error += atse_resource_long(dev, "tx_msize", &sc->atse_tx_msize);
error += atse_resource_long(dev, "txc_maddr", &sc->atse_txc_maddr);
error += atse_resource_long(dev, "txc_msize", &sc->atse_txc_msize);
if (error != 0)
return (error);
/* Avalon-MM, atse management register region. */
sc->atse_mem_rid = 0;
sc->atse_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->atse_mem_rid, RF_ACTIVE);
if (sc->atse_mem_res == NULL) {
device_printf(dev, "failed to map memory for ctrl region\n");
return (ENXIO);
}
/*
* (Optional) RX IRQ and memory mapped regions.
* 0x00: 2 * 32bit FIFO data,
* 0x20: 8 * 32bit FIFO ctrl, Avalon-ST Sink to Avalon-MM R-Slave.
*/
sc->atse_rx_irq_rid = 0;
sc->atse_rx_irq_res = bus_alloc_resource(dev, SYS_RES_IRQ,
&sc->atse_rx_irq_rid, sc->atse_rx_irq, sc->atse_rx_irq, 1,
RF_ACTIVE | RF_SHAREABLE);
sc->atse_rx_mem_rid = 0;
sc->atse_rx_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
&sc->atse_rx_mem_rid, sc->atse_rx_maddr, sc->atse_rx_maddr +
sc->atse_rx_msize, sc->atse_rx_msize, RF_ACTIVE);
if (sc->atse_rx_mem_res == NULL) {
device_printf(dev, "failed to map memory for RX\n");
goto err;
}
sc->atse_rxc_mem_rid = 0;
sc->atse_rxc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
&sc->atse_rxc_mem_rid, sc->atse_rxc_maddr, sc->atse_rxc_maddr +
sc->atse_rxc_msize, sc->atse_rxc_msize, RF_ACTIVE);
if (sc->atse_rxc_mem_res == NULL) {
device_printf(dev, "failed to map memory for RX control\n");
goto err;
}
/*
* (Optional) TX IRQ and memory mapped regions.
* 0x00: 2 * 32bit FIFO data,
* 0x20: 8 * 32bit FIFO ctrl, Avalon-MM W-Slave to Avalon-ST Source.
*/
sc->atse_tx_irq_rid = 0;
sc->atse_tx_irq_res = bus_alloc_resource(dev, SYS_RES_IRQ,
&sc->atse_tx_irq_rid, sc->atse_tx_irq, sc->atse_tx_irq, 1,
RF_ACTIVE | RF_SHAREABLE);
sc->atse_tx_mem_rid = 0;
sc->atse_tx_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
&sc->atse_tx_mem_rid, sc->atse_tx_maddr, sc->atse_tx_maddr +
sc->atse_tx_msize, sc->atse_tx_msize, RF_ACTIVE);
if (sc->atse_tx_mem_res == NULL) {
device_printf(dev, "failed to map memory for TX\n");
goto err;
}
sc->atse_txc_mem_rid = 0;
sc->atse_txc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
&sc->atse_txc_mem_rid, sc->atse_txc_maddr, sc->atse_txc_maddr +
sc->atse_txc_msize, sc->atse_txc_msize, RF_ACTIVE);
if (sc->atse_txc_mem_res == NULL) {
device_printf(dev, "failed to map memory for TX control\n");
goto err;
}
error = atse_attach(dev);
if (error)
goto err;
return (0);
err:
/* Cleanup. */
atse_detach_resources(dev);
return (error);
}
static int
atse_attach_fdt(device_t dev)
{
struct atse_softc *sc;
int error;
sc = device_get_softc(dev);
sc->atse_dev = dev;
sc->atse_unit = device_get_unit(dev);
/*
* FDT has the list of our resources. Given we are using multiple
* memory regions and possibly multiple interrupts, we need to attach
* them in the order specified in .dts:
* MAC, RX and RXC FIFO, TX and TXC FIFO; RX INTR, TX INTR.
*/
/* MAC: Avalon-MM, atse management register region. */
sc->atse_mem_rid = 0;
sc->atse_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->atse_mem_rid, RF_ACTIVE);
if (sc->atse_mem_res == NULL) {
device_printf(dev, "failed to map memory for ctrl region\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->atse_dev, "MAC ctrl region at mem %p-%p\n",
(void *)rman_get_start(sc->atse_mem_res),
(void *)(rman_get_start(sc->atse_mem_res) +
rman_get_size(sc->atse_mem_res)));
/*
* RX and RXC FIFO memory regions.
* 0x00: 2 * 32bit FIFO data,
* 0x20: 8 * 32bit FIFO ctrl, Avalon-ST Sink to Avalon-MM R-Slave.
*/
sc->atse_rx_mem_rid = 1;
sc->atse_rx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->atse_rx_mem_rid, RF_ACTIVE);
if (sc->atse_rx_mem_res == NULL) {
device_printf(dev, "failed to map memory for RX FIFO\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->atse_dev, "RX FIFO at mem %p-%p\n",
(void *)rman_get_start(sc->atse_rx_mem_res),
(void *)(rman_get_start(sc->atse_rx_mem_res) +
rman_get_size(sc->atse_rx_mem_res)));
sc->atse_rxc_mem_rid = 2;
sc->atse_rxc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->atse_rxc_mem_rid, RF_ACTIVE);
if (sc->atse_rxc_mem_res == NULL) {
device_printf(dev, "failed to map memory for RXC FIFO\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->atse_dev, "RXC FIFO at mem %p-%p\n",
(void *)rman_get_start(sc->atse_rxc_mem_res),
(void *)(rman_get_start(sc->atse_rxc_mem_res) +
rman_get_size(sc->atse_rxc_mem_res)));
/*
* TX and TXC FIFO memory regions.
* 0x00: 2 * 32bit FIFO data,
* 0x20: 8 * 32bit FIFO ctrl, Avalon-MM W-Slave to Avalon-ST Source.
*/
sc->atse_tx_mem_rid = 3;
sc->atse_tx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->atse_tx_mem_rid, RF_ACTIVE);
if (sc->atse_tx_mem_res == NULL) {
device_printf(dev, "failed to map memory for TX FIFO\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->atse_dev, "TX FIFO at mem %p-%p\n",
(void *)rman_get_start(sc->atse_tx_mem_res),
(void *)(rman_get_start(sc->atse_tx_mem_res) +
rman_get_size(sc->atse_tx_mem_res)));
sc->atse_txc_mem_rid = 4;
sc->atse_txc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->atse_txc_mem_rid, RF_ACTIVE);
if (sc->atse_txc_mem_res == NULL) {
device_printf(dev, "failed to map memory for TXC FIFO\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->atse_dev, "TXC FIFO at mem %p-%p\n",
(void *)rman_get_start(sc->atse_txc_mem_res),
(void *)(rman_get_start(sc->atse_txc_mem_res) +
rman_get_size(sc->atse_txc_mem_res)));
/* (Optional) RX and TX IRQ. */
sc->atse_rx_irq_rid = 0;
sc->atse_rx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->atse_rx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
sc->atse_tx_irq_rid = 1;
sc->atse_tx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->atse_tx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
error = atse_attach(dev);
if (error)
goto err;
return (0);
err:
/* Cleanup. */
atse_detach_resources(dev);
return (error);
}
