asmlinkage void plat_irq_dispatch(void) { unsigned int cpu = smp_processor_id(); unsigned int pending; #ifdef CONFIG_SIBYTE_BCM1480_PROF /* Set compare to count to silence count/compare timer interrupts */ write_c0_compare(read_c0_count()); #endif pending = read_c0_cause() & read_c0_status(); #ifdef CONFIG_SIBYTE_BCM1480_PROF if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ sbprof_cpu_intr(); else #endif if (pending & CAUSEF_IP4) do_IRQ(K_BCM1480_INT_TIMER_0 + cpu); #ifdef CONFIG_SMP else if (pending & CAUSEF_IP3) bcm1480_mailbox_interrupt(); #endif #ifdef CONFIG_KGDB else if (pending & CAUSEF_IP6) bcm1480_kgdb_interrupt(); /* KGDB (uart 1) */ #endif else if (pending & CAUSEF_IP2) dispatch_ip2(); }
asmlinkage void plat_irq_dispatch(struct pt_regs *regs) { unsigned int pending; #ifdef CONFIG_SIBYTE_BCM1480_PROF /* Set compare to count to silence count/compare timer interrupts */ write_c0_compare(read_c0_count()); #endif pending = read_c0_cause() & read_c0_status(); #ifdef CONFIG_SIBYTE_BCM1480_PROF if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ sbprof_cpu_intr(exception_epc(regs)); else #endif if (pending & CAUSEF_IP4) bcm1480_timer_interrupt(regs); #ifdef CONFIG_SMP else if (pending & CAUSEF_IP3) bcm1480_mailbox_interrupt(regs); #endif #ifdef CONFIG_KGDB else if (pending & CAUSEF_IP6) bcm1480_kgdb_interrupt(regs); /* KGDB (uart 1) */ #endif else if (pending & CAUSEF_IP2) { unsigned long long mask_h, mask_l; unsigned long base; /* * Default...we've hit an IP[2] interrupt, which means we've * got to check the 1480 interrupt registers to figure out what * to do. Need to detect which CPU we're on, now that * smp_affinity is supported. */ base = A_BCM1480_IMR_MAPPER(smp_processor_id()); mask_h = __raw_readq( IOADDR(base + R_BCM1480_IMR_INTERRUPT_STATUS_BASE_H)); mask_l = __raw_readq( IOADDR(base + R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L)); if (mask_h) { if (mask_h ^ 1) do_IRQ(fls64(mask_h) - 1, regs); else do_IRQ(63 + fls64(mask_l), regs); } } }