static ssize_t ppi_chr_read(struct file* filp, char __user* buffer, size_t count, loff_t* offset) { if(bfin_read_PPI_STATUS() != 0) { printk(KERN_WARNING DRIVER_NAME ": PPI error. PPI_STATUS (%d)\n", bfin_read_PPI_STATUS()); bfin_write_PPI_STATUS(0); } if(sizeof(current_buffer_pointer) != count) { return -EINVAL; } /* Wait for buffer to fill and pointer to be set */ if(wait_for_completion_interruptible(&buffer_ready)) { return -EINTR; } /* Check for backlog */ if(completion_done(&buffer_ready)) { printk(KERN_WARNING DRIVER_NAME ": Missed data packet!\n"); } /* Copy value of the pointer to the just filled buffer to the user buffer */ if(copy_to_user(buffer, ¤t_buffer_pointer, count)) { return -EFAULT; } /* Reset the completion flag so completions don't pile up */ INIT_COMPLETION(buffer_ready); return 0; }
static int ppi_init(void) { /* Request peripheral pins for PPI */ peripheral_request_list(ppi_pins, DRIVER_NAME); /* No delay between frame sync and read */ bfin_write_PPI_DELAY(0); /* Read one sample per frame sync (the number given for COUNT is always one less than the desired count) */ bfin_write_PPI_COUNT(3); bfin_write_PPI_STATUS(0); /* PPI control mode (assert on falling edge, 14 data bits, general purpose rx with 1 frame sync */ bfin_write_PPI_CONTROL(PPI_MODE); return 0; }
static void bf537_demux_error_irq(unsigned int int_err_irq, struct irq_desc *inta_desc) { int irq = 0; #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) if (bfin_read_EMAC_SYSTAT() & EMAC_ERR_MASK) irq = IRQ_MAC_ERROR; else #endif if (bfin_read_SPORT0_STAT() & SPORT_ERR_MASK) irq = IRQ_SPORT0_ERROR; else if (bfin_read_SPORT1_STAT() & SPORT_ERR_MASK) irq = IRQ_SPORT1_ERROR; else if (bfin_read_PPI_STATUS() & PPI_ERR_MASK) irq = IRQ_PPI_ERROR; else if (bfin_read_CAN_GIF() & CAN_ERR_MASK) irq = IRQ_CAN_ERROR; else if (bfin_read_SPI_STAT() & SPI_ERR_MASK) irq = IRQ_SPI_ERROR; else if ((bfin_read_UART0_IIR() & UART_ERR_MASK) == UART_ERR_MASK) irq = IRQ_UART0_ERROR; else if ((bfin_read_UART1_IIR() & UART_ERR_MASK) == UART_ERR_MASK) irq = IRQ_UART1_ERROR; if (irq) { if (error_int_mask & (1L << (irq - IRQ_PPI_ERROR))) bfin_handle_irq(irq); else { switch (irq) { case IRQ_PPI_ERROR: bfin_write_PPI_STATUS(PPI_ERR_MASK); break; #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) case IRQ_MAC_ERROR: bfin_write_EMAC_SYSTAT(EMAC_ERR_MASK); break; #endif case IRQ_SPORT0_ERROR: bfin_write_SPORT0_STAT(SPORT_ERR_MASK); break; case IRQ_SPORT1_ERROR: bfin_write_SPORT1_STAT(SPORT_ERR_MASK); break; case IRQ_CAN_ERROR: bfin_write_CAN_GIS(CAN_ERR_MASK); break; case IRQ_SPI_ERROR: bfin_write_SPI_STAT(SPI_ERR_MASK); break; default: break; } pr_debug("IRQ %d:" " MASKED PERIPHERAL ERROR INTERRUPT ASSERTED\n", irq); } } else pr_err("%s: IRQ ?: PERIPHERAL ERROR INTERRUPT ASSERTED BUT NO SOURCE FOUND\n", __func__); }