double
loglinear_method::run(const snp_row &row1, const snp_row &row2, float *output)
{
arma::mat count = joint_count( row1, row2, get_data( )->phenotype, m_weight );
size_t num_samples = arma::accu( count );
set_num_ok_samples( num_samples );
if( arma::min( arma::min( count ) ) < METHOD_SMALLEST_CELL_SIZE_BINOMIAL )
{
return -9;
}
std::vector<log_double> likelihood( m_models.size( ), 0.0 );
std::vector<double> bic( m_models.size( ), 0.0 );
for(int i = 0; i < m_models.size( ); i++)
{
likelihood[ i ] = m_models[ i ]->prob( count );
bic[ i ] = -2.0 * likelihood[ i ].log_value( ) + m_models[ i ]->df( ) * log( num_samples );
}
unsigned int best_model = std::distance( bic.begin( ), std::min_element( bic.begin( ) + 1, bic.end( ) ) );
double LR = -2.0*(likelihood[ best_model ].log_value( ) - likelihood[ 0 ].log_value( ));
try
{
double p_value = 1.0 - chi_square_cdf( LR, m_models[ 0 ]->df( ) - m_models[ best_model ]->df( ) );
output[ 0 ] = p_value;
return p_value;
}
catch(bad_domain_value &e)
{
}
return -9;
}
/*!
PUSH16(PC)
PUSH8((P&~B) | U)
P |= I
PC = READ16(vector)
ADDCYC(7)
*/
void NesCpuTranslator::mHwInterrupt()
{
// r0 - 6502.PC address of interrupted instruction
// r1 - vector addresss - selects (nmi, irq, reset) which interrupt will
// be executed
// as a result lr register is loaded with the address of code
mPush16(r0);
mRestoreInternalFlags();
mPackFlags(r0);
__ bic(r0, r0, Operand(NesCpuBase::Break));
__ orr(r0, r0, Operand(NesCpuBase::Unused));
mPush8(r0);
mSei();
mAddCycles(7);
// new address will be loaded, r0 must point to PC address as translation
// can occur for the given interrupt
mReadDirect8(r1, r0);
__ add(r1, r1, Operand(1));
mReadDirect8(r1, r2);
__ orr(r0, r0, Operand(r2, LSL, 8));
// load lr with label pos
mLoadLabelAddress(r0, lr);
}
int main(void)
{
printf("add2(%d, %d) = %d\n", 3, 1, add2(3, 1));
printf("add3(%d, %d, %d) = %d\n", 1, 3, 1, add3(1, 3, 1));
printf("bic(%d, %d) = %d\n", 3, 1, bic(3, 1));
printf("mvn(%d, %d) = %d\n", 3, 1, mvn(3, 1));
printf("rsb3(%d, %d, %d) = %d\n", 3, 1, 1, rsb3(3, 1, 1));
printf("rsb1(%d) = %d\n", 3, rsb1(3));
return 0;
}
/*!
Compiles a code that loads address pointed by a label at the given \a offset
in 6502 address space to the \a dst. The label can be bound to the
recompiled code or to mTranslateCaller if translation haven't occured for
the given \a offset.
*/
inline void NesCpuTranslator::mLoadLabelAddress(Register offset, Register dst)
{
Q_ASSERT(offset != ip && dst != ip);
__ mov(dst, Operand(intptr_t(m_codeBuffer)));
__ mov(ip, Operand(intptr_t(m_labels)));
__ ldr(ip, MemOperand(ip, offset, LSL, 2));
// dst = buffer - pos - 1
__ sub(dst, dst, Operand(ip));
__ bic(dst, dst, Operand(3));
}
void NesCpuTranslator::mHandleInterrupts()
{
// code at the bottom does following job:
//
// if (interrupts & mNmiInterrupt) {
// hwInterrupt(NmiVectorAddress);
// interrupts &= ~mNmiInterrupt;
// } else if (interrupts & mIrqInterrupt) {
// if (!(mFlags & mIrqDisable)) {
// hwInterrupt(IrqVectorAddress);
// }
// }
// r0 - 6502.PC address of the next instruction
Label exitInterruptCheck;
Label irqPending;
Label doInterrupt;
__ ldr(r1, MemOperand(mDataBase, offsetof(NesCpuRecData,interrupts)));
__ mov(r1, r1, SetCC);
__ b(&exitInterruptCheck, eq);
__ tst(r1, Operand(NesCpuBase::NmiInterrupt));
__ b(&irqPending, eq);
// NMI is handled here
// clear NMI flag
__ bic(r1, r1, Operand(NesCpuBase::NmiInterrupt));
__ str(r1, MemOperand(mDataBase, offsetof(NesCpuRecData,interrupts)));
__ mov(r1, Operand(NesCpuBase::NmiVectorAddress));
__ b(&doInterrupt);
// irqPending:
// IRQ is handled here
// check if P.I is cleared
__ bind(&irqPending);
__ tst(mFlags, Operand(NesCpuBase::IrqDisable));
__ b(&exitInterruptCheck, ne);
__ mov(r1, Operand(NesCpuBase::IrqVectorAddress));
// doInterrupt:
__ bind(&doInterrupt);
// interrupt occured - handle it
mHwInterrupt();
// exitInterruptCheck:
__ bind(&exitInterruptCheck);
}
double kmedoids::xpam(const dissimilarity_matrix& distance, size_t max_k, size_t dimensionality) {
double best_bic = -DBL_MAX; // note that DBL_MIN isn't what you think it is.
for (size_t k = 1; k <= max_k; k++) {
kmedoids subcall;
subcall.pam(distance, k);
double cur_bic = bic(subcall, matrix_distance(distance), dimensionality);
if (xcallback) xcallback(subcall, cur_bic);
if (cur_bic > best_bic) {
best_bic = cur_bic;
swap(subcall);
}
}
return best_bic;
}
int main()
{
int x = 0x98FDECBA;
int temp = x;
mask_height_bit((byte_pointer)&temp, sizeof(x));
printf("reset all bit without least:%x\n", temp);
int temp1 = x;
complement_least((byte_pointer)&temp1);
printf("complement least without other:%x\n", temp1);
int temp2 = x;
reset_least((byte_pointer)&temp2);
printf("reset least bit without other:%x\n", temp2);
int temp3 = bis(0x0000000, 31);
printf("0 after bis operator:%08x\n", temp3);
int temp4 = bic(0x80000000, 31);
printf("0 after bic operator:%08x\n", temp4);
return 0;
}
void MacroAssembler::atomic_cas64(Register memval_lo, Register memval_hi, Register result, Register oldval_lo, Register oldval_hi, Register newval_lo, Register newval_hi, Register base, int offset) {
if (VM_Version::supports_ldrexd()) {
Label loop;
assert_different_registers(memval_lo, memval_hi, result, oldval_lo,
oldval_hi, newval_lo, newval_hi, base);
assert(memval_hi == memval_lo + 1 && memval_lo < R9, "cmpxchg_long: illegal registers");
assert(oldval_hi == oldval_lo + 1 && oldval_lo < R9, "cmpxchg_long: illegal registers");
assert(newval_hi == newval_lo + 1 && newval_lo < R9, "cmpxchg_long: illegal registers");
assert(result != R10, "cmpxchg_long: illegal registers");
assert(base != R10, "cmpxchg_long: illegal registers");
mov(result, 0);
bind(loop);
ldrexd(memval_lo, Address(base, offset));
cmp(memval_lo, oldval_lo);
cmp(memval_hi, oldval_hi, eq);
strexd(result, newval_lo, Address(base, offset), eq);
rsbs(result, result, 1, eq);
b(loop, eq);
} else if (VM_Version::supports_kuser_cmpxchg64()) {
// On armv5 platforms we must use the Linux kernel helper
// function for atomic cas64 operations since ldrexd/strexd is
// not supported.
//
// This is a special routine at a fixed address 0xffff0f60
//
// input:
// r0 = (long long *)oldval, r1 = (long long *)newval,
// r2 = ptr, lr = return adress
// output:
// r0 = 0 carry set on success
// r0 != 0 carry clear on failure
//
// r3, and flags are clobbered
//
Label done;
Label loop;
if (result != R12) {
push(R12);
}
push(RegisterSet(R10) | RegisterSet(LR));
mov(R10, SP); // Save SP
bic(SP, SP, StackAlignmentInBytes - 1); // align stack
push(RegisterSet(oldval_lo, oldval_hi));
push(RegisterSet(newval_lo, newval_hi));
if ((offset != 0) || (base != R12)) {
add(R12, base, offset);
}
push(RegisterSet(R0, R3));
bind(loop);
ldrd(memval_lo, Address(R12)); //current
ldrd(oldval_lo, Address(SP, 24));
cmp(memval_lo, oldval_lo);
cmp(memval_hi, oldval_hi, eq);
pop(RegisterSet(R0, R3), ne);
mov(result, 0, ne);
b(done, ne);
// Setup for kernel call
mov(R2, R12);
add(R0, SP, 24); // R0 == &oldval_lo
add(R1, SP, 16); // R1 == &newval_lo
mvn(R3, 0xf000); // call kernel helper at 0xffff0f60
mov(LR, PC);
sub(PC, R3, 0x9f);
b(loop, cc); // if Carry clear then oldval != current
// try again. Otherwise, return oldval
// Here on success
pop(RegisterSet(R0, R3));
mov(result, 1);
ldrd(memval_lo, Address(SP, 8));
bind(done);
pop(RegisterSet(newval_lo, newval_hi));
pop(RegisterSet(oldval_lo, oldval_hi));
mov(SP, R10); // restore SP
pop(RegisterSet(R10) | RegisterSet(LR));
if (result != R12) {
pop(R12);
}
} else {
stop("Atomic cmpxchg64 unsupported on this platform");
}
}
int bic(int n, int r) {
if(r == 0 || n == 0 || r == n)
return 1;
else
return bic(n-1, r-1) + bic(n-1, r);
}
NDIS_STATUS
xmpSetInformation(
IN xmpNicCtx_t *pNicCtx,
IN PNDIS_OID_REQUEST NdisRequest
)
{
NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
NDIS_OID Oid;
PVOID InformationBuffer;
ULONG InformationBufferLength;
ULONG BytesRead;
ULONG BytesNeeded;
ULONG PacketFilter;
ULONG MCastCnt;
ULONG HashType;
ULONG validBits;
USHORT i;
xge_hal_device_t *pHalDev;
NDIS_RECEIVE_SCALE_PARAMETERS *pRssParam;
xmpSetRssContext SetRssCtx = {0};
static ULONG setRssCount = 10;
pHalDev = XMP_NIC_GET_DEV(pNicCtx);
Oid = NdisRequest->DATA.SET_INFORMATION.Oid;
InformationBuffer = NdisRequest->DATA.SET_INFORMATION.InformationBuffer;
InformationBufferLength =
NdisRequest->DATA.SET_INFORMATION.InformationBufferLength;
XMPTRACE(XMP_DBG_REQ, ("==> xmpSetInformation %x\n", Oid));
BytesRead = 0;
BytesNeeded = 0;
switch(Oid)
{
case OID_802_3_MULTICAST_LIST:
XMPTRACE(XMP_DBG_REQ, ("xmpSetInformation Multicast list\n"));
if ( InformationBufferLength % ETH_LENGTH_OF_ADDRESS != 0 )
return(NDIS_STATUS_INVALID_LENGTH);
MCastCnt = InformationBufferLength / ETH_LENGTH_OF_ADDRESS;
xmpHalMcastFilterClr(pNicCtx);
Status = xmpHalSetMcastList(pNicCtx,
(UCHAR *) InformationBuffer,
&MCastCnt);
BytesRead = MCastCnt * ETH_LENGTH_OF_ADDRESS;
break;
case OID_GEN_CURRENT_PACKET_FILTER:
XMPTRACE(XMP_DBG_REQ, ("xmpSetInformation: packet filter\n"));
if ( InformationBufferLength != sizeof (ULONG) )
return ( NDIS_STATUS_INVALID_LENGTH );
BytesRead = InformationBufferLength;
PacketFilter = *((PULONG) InformationBuffer);
Status = xmpSetFilter(pNicCtx, PacketFilter);
break;
case OID_GEN_CURRENT_LOOKAHEAD:
XMPTRACE(XMP_DBG_REQ, ("xmpSetInformation: current lookahead\n"));
if( InformationBufferLength < sizeof(ULONG) )
{
BytesNeeded = sizeof(ULONG);
Status = NDIS_STATUS_INVALID_LENGTH;
break;
}
pNicCtx->LookAheadSz = *((PULONG) InformationBuffer);
BytesRead = sizeof(ULONG);
Status = NDIS_STATUS_SUCCESS;
break;
case OID_GEN_RECEIVE_SCALE_PARAMETERS:
XMPTRACE(XMP_DBG_INFO, ("xmpSetInformation: OID_GEN_RECEIVE_SCALE_PARAMETERS\n"));
if ( !(XMP_NIC_RSS_IN_CONFIG(pNicCtx)) )
{
Status = NDIS_STATUS_NOT_SUPPORTED;
break;
}
if ( InformationBufferLength < sizeof(NDIS_RECEIVE_SCALE_PARAMETERS) )
{
BytesNeeded = sizeof(NDIS_RECEIVE_SCALE_PARAMETERS);
Status = NDIS_STATUS_INVALID_LENGTH;
break;
}
pRssParam = (PNDIS_RECEIVE_SCALE_PARAMETERS)InformationBuffer;
#ifdef NDISTEST_BUG
if ( !XENAMP_NDIS_OBJECT_VALID(&pRssParam->Header,
NDIS_RECEIVE_SCALE_PARAMETERS_REVISION_1,
NDIS_OBJECT_TYPE_RSS_PARAMETERS,
sizeof(NDIS_RECEIVE_SCALE_PARAMETERS)) )
{
XMPTRACE(XMP_DBG_WRN, ("xmpSetInformation:RSS_PARAMETERS invalid!!"
" Revision=%d Type=%d Size=%d\n",
pRssParam->Header.Revision,
pRssParam->Header.Type,
pRssParam->Header.Size));
BytesRead = sizeof(NDIS_OBJECT_HEADER);
Status = NDIS_STATUS_INVALID_PARAMETER;
break;
}
#endif
BytesRead = sizeof(NDIS_RECEIVE_SCALE_PARAMETERS);
if ( (InformationBufferLength < (pRssParam->IndirectionTableSize
+ pRssParam->IndirectionTableOffset)) ||
(InformationBufferLength < (pRssParam->HashSecretKeySize
+ pRssParam->HashSecretKeyOffset)) )
{
BytesNeeded = sizeof(NDIS_RECEIVE_SCALE_PARAMETERS);
Status = NDIS_STATUS_INVALID_LENGTH;
break;
}
HashType = NDIS_RSS_HASH_TYPE_FROM_HASH_INFO(pRssParam->HashInformation);
/*if ( HashType != 0 || NDIS_RSS_HASH_FUNC_FROM_HASH_INFO(pRssParam->HashInformation) != 0) */
validBits = (NDIS_HASH_IPV4 | NDIS_HASH_TCP_IPV4
#ifndef XMP_RSS_IPV4_ONLY
| NDIS_HASH_IPV6 | NDIS_HASH_TCP_IPV6
| NDIS_HASH_IPV6_EX | NDIS_HASH_TCP_IPV6_EX
#endif
);
if ( ((NDIS_RSS_HASH_FUNC_FROM_HASH_INFO(pRssParam->HashInformation) !=
NdisHashFunctionToeplitz) || /* the only hash function supported */
!bit(HashType, validBits) || /* at least one type should be set */
(HashType & ~validBits)) && /* no other type should be set */
(!(bit(pRssParam->Flags, NDIS_RSS_PARAM_FLAG_DISABLE_RSS)) &&
NDIS_RSS_HASH_FUNC_FROM_HASH_INFO(pRssParam->HashInformation) != 0) )
{
Status = NDIS_STATUS_INVALID_PARAMETER;
break;
}
if ( /*(pRssParam->IndirectionTableSize < (1 << pRssParam->NumberOfLsbs)) || */
(pRssParam->HashSecretKeySize & 0x7) || /* must be 8-bytes align */
(pRssParam->HashSecretKeySize > 40) || /* max secret key size */
(pRssParam->BaseCpuNumber & (pRssParam->BaseCpuNumber - 1)) )/*pow2 */
{
XMPTRACE(XMP_DBG_WRN, ("xmpReqSetRss:Invalid settings: Key Size=%d"
" IDT size=%d BaseCpu=%d\n",
pRssParam->HashSecretKeySize,
pRssParam->IndirectionTableSize,
pRssParam->BaseCpuNumber));
Status = NDIS_STATUS_INVALID_PARAMETER;
break;
}
if ((pRssParam->IndirectionTableSize + pRssParam->IndirectionTableOffset) >
(pRssParam->HashSecretKeySize + pRssParam->HashSecretKeyOffset))
BytesRead = (pRssParam->IndirectionTableSize +
pRssParam->IndirectionTableOffset);
else
BytesRead = (pRssParam->HashSecretKeySize +
pRssParam->HashSecretKeyOffset);
SetRssCtx.pNicCtx = pNicCtx;
SetRssCtx.pParams = pRssParam;
#if 0
if(NdisMSynchronizeWithInterruptEx(pNicCtx->hInterrupt, 0, xmpReqSetRss, &SetRssCtx))
#endif
if ( NDIS_RSS_HASH_FUNC_FROM_HASH_INFO(pRssParam->HashInformation) == 0 )
bis(pRssParam->Flags, NDIS_RSS_PARAM_FLAG_DISABLE_RSS);
if ( bit(pRssParam->Flags, NDIS_RSS_PARAM_FLAG_DISABLE_RSS) )
{
pNicCtx->ndisRssSet.size = sizeof(NDIS_RECEIVE_SCALE_PARAMETERS);
pNicCtx->ndisRssSet.params.BaseCpuNumber = 0;
pNicCtx->ndisRssSet.params.Flags = 0;
pNicCtx->ndisRssSet.params.HashInformation = 0;
pNicCtx->ndisRssSet.params.IndirectionTableSize = 0;
pNicCtx->ndisRssSet.params.IndirectionTableOffset = 0;
pNicCtx->ndisRssSet.params.HashSecretKeySize = 0;
pNicCtx->ndisRssSet.params.HashSecretKeyOffset = 0;
}
else
{
NdisMoveMemory(&pNicCtx->ndisRssSet.params, pRssParam, BytesRead);
pNicCtx->ndisRssSet.size = BytesRead;
}
xmpReqSetRss(pNicCtx);
#if 0
if ( !(setRssCount % 10) )
{
xmpReqSetRss(pNicCtx);
}
setRssCount++;
#endif
Status = NDIS_STATUS_SUCCESS;
break;
case OID_OFFLOAD_ENCAPSULATION:
XMPTRACE(XMP_DBG_OFLD, ("xmpSetInformation: offload encapsulation\n"));
if ( InformationBufferLength < sizeof(NDIS_OFFLOAD_ENCAPSULATION) )
{
BytesNeeded = sizeof(NDIS_OFFLOAD_ENCAPSULATION);
Status = NDIS_STATUS_INVALID_LENGTH;
break;
}
NdisMoveMemory(&pNicCtx->OffloadEncapsulation,
InformationBuffer,
sizeof(NDIS_OFFLOAD_ENCAPSULATION));
BytesRead = sizeof(NDIS_OFFLOAD_ENCAPSULATION);
Status = NDIS_STATUS_SUCCESS;
break;
case OID_GEN_INTERRUPT_MODERATION:
{
NDIS_INTERRUPT_MODERATION_PARAMETERS *pIntrModr;
if ( InformationBufferLength < sizeof(NDIS_INTERRUPT_MODERATION_PARAMETERS) )
{
BytesNeeded = sizeof(NDIS_INTERRUPT_MODERATION_PARAMETERS);
Status = NDIS_STATUS_INVALID_LENGTH;
break;
}
pIntrModr = (NDIS_INTERRUPT_MODERATION_PARAMETERS *) InformationBuffer;
if ( !XENAMP_NDIS_OBJECT_VALID(&pIntrModr->Header,
NDIS_INTERRUPT_MODERATION_PARAMETERS_REVISION_1,
NDIS_OBJECT_TYPE_DEFAULT,
sizeof(NDIS_INTERRUPT_MODERATION_PARAMETERS)) )
{
BytesRead = sizeof(NDIS_OBJECT_HEADER);
Status = NDIS_STATUS_INVALID_DATA;
break;
}
break;
}
case OID_TCP_OFFLOAD_PARAMETERS:
{
NDIS_OFFLOAD_PARAMETERS *pAdmin;
NDIS_STATUS_INDICATION StatusIndication;
ULONG size;
pAdmin = (NDIS_OFFLOAD_PARAMETERS *) InformationBuffer;
if ( InformationBufferLength < NDIS_SIZEOF_OFFLOAD_PARAMETERS_REVISION_1 )
{
BytesNeeded = NDIS_SIZEOF_OFFLOAD_PARAMETERS_REVISION_1;
Status = NDIS_STATUS_INVALID_LENGTH;
break;
}
if ( !XENAMP_NDIS_OBJECT_VALID(&pAdmin->Header,
NDIS_OFFLOAD_PARAMETERS_REVISION_1,
NDIS_OBJECT_TYPE_DEFAULT,
NDIS_SIZEOF_OFFLOAD_PARAMETERS_REVISION_1 ))
{
BytesRead = sizeof(NDIS_OBJECT_HEADER);
Status = NDIS_STATUS_INVALID_DATA;
break;
}
XMP_NIC_SET_ADMIN_OFFLOADS(pNicCtx, pAdmin);
xmpNicSetCkoFlags(pNicCtx);
xmpNicInitOffloadCapabilities(pNicCtx, &pNicCtx->OffloadCapabilities);
/* TODO: Generate event */
BytesRead = NDIS_SIZEOF_OFFLOAD_PARAMETERS_REVISION_1;
Status = NDIS_STATUS_SUCCESS;
XENAMP_NDIS_OBJECT_INIT(&StatusIndication.Header,
NDIS_OBJECT_TYPE_STATUS_INDICATION,
NDIS_STATUS_INDICATION_REVISION_1,
sizeof(NDIS_STATUS_INDICATION));
StatusIndication.SourceHandle = pNicCtx->hMPAdapter;
StatusIndication.PortNumber = 0;
StatusIndication.StatusCode = NDIS_STATUS_TASK_OFFLOAD_CURRENT_CONFIG;
StatusIndication.Flags = 0;
StatusIndication.DestinationHandle = NULL;
StatusIndication.RequestId = NdisRequest->RequestId;
StatusIndication.StatusBuffer = &pNicCtx->OffloadCapabilities;
StatusIndication.StatusBufferSize = sizeof(NDIS_OFFLOAD);
NdisMIndicateStatusEx(pNicCtx->hMPAdapter, &StatusIndication);
}
break;
case OID_GEN_HD_SPLIT_PARAMETERS:
{
NDIS_HD_SPLIT_PARAMETERS *pHdSplit;
pHdSplit = (NDIS_HD_SPLIT_PARAMETERS *) InformationBuffer;
if ( InformationBufferLength < NDIS_SIZEOF_HD_SPLIT_PARAMETERS_REVISION_1 )
{
BytesNeeded = NDIS_SIZEOF_HD_SPLIT_PARAMETERS_REVISION_1;
Status = NDIS_STATUS_INVALID_LENGTH;
break;
}
if ( !XENAMP_NDIS_OBJECT_VALID(&pHdSplit->Header,
NDIS_HD_SPLIT_PARAMETERS_REVISION_1,
NDIS_OBJECT_TYPE_DEFAULT,
NDIS_SIZEOF_HD_SPLIT_PARAMETERS_REVISION_1 ))
{
BytesRead = sizeof(NDIS_OBJECT_HEADER);
Status = NDIS_STATUS_INVALID_DATA;
break;
}
if( bit(pHdSplit->HDSplitCombineFlags, NDIS_HD_SPLIT_COMBINE_ALL_HEADERS) )
bis( pNicCtx->Flags, XMP_NIC_FLAGS_RX_SPLIT_COMBINE );
else
bic( pNicCtx->Flags, XMP_NIC_FLAGS_RX_SPLIT_COMBINE );
}
break;
default:
XMPTRACE(XMP_DBG_INFO, ("xmpSetInformation: unsupported OID=%lx\n", Oid));
Status = xmpDiagSetInformation(
pNicCtx,
Oid,
InformationBuffer,
InformationBufferLength,
&BytesRead,
&BytesNeeded);
break;
}
NdisRequest->DATA.SET_INFORMATION.BytesRead = BytesRead;
NdisRequest->DATA.SET_INFORMATION.BytesNeeded = BytesNeeded;
XMPTRACE(XMP_DBG_REQ, ("<== xmpSetInformation: Status=%x\n", Status));
return Status;
}
/* Compute x^y using only calls to functions bis and bic */
int bool_xor(int x, int y) {
int result = bic ( bis(x, y), bic ( x, bic (x, y)));
return result;
}
/* Compute x&y using only calls to functions bis and bic */
int bool_and(int x, int y)
{
int result = bic(bis(x, y), bis(bic(x, y), bic(y, x)));
return result;
}