void setup() {
pinMode(BOARD_BUTTON_PIN, INPUT);
comm.begin(9600);
comm.println("*** Beginning BKP test");
comm.println("Init...");
bkp_init();
comm.println("Done.");
print_bkp_contents();
write_to_bkp(10);
print_bkp_contents();
comm.println("Enabling backup writes.");
bkp_enable_writes();
write_to_bkp(20);
print_bkp_contents();
comm.println("Disabling backup writes.");
bkp_disable_writes();
write_to_bkp(30);
print_bkp_contents();
comm.println("Done testing backup registers; press button to enable "
"independent watchdog (in order to cause a reset).");
waitForButtonPress(0);
iwdg_init(IWDG_PRE_4, 1);
comm.println();
}
/**
* Initialize the RTC interface, and enable access to its register map and
* the backup registers.
*/
void rtc_init(rtc_clk_src src) {
bkp_init(); // turn on peripheral clocks to PWR and BKP and reset the backup domain via RCC registers.
// (we reset the backup domain here because we must in order to change the rtc clock source).
bkp_enable_writes(); // enable writes to the backup registers and the RTC registers via the DBP bit in the PWR control register
RCC_BASE->BDCR &= ~RCC_BDCR_RTCSEL; // Clear the RTC clock source select field
switch (src) {
case RTCSEL_NONE:
RCC_BASE->BDCR |= RCC_BDCR_RTCSEL_NONE;
break;
case RTCSEL_LSE:
rcc_start_lse();
RCC_BASE->BDCR |= RCC_BDCR_RTCSEL_LSE;
break;
default:
case RTCSEL_LSI:
case RTCSEL_DEFAULT:
rcc_start_lsi();
RCC_BASE->BDCR |= RCC_BDCR_RTCSEL_LSI;
break;
case RTCSEL_HSE: // This selection uses HSE/128 as the RTC source (i.e. 64 kHz with an 8 mHz xtal)
// assume the HSE clock is running (see rcc_clk_init())
RCC_BASE->BDCR |= RCC_BDCR_RTCSEL_HSE;
break;
}
*bb_perip(&RCC_BASE->BDCR, RCC_BDCR_RTCEN_BIT) = 1; // Enable the RTC
rtc_wait_finished();
}
void BKP::begin(){
bkp_init();
}
