示例#1
0
文件: board.c 项目: Adilla/openwsn-fw
void board_init() {
   // disable watchdog timer
   WDTCTL     =  WDTPW + WDTHOLD;
   
   // setup clock speed
   DCOCTL    |=  DCO0 | DCO1 | DCO2;             // MCLK at ~8MHz
   BCSCTL1   |=  RSEL0 | RSEL1 | RSEL2;          // MCLK at ~8MHz
                                                 // by default, ACLK from 32kHz XTAL which is running
   
   // initialize pins
   P4DIR     |=  0x20;                           // [P4.5] radio VREG:  output
   P4DIR     |=  0x40;                           // [P4.6] radio reset: output
   
   // initialize bsp modules
   debugpins_init();
   leds_init();
   uart_init();
   spi_init();
   bsp_timer_init();
   radio_init();
   radiotimer_init();
   
   // enable interrupts
   __bis_SR_register(GIE);
}
示例#2
0
void board_init()
{
    RCC_Configuration();//Configure rcc
    NVIC_Configuration();//configure NVIC and Vector Table
    
    //configure ALL GPIO to AIN to get lowest power
    GPIO_Config_ALL_AIN();
    //configuration GPIO to measure the time from sleep to 72MHz
    GPIO_Configuration();
    
    GPIO_InitTypeDef  GPIO_InitStructure;
  
    //enable GPIOB, Clock
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB , ENABLE);
    
    //Configure PB.01 as SLP_TR pin of RF
    GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_1;
    GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_Out_PP;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_Init(GPIOB, &GPIO_InitStructure);
  
    //Configure PB.11 as RST pin of RF
    GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_11;
    GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_Out_PP;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_Init(GPIOB, &GPIO_InitStructure);
    
    //set /RST pin high(never reset)
    GPIO_SetBits(GPIOB, GPIO_Pin_11);
    
    // Configure PB.10 as input floating (EXTI Line10)
    GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_10;
    GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_IN_FLOATING;
    GPIO_Init(GPIOB, &GPIO_InitStructure);
    
    GPIOB->ODR |= 0X0400;//set low
    
    GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource10);//Connect EXTI Line10 to PB.10
    EXTI_ClearITPendingBit(EXTI_Line10);

    //Configures EXTI line 10 to generate an interrupt on rising edge
    EXTI_InitTypeDef  EXTI_InitStructure; 
    EXTI_InitStructure.EXTI_Line    = EXTI_Line10;
    EXTI_InitStructure.EXTI_Mode    = EXTI_Mode_Interrupt; 
    EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
    EXTI_InitStructure.EXTI_LineCmd = ENABLE; 
    EXTI_Init(&EXTI_InitStructure);
    
    // initialize board
    leds_init();
    uart_init();
    spi_init();
    bsp_timer_init();
    radio_init();
    radiotimer_init();
    debugpins_init();
    //enable nvic for the radio
    NVIC_radio();
}
示例#3
0
文件: board.c 项目: Babody/openwsn-fw
void board_init(void) {
   uint8_t delay;
   
   // disable watchdog timer
   WDTCTL     =  WDTPW + WDTHOLD;
   
   //===== clocking
   
   DCOCTL     = 0;                               // we are not using the DCO
   BCSCTL1    = 0;                               // we are not using the DCO
   BCSCTL2    = SELM_2 | (SELS | DIVS_3) ;       // MCLK=XT2, SMCLK=XT2/8
   
   // the MSP detected that the crystal is not running (it's normal, it is
   // starting). It set the OFIFG flag, causing the MSP430 to switch back to
   // the DC0. By software, we need to clear that flag, causing the MSP430 to
   // switch back to using the XT2 as a clocking source, but verify that it
   // stays cleared. This is explained in detail in Section 4.2.6 "Basic Clock
   // Module Fail-Safe Operation" of slau049f, pdf page 119.
   
   do {
      IFG1   &= ~OFIFG;                          // clear OSCFault flag
      for (delay=0;delay<0xff;delay++) {         // busy wait for at least 50us
          __no_operation();
      }
   } while ((IFG1 & OFIFG) != 0);                // repeat until OSCFault flag stays cleared
   
   //===== pins
   
   P3DIR     |=  0x01;                           // [P3.0] radio VREG:  output
   P1DIR     |=  0x80;                           // [P1.7] radio reset: output
   P1DIR     &= ~0x20;                           // [P1.5] radio SFD:   input
   P1IES     &= ~0x20;                           // [P1.5] radio SFD:   low->high
   P1IFG     &= ~0x20;                           // [P1.5] radio SFD:   clear interrupt flag
   P1IE      |=  0x20;                           // [P1.5] radio SFD:   interrupt enabled
   
   //===== bsp modules
   
   debugpins_init();
   leds_init();
   uart_init();
   spi_init();
   bsp_timer_init();
   radio_init();
   radiotimer_init();
   
   //===== enable interrupts
   
   __bis_SR_register(GIE);
}
示例#4
0
void board_init() {
   gpio_init();
   clock_init();

   antenna_init();
   antenna_external();

   leds_init();
   debugpins_init();
   button_init();
   bsp_timer_init();
   radiotimer_init();
   uart_init();
   radio_init();
}
示例#5
0
文件: board.c 项目: giu7ppe/openwsn
void board_init() {

   // initialize bsp modules
   debugpins_init();
   leds_init();
   uart_init();
   bsp_timer_init();
   radio_init();
   radiotimer_init();
   
   // send request to server and get reply
   opensim_client_sendAndWaitForAck(OPENSIM_CMD_board_init,
                                    0,
                                    0,
                                    0,
                                    0);
}
示例#6
0
文件: board.c 项目: Babody/openwsn-fw
void board_init() {
   
   // disable watchdog timer
   WDTCTL  = WDTPW + WDTHOLD;
   
   // setup clock speed --seems that does not work
   //BCSCTL1 = CALBC1_16MHZ;                       // MCLK at ~16MHz
   //DCOCTL  = CALDCO_16MHZ;                       // MCLK at ~16MHz
   
   if(CALBC1_8MHZ != 0xFF) {
     DCOCTL   = 0x00;
     BCSCTL1  = CALBC1_8MHZ;                     //Set DCO to 8MHz
     DCOCTL   = CALDCO_8MHZ;    
   } else { //start using reasonable values at 8 Mhz
     DCOCTL   = 0x00;
     BCSCTL1  = 0x8D;
     DCOCTL   = 0x88;
   }
   
   // enable flash access violation NMIs
   IE1 |= ACCVIE;
   
    // initialize pins
   P4DIR     |=  0x20;                           // [P4.5] radio VREG:  output
   P4DIR     |=  0x40;                           // [P4.6] radio reset: output
   
   // initialize bsp modules
   debugpins_init();
   leds_init();
   uart_init();
   spi_init();
   bsp_timer_init();
   radio_init();
   radiotimer_init();
   
   // enable interrupts
   __bis_SR_register(GIE);
}
示例#7
0
文件: board.c 项目: Babody/openwsn-fw
void board_init() {
	uint16_t i,j;
	//enable all port clocks.
	SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
			| SIM_SCGC5_PORTB_MASK
			| SIM_SCGC5_PORTC_MASK
			| SIM_SCGC5_PORTD_MASK
			| SIM_SCGC5_PORTE_MASK );


	//init all pins for the radio
	//SLPTR
#ifdef TOWER_K20
	PORTB_PCR3 = PORT_PCR_MUX(1);// -- PTB3 used as gpio for slptr
	GPIOB_PDDR |= RADIO_SLPTR_MASK; //set as output

	//RADIO RST -- TODO in the TWR change it to another pin! this is one of the leds.
	PORTC_PCR9 = PORT_PCR_MUX(1);// -- PTC9 used as gpio for radio rst
	GPIOC_PDDR |= RADIO_RST_MASK; //set as output


#elif OPENMOTE_K20
	PORTD_PCR4 = PORT_PCR_MUX(1);// -- PTD4 used as gpio for slptr
	GPIOD_PDDR |= RADIO_SLPTR_MASK; //set as output

	//RADIO RST 
	PORTD_PCR5 = PORT_PCR_MUX(1);// -- PTD5 used as gpio for radio rst
	GPIOD_PDDR |= RADIO_RST_MASK; //set as output

#endif	

	PORT_PIN_RADIO_RESET_LOW();//activate the radio.

	
	PORT_PIN_RADIO_SLP_TR_CNTL_LOW();
	
	//ptc5 .. ptc5 is pin 62, irq A
	enable_irq(RADIO_EXTERNAL_PORT_IRQ_NUM);//enable the irq. The function is mapped to the vector at position 105 (see manual page 69). The vector is in isr.h

	//external port radio_isr.
	PORTC_PCR5 = PORT_PCR_MUX(1);// -- PTC5 used as gpio for radio isr through llwu
	GPIOC_PDDR &= ~1<<RADIO_ISR_PIN; //set as input ==0
	PORTC_PCR5 |= PORT_PCR_IRQC(0x09); //9 interrupt on raising edge. page 249 of the manual.	
	PORTC_PCR5 |= PORT_PCR_ISF_MASK; //clear any pending interrupt.

	llwu_init();//low leakage unit init - to recover from deep sleep

	debugpins_init();
	leds_init();
	bsp_timer_init();
	uart_init();
	radiotimer_init();
	spi_init();	
	radio_init();
	leds_all_off();
	leds_sync_on();
	leds_radio_on();
	leds_debug_on();
	leds_error_on();
	leds_all_off();
	debugpins_fsm_clr();
}