static void client_connected(void *st, errval_t err, struct rcce_binding *b)
{
struct rcce_state *cs = st;
assert(err_is_ok(err));
/* printf("%s: Am connected to client\n", my_name); */
b->rx_vtbl = rcce_vtbl;
b->st = cs;
// Create a Frame Capability
size_t allocated_size;
struct capref shared_mem;
#ifdef __scc__
ram_set_affinity(SHARED_MEM_MIN + (PERCORE_MEM_SIZE * disp_get_core_id()),
SHARED_MEM_MIN + (PERCORE_MEM_SIZE * (disp_get_core_id() + 1)));
#endif
errval_t r = frame_alloc(&shared_mem, BULK_SIZE * 2, &allocated_size);
assert(err_is_ok(r));
#ifdef __scc__
ram_set_affinity(0, 0);
#endif
// Map the frame in local memory
void *pool;
r = vspace_map_one_frame_attr(&pool, allocated_size, shared_mem,
BULK_PAGE_MAP, NULL, NULL);
assert(pool != NULL);
assert(err_is_ok(r));
assert(allocated_size >= BULK_SIZE * 2);
// Init sender
err = bulk_init(pool, BULK_SIZE, BLOCK_SIZE, &cs->bt);
assert(err_is_ok(err));
// Init receiver
err = bulk_slave_init(pool + BULK_SIZE, BULK_SIZE, &cs->btr);
assert(err_is_ok(err));
barrier_binding_init(b);
barray[cs->index] = b;
err = barray[cs->index]->tx_vtbl.init_request(barray[cs->index],
NOP_CONT, my_core_id, bsp_id,
(uint64_t)(uintptr_t)cs,
shared_mem);
assert(err_is_ok(err));
}
static void init_request(struct rcce_binding *st, coreid_t id, coreid_t bspid,
uint64_t state, struct capref shared_mem)
{
errval_t err;
struct rcce_state *rs = st->st;
// Initialize local state for incoming connection
barray[id] = st;
bsp_id = bspid;
// Map the frame in local memory
void *pool;
err = vspace_map_one_frame_attr(&pool, BULK_SIZE * 2, shared_mem,
BULK_PAGE_MAP, NULL, NULL);
assert(pool != NULL);
assert(err_is_ok(err));
// Init receiver
err = bulk_slave_init(pool, BULK_SIZE, &rs->btr);
assert(err_is_ok(err));
// Init sender
err = bulk_init(pool + BULK_SIZE, BULK_SIZE, BLOCK_SIZE, &rs->bt);
assert(err_is_ok(err));
if(connect_request == NULL && my_core_id != bspid) {
connect_request = st;
connect_state = state;
} else {
err = st->tx_vtbl.error_reply(st, NOP_CONT, SYS_ERR_OK, state);
if (err_is_fail(err)) {
DEBUG_ERR(err, "init_reply failed");
abort();
}
}
}
// Application entry point called from bootloader v4.x
void main(void)
#endif
{
#if defined(__18f25k50) || defined(__18f45k50) || \
defined(__18f26j50) || defined(__18f46j50) || \
defined(__18f26j53) || defined(__18f46j53) || \
defined(__18f27j53) || defined(__18f47j53)
u16 pll_startup_counter = 600;
#endif
/// ----------------------------------------------------------------
/// If we start from a Power-on reset, set NOT_POR bit to 1
/// ----------------------------------------------------------------
if (RCONbits.NOT_POR == 0)
{
RCON |= 0b10010011; // set all reset flag
// enable priority levels on interrupts
}
/// ----------------------------------------------------------------
/// Disables all interrupt
/// ----------------------------------------------------------------
//INTCONbits.GIEH = 0; // Disables all HP interrupts
//INTCONbits.GIEL = 0; // Disables all LP interrupts
/// ----------------------------------------------------------------
/// Perform a loop for some processors until their frequency is stable
/// ----------------------------------------------------------------
#if defined(__18f2455) || defined(__18f4455) || \
defined(__18f2550) || defined(__18f4550)
// If Internal Oscillator is used
if (OSCCONbits.SCS > 0x01)
// wait INTOSC frequency is stable (IOFS=1)
while (!OSCCONbits.IOFS);
// PLL is enabled by Config. Bits
#elif defined(__18f25k50) || defined(__18f45k50)
// If Internal Oscillator is used
if (OSCCONbits.SCS > 0x01)
// wait HFINTOSC frequency is stable (HFIOFS=1)
while (!OSCCONbits.HFIOFS);
// Enable the PLL and wait 2+ms until the PLL locks
OSCCON2bits.PLLEN = 1;
OSCTUNEbits.SPLLMULT = 1; // 1=3xPLL, 0=4xPLL
while (pll_startup_counter--);
#elif defined(__18f26j50) || defined(__18f46j50)
// If Internal Oscillator is used
// if (OSCCONbits.SCS > 0x02)
// Seems there is no time to wait
// Enable the PLL and wait 2+ms until the PLL locks
OSCTUNEbits.PLLEN = 1;
while (pll_startup_counter--);
#elif defined(__18f26j53) || defined(__18f46j53) || \
defined(__18f27j53) || defined(__18f47j53)
// If Internal Oscillator is used
if (OSCCONbits.SCS > 0x02)
// wait INTOSC frequency is stable (FLTS=1)
while(!OSCCONbits.FLTS);
// Enable the PLL and wait 2+ms until the PLL locks
OSCTUNEbits.PLLEN = 1;
while (pll_startup_counter--);
#endif
/// ----------------------------------------------------------------
/// I/O init
/// ----------------------------------------------------------------
IO_init();
IO_digital();
#if defined(__18f26j50) || defined(__18f46j50) || \
defined(__18f26j53) || defined(__18f46j53) || \
defined(__18f27j53) || defined(__18f47j53)
IO_remap();
#endif
/// ----------------------------------------------------------------
/// Various Init.
/// ----------------------------------------------------------------
#ifdef __USB__
usb_init();
#endif
#ifdef __USBCDC
CDC_init();
#endif
#ifdef __USBBULK
bulk_init();
#endif
#if defined(ANALOGREFERENCE) || defined(ANALOGREAD)
analog_init();
#endif
#ifdef ANALOGWRITE
analogwrite_init();
#endif
#ifdef __MILLIS__ // Use Timer 0
millis_init();
#endif
#ifdef SERVOSLIBRARY // Use Timer 1
servos_init();
#endif
#ifdef __PS2KEYB__
keyboard_init()
#endif
////////////////////////////////////////////////////////////////////////
setup();
////////////////////////////////////////////////////////////////////////
#if defined(TMR0INT) || defined(TMR1INT) || \
defined(TMR2INT) || defined(TMR3INT) || \
defined(TMR4INT) || defined(TMR5INT) || \
defined(TMR6INT) || defined(TMR8INT)
IntTimerStart(); // Enable all defined timers interrupts
// at the same time
#endif
#ifdef ON_EVENT
//IntInit();
INTCONbits.GIEH = 1; // Enable global HP interrupts
INTCONbits.GIEL = 1; // Enable global LP interrupts
#endif
while (1)
{
////////////////////////////////////////////////////////////////////////
loop();
////////////////////////////////////////////////////////////////////////
}
}
void pinguino_main(void)
{
#if defined(PIC18F26J50)
// Enable the PLL and wait 2+ms until the PLL locks
u16 pll_startup_counter = 600;
OSCTUNEbits.PLLEN = 1;
while(pll_startup_counter--);
#endif
PIE1 = 0;
PIE2 = 0;
IOsetSpecial();
IOsetDigital();
IOsetRemap();
#ifdef ON_EVENT // Enable General/Peripheral interrupts
int_init(); // Disable all individual interrupts
#endif
#ifdef __USB__
PIE2bits.USBIE = 1;
INTCONbits.PEIE = 1;
INTCONbits.GIE = 1;
#endif
//setup();
//#ifdef ON_EVENT
//int_start(); // Enable all defined timers interrupts
//#endif
#ifdef ANALOG
analog_init();
#endif
#ifdef __MILLIS__ // Use Timer 0
millis_init();
#endif
#ifdef SERVOSLIBRARY
servos_init();
#endif
#ifdef __USBCDC
CDC_init();
PIE2bits.USBIE = 1;
INTCONbits.PEIE = 1;
INTCONbits.GIE = 1;
#endif
#ifdef __USBBULK
bulk_init();
PIE2bits.USBIE = 1;
INTCONbits.PEIE = 1;
INTCONbits.GIE = 1;
#endif
#ifdef __PS2KEYB__
keyboard_init()
#endif
#if defined(__SERIAL__) || defined(SERVOSLIBRARY)
INTCONbits.PEIE = 1;
INTCONbits.GIE = 1;
#endif
/* RB : millis.c/millis_init() did already the job
#ifdef MILLIS
INTCONbits.TMR0IE= 1;
INTCONbits.GIE = 1;
#endif
*/
setup();
#ifdef ON_EVENT
int_start(); // Enable all defined timers interrupts
#endif
while (1)
loop();
}
/*************************************************************************
main
====
**************************************************************************/
int main(void)
{
///////////////////////////////////////////////////
// PRELUDE
///////////////////////////////////////////////////
// PLL and MAM
HalSysInit();
#ifdef LPC214x
// init DBG
ConsoleInit(60000000 / (16 * BAUD_RATE));
#else
// init DBG
ConsoleInit(72000000 / (16 * BAUD_RATE));
#endif
DBG("Initialising USB stack\n");
// initialise stack
USBInit();
// enable bulk-in interrupts on NAKs
USBHwNakIntEnable(INACK_BI);
// register descriptors
USBRegisterDescriptors(isoDescriptors);
//USBRegisterRequestHandler(REQTYPE_TYPE_CLASS, HandleClassRequest, abClassReqData);
// register endpoint handlers
USBHwRegisterEPIntHandler(INT_IN_EP, NULL);
USBHwRegisterEPIntHandler(BULK_IN_EP, BulkIn);
USBHwRegisterEPIntHandler(BULK_OUT_EP, BulkOut);
// USBHwRegisterEPIntHandler(ISOC_OUT_EP, IsocOut);
// register frame handler
//USBHwRegisterFrameHandler(USBFrameHandler);
// register device event handler
USBHwRegisterDevIntHandler(USBDevIntHandler);
bulk_init();
DBG("Starting USB communication\n");
#ifdef LPC214x
(*(&VICVectCntl0+INT_VECT_NUM)) = 0x20 | 22; // choose highest priority ISR slot
(*(&VICVectAddr0+INT_VECT_NUM)) = (int)USBIntHandler;
#else
VICVectCntl22 = 0x01;
VICVectAddr22 = (int)USBIntHandler;
#endif
// set up USB interrupt
VICIntSelect &= ~(1<<22); // select IRQ for USB
VICIntEnable |= (1<<22);
enableIRQ();
// connect to bus
USBHwConnect(TRUE);
/////////////////////////////////////////////
// FUNCTION
/////////////////////////////////////////////
// int
// bulk - echo
// isoc A - regular - Broadcast numbers
// isoc B - dma -echo
// isoc C - dma
//////////////////////////////////////////
// DEBUG LIGHTS
//////////////////////////////////////////
int c;
int x = 0;
int ch ='a';
c = EOF;
// echo any character received (do USB stuff in interrupt)
while (1) {
// Turn light on and off.
x++;
if (x == 400000) {
IOSET0 = (1<<11);
//turn on led
if( ch > 'z' ) {
ch = 'a';
}
ch++;
} else if (x >= 800000) {
IOCLR0 = (1<<11);
//turn off led
x = 0;
}
}
return 0;
}
int
main(int argc, char *argv[])
{
struct cmd c;
struct ret r;
uint32_t off;
int32_t size;
uint8_t *buf;
int ch, img, boot;
const char *device = NULL;
int res;
progname = argv[0];
boot = 0;
size = 0;
while ((ch = getopt(argc, argv, "vBr:D:")) != -1) {
switch (ch) {
case 'v':
verbose++;
break;
case 'B':
boot = 1;
break;
case 'D':
device = strdup(optarg);
break;
case 'r':
size = strtoul(optarg, NULL, 0);
break;
default:
usage();
}
}
argc -= optind;
argv += optind;
if (bulk_init(device) != 0)
errx(EXIT_FAILURE, "Failure finding device\n");
if (argc != 2)
usage();
if ((off = strtoul(argv[0], NULL, 0)) & 0x1f)
errx(EXIT_FAILURE, "offset must be multiple of 0x20\n");
if (size == 0)
img = open(argv[1], O_RDONLY);
else
img = open(argv[1], O_WRONLY | O_CREAT | O_TRUNC, 0644);
if (img == -1)
err(EXIT_FAILURE, "%s", argv[1]);
if ((buf = malloc(_BLOCKSIZE)) == NULL)
err(EXIT_FAILURE, "malloc");
memset(buf, 0, _BLOCKSIZE);
memset(&c, 0, sizeof(c));
c.hdr[0] = 'U';
c.hdr[1] = 'S';
c.hdr[2] = 'B';
c.hdr[3] = 'C';
do {
SETCMD_INIT(c);
BULK_SEND_EP2(&c, sizeof(c));
res = BULK_RECV_EP1(&r, sizeof(r));
} while(res < 0);
usleep(20 * 1000);
#if 0
SETCMD_UNKNOWN(c);
BULK_SEND_EP2(&c, sizeof(c));
BULK_RECV_EP1(&r, sizeof(r));
usleep(40 * 1000);
#endif
if (size == 0) {
while (read(img, buf, _BLOCKSIZE) > 0) {
if (verbose)
fprintf(stderr, "writing offset 0x%08x\n", off);
SETCMD_WRITE(c, off);
BULK_SEND_EP2(&c, sizeof(c));
BULK_SEND_EP2(buf, _BLOCKSIZE);
if (BULK_RECV_EP1(&r, sizeof(r)) < 0)
fprintf(stderr, "error writing offset 0x%08x\n", off);
off += 0x20;
memset(buf, 0, _BLOCKSIZE);
}
} else {
while (size > 0) {
if (verbose)
fprintf(stderr, "reading offset 0x%08x\n", off);
SETCMD_READ(c, off);
BULK_SEND_EP2(&c, sizeof(c));
BULK_RECV_EP1(buf, _BLOCKSIZE);
if (BULK_RECV_EP1(&r, sizeof(r)) < 0)
fprintf(stderr, "error reading offset 0x%08x\n", off);
write(img, buf, _BLOCKSIZE);
off += 0x20;
size -= 0x20;
}
}
if (boot) {
fprintf(stderr, "booting\n");
usleep(20 * 1000);
SETCMD_BOOT(c);
BULK_SEND_EP2(&c, sizeof(c));
BULK_RECV_EP1(&r, sizeof(r));
}
free(buf);
close(img);
return EXIT_SUCCESS;
}
