/**
* iwl_irq_handle_error - called for HW or SW error interrupt from card
*/
static void iwl_irq_handle_error(struct iwl_trans *trans)
{
struct iwl_priv *priv = priv(trans);
/* W/A for WiFi/WiMAX coex and WiMAX own the RF */
if (priv->cfg->internal_wimax_coex &&
(!(iwl_read_prph(bus(trans), APMG_CLK_CTRL_REG) &
APMS_CLK_VAL_MRB_FUNC_MODE) ||
(iwl_read_prph(bus(trans), APMG_PS_CTRL_REG) &
APMG_PS_CTRL_VAL_RESET_REQ))) {
/*
* Keep the restart process from trying to send host
* commands by clearing the ready bit.
*/
clear_bit(STATUS_READY, &trans->shrd->status);
clear_bit(STATUS_HCMD_ACTIVE, &trans->shrd->status);
wake_up(&priv->shrd->wait_command_queue);
IWL_ERR(trans, "RF is used by WiMAX\n");
return;
}
IWL_ERR(trans, "Loaded firmware version: %s\n",
priv->hw->wiphy->fw_version);
iwl_dump_nic_error_log(trans);
iwl_dump_csr(trans);
iwl_dump_fh(trans, NULL, false);
iwl_dump_nic_event_log(trans, false, NULL, false);
#ifdef CONFIG_IWLWIFI_DEBUG
if (iwl_get_debug_level(trans->shrd) & IWL_DL_FW_ERRORS)
iwl_print_rx_config_cmd(priv(trans), IWL_RXON_CTX_BSS);
#endif
iwlagn_fw_error(priv, false);
}
int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len,
uint8_t flags)
{
int ret;
assert(dev < I2C_NUMOF);
/* Check for unsupported operations */
if (flags & I2C_ADDR10) {
return -EOPNOTSUPP;
}
/* Check for wrong arguments given */
if (data == NULL || len == 0) {
return -EINVAL;
}
if (!(flags & I2C_NOSTART)) {
ret = _start(bus(dev), (addr<<1));
if (ret < 0) {
DEBUG("Start command failed\n");
return ret;
}
}
ret = _write(bus(dev), data, len, (flags & I2C_NOSTOP) ? 0 : 1);
if (ret < 0) {
DEBUG("Write command failed\n");
return ret;
}
return 0;
}
/* Device is going up inform it about using ICT interrupt table,
* also we need to tell the driver to start using ICT interrupt.
*/
int iwl_reset_ict(struct iwl_trans *trans)
{
u32 val;
unsigned long flags;
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
if (!trans_pcie->ict_tbl_vir)
return 0;
spin_lock_irqsave(&trans->shrd->lock, flags);
iwl_disable_interrupts(trans);
memset(&trans_pcie->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
val = trans_pcie->aligned_ict_tbl_dma >> PAGE_SHIFT;
val |= CSR_DRAM_INT_TBL_ENABLE;
val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
IWL_DEBUG_ISR(trans, "CSR_DRAM_INT_TBL_REG =0x%X "
"aligned dma address %Lx\n",
val,
(unsigned long long)trans_pcie->aligned_ict_tbl_dma);
iwl_write32(bus(trans), CSR_DRAM_INT_TBL_REG, val);
trans_pcie->use_ict = true;
trans_pcie->ict_index = 0;
iwl_write32(bus(trans), CSR_INT, trans_pcie->inta_mask);
iwl_enable_interrupts(trans);
spin_unlock_irqrestore(&trans->shrd->lock, flags);
return 0;
}
/* Device is going up inform it about using ICT interrupt table,
* also we need to tell the driver to start using ICT interrupt.
*/
int iwl_reset_ict(struct iwl_trans *trans)
{
u32 val;
unsigned long flags;
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
if (!trans_pcie->ict_tbl)
return 0;
spin_lock_irqsave(&trans->shrd->lock, flags);
iwl_disable_interrupts(trans);
memset(trans_pcie->ict_tbl, 0, ICT_SIZE);
val = trans_pcie->ict_tbl_dma >> ICT_SHIFT;
val |= CSR_DRAM_INT_TBL_ENABLE;
val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
IWL_DEBUG_ISR(trans, "CSR_DRAM_INT_TBL_REG =0x%x\n", val);
iwl_write32(bus(trans), CSR_DRAM_INT_TBL_REG, val);
trans_pcie->use_ict = true;
trans_pcie->ict_index = 0;
iwl_write32(bus(trans), CSR_INT, trans_pcie->inta_mask);
iwl_enable_interrupts(trans);
spin_unlock_irqrestore(&trans->shrd->lock, flags);
return 0;
}
int i2c_read_bytes(i2c_t dev, uint16_t addr,
void *data, size_t len, uint8_t flags)
{
int ret;
assert(dev < I2C_NUMOF);
/* Check for unsupported operations */
if (flags & I2C_ADDR10) {
return -EOPNOTSUPP;
}
/* Check for wrong arguments given */
if (data == NULL || len == 0) {
return -EINVAL;
}
if (!(flags & I2C_NOSTART)) {
/* start transmission and send slave address */
ret = _start(bus(dev), (addr << 1) | I2C_READ);
if (ret < 0) {
DEBUG("Start command failed\n");
return ret;
}
}
/* read data to register and issue stop if needed */
ret = _read(bus(dev), data, len, (flags & I2C_NOSTOP) ? 0 : 1);
if (ret < 0) {
DEBUG("Read command failed\n");
return ret;
}
/* Ensure all bytes has been read */
while ((bus(dev)->STATUS.reg & SERCOM_I2CM_STATUS_BUSSTATE_Msk)
!= BUSSTATE_IDLE) {}
/* return number of bytes sent */
return 0;
}
static void iwl6150_additional_nic_config(struct iwl_priv *priv)
{
/* Indicate calibration version to uCode. */
if (iwlagn_eeprom_calib_version(priv) >= 6)
iwl_set_bit(bus(priv), CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
iwl_set_bit(bus(priv), CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_6050_1x2);
}
void _i2c_poweroff(i2c_t dev)
{
assert(dev < I2C_NUMOF);
if (bus(dev) == NULL) {
return;
}
bus(dev)->CTRLA.bit.ENABLE = 0;
while (bus(dev)->SYNCBUSY.bit.ENABLE) {}
}
/* NIC configuration for 1000 series */
static void iwl1000_nic_config(struct iwl_priv *priv)
{
/* set CSR_HW_CONFIG_REG for uCode use */
iwl_set_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
/* Setting digital SVR for 1000 card to 1.32V */
/* locking is acquired in iwl_set_bits_mask_prph() function */
iwl_set_bits_mask_prph(bus(priv), APMG_DIGITAL_SVR_REG,
APMG_SVR_DIGITAL_VOLTAGE_1_32,
~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);
}
/*
* allocate dram shared table, it is an aligned memory
* block of ICT_SIZE.
* also reset all data related to ICT table interrupt.
*/
int iwl_alloc_isr_ict(struct iwl_trans *trans)
{
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
trans_pcie->ict_tbl =
dma_alloc_coherent(bus(trans)->dev, ICT_SIZE,
&trans_pcie->ict_tbl_dma,
GFP_KERNEL);
if (!trans_pcie->ict_tbl)
return -ENOMEM;
/* just an API sanity check ... it is guaranteed to be aligned */
if (WARN_ON(trans_pcie->ict_tbl_dma & (ICT_SIZE - 1))) {
iwl_free_isr_ict(trans);
return -EINVAL;
}
IWL_DEBUG_ISR(trans, "ict dma addr %Lx\n",
(unsigned long long)trans_pcie->ict_tbl_dma);
IWL_DEBUG_ISR(trans, "ict vir addr %p\n", trans_pcie->ict_tbl);
/* reset table and index to all 0 */
memset(trans_pcie->ict_tbl, 0, ICT_SIZE);
trans_pcie->ict_index = 0;
/* add periodic RX interrupt */
trans_pcie->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
return 0;
}
// Bus-panning command method.
bool qtractorBusPanningCommand::redo (void)
{
qtractorBus *pBus = bus();
if (pBus == NULL)
return false;
// Set Bus panning (repective monitor gets set too...)
const float fPanning = m_fPrevPanning;
qtractorMeter *pMeter = meter();
if (pMeter)
pMeter->setPanning(m_fPanning);
// MIDI buses are special...
if (pBus->busType() == qtractorTrack::Midi) {
// Now we gotta make sure of proper MIDI bus...
qtractorMidiBus *pMidiBus
= static_cast<qtractorMidiBus *> (pBus);
if (pMidiBus)
pMidiBus->setMasterPanning(m_fPanning);
}
// Set undo value...
m_fPrevPanning = m_fPanning;
m_fPanning = fPanning;
return true;
}
zx_status_t PlatformBus::Create(zx_device_t* parent, const char* name, zx::vmo zbi) {
// This creates the "sys" device.
sys_device_proto.version = DEVICE_OPS_VERSION;
device_add_args_t args = {};
args.version = DEVICE_ADD_ARGS_VERSION;
args.name = "sys";
args.ops = &sys_device_proto;
args.flags = DEVICE_ADD_NON_BINDABLE;
// Add child of sys for the board driver to bind to.
auto status = device_add(parent, &args, &parent);
if (status != ZX_OK) {
return status;
}
fbl::AllocChecker ac;
fbl::unique_ptr<platform_bus::PlatformBus> bus(new (&ac) platform_bus::PlatformBus(parent));
if (!ac.check()) {
return ZX_ERR_NO_MEMORY;
}
status = bus->Init(std::move(zbi));
if (status != ZX_OK) {
return status;
}
// devmgr is now in charge of the device.
__UNUSED auto* dummy = bus.release();
return ZX_OK;
}
// Bus-gain command method.
bool qtractorBusGainCommand::redo (void)
{
qtractorBus *pBus = bus();
if (pBus == NULL)
return false;
// Set Bus gain (repective monitor gets set too...)
const float fGain = m_fPrevGain;
qtractorMeter *pMeter = meter();
if (pMeter)
pMeter->setGain(m_fGain);
// MIDI buses are special...
if (pBus->busType() == qtractorTrack::Midi) {
// Now we gotta make sure of proper MIDI bus...
qtractorMidiBus *pMidiBus
= static_cast<qtractorMidiBus *> (pBus);
if (pMidiBus)
pMidiBus->setMasterVolume(m_fGain);
}
// Set undo value...
m_fPrevGain = m_fGain;
m_fGain = fGain;
return true;
}
FileReceiver::FileReceiver(QObject *parent)
: QObject(parent)
{
QDBusConnection bus(QDBusConnection::sessionBus());
AccountFactoryPtr accountFactory = AccountFactory::create(bus);
ConnectionFactoryPtr connectionFactory = ConnectionFactory::create(bus);
ChannelFactoryPtr channelFactory = ChannelFactory::create(bus);
channelFactory->addCommonFeatures(Channel::FeatureCore);
channelFactory->addFeaturesForIncomingFileTransfers(IncomingFileTransferChannel::FeatureCore);
mCR = ClientRegistrar::create(accountFactory, connectionFactory,
channelFactory);
qDebug() << "Registering incoming file transfer handler";
mHandler = FileReceiverHandler::create();
QString handlerName(QLatin1String("TpQtExampleFileReceiverHandler"));
if (!mCR->registerClient(AbstractClientPtr::dynamicCast(mHandler), handlerName)) {
qWarning() << "Unable to register incoming file transfer handler, aborting";
QCoreApplication::exit(1);
return;
}
qDebug() << "Awaiting file transfers";
}
// Bus-gain command method.
bool qtractorBusMonitorCommand::redo (void)
{
qtractorBus *pBus = bus();
if (pBus == NULL)
return false;
qtractorMainForm *pMainForm = qtractorMainForm::getInstance();
if (pMainForm == NULL)
return false;
// Set Bus gain (repective monitor gets set too...)
const bool bMonitor = pBus->isMonitor();
pBus->setMonitor(qtractorBusCommand::isMonitor());
qtractorBusCommand::setMonitor(bMonitor);
// Update (reset) all applicable mixer strips...
qtractorMixer *pMixer = pMainForm->mixer();
if (pMixer) {
if (pBus->busMode() & qtractorBus::Input) {
pMixer->updateBusStrip(pMixer->inputRack(),
pBus, qtractorBus::Input, true);
}
if (pBus->busMode() & qtractorBus::Output) {
pMixer->updateBusStrip(pMixer->outputRack(),
pBus, qtractorBus::Output, true);
}
}
return true;
}
void VCSlider::setSliderMode(SliderMode mode)
{
Q_ASSERT(mode >= Bus && mode <= Submaster);
/* Disconnect these to prevent double callbacks and non-needes signals */
disconnect(Bus::instance(), SIGNAL(nameChanged(quint32, const QString&)),
this, SLOT(slotBusNameChanged(quint32, const QString&)));
disconnect(Bus::instance(), SIGNAL(valueChanged(quint32, quint32)),
this, SLOT(slotBusValueChanged(quint32, quint32)));
/* Unregister this as a DMX source if the new mode is not "Level" */
if (m_sliderMode == Level && mode != Level)
_app->masterTimer()->unregisterDMXSource(this);
m_sliderMode = mode;
if (mode == Bus)
{
/* Set the slider range */
m_slider->setRange(busLowLimit() * MasterTimer::frequency(),
busHighLimit() * MasterTimer::frequency());
setSliderValue(Bus::instance()->value(bus()));
slotSliderMoved(sliderValue());
/* Reconnect to bus emitter */
connect(Bus::instance(), SIGNAL(nameChanged(quint32, const QString&)),
this, SLOT(slotBusNameChanged(quint32, const QString&)));
connect(Bus::instance(), SIGNAL(valueChanged(quint32, quint32)),
this, SLOT(slotBusValueChanged(quint32, quint32)));
m_bottomLabel->hide();
m_tapButton->show();
m_time->start();
}
// Any time a connection or disconnection happens on any of our inputs, we potentially need to change the
// number of channels of our output.
void ChannelMergerNode::checkNumberOfChannelsForInput(ContextRenderLock& r, AudioNodeInput* input)
{
// Count how many channels we have all together from all of the inputs.
uint32_t numberOfOutputChannels = 0;
for (uint32_t i = 0; i < numberOfInputs(); ++i)
{
auto input = this->input(i);
if (input->isConnected())
{
numberOfOutputChannels += input->bus(r)->numberOfChannels();
}
}
// Set the correct number of channels on the output
auto output = this->output(0);
output->setNumberOfChannels(r, numberOfOutputChannels);
// Note * There can in rare cases be a slight delay before the output bus is updated to the new number of
// channels because of tryLocks() in the context's updating system. So record the new number of
// output channels here.
m_desiredNumberOfOutputChannels = numberOfOutputChannels;
AudioNode::checkNumberOfChannelsForInput(r, input);
}
MacWidget::~MacWidget()
{
// No longer listen to synchronous messages.
Gst::ScopedObject<GstBus> bus(gst_pipeline_get_bus(GST_PIPELINE(mPipeline)));
gst_bus_disable_sync_message_emission(bus.get());
g_signal_handlers_disconnect_by_func(bus.get(), (void*)G_CALLBACK(&MacWidget::OnSyncMessage), gpointer(this));
}
/**
* iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
*/
void iwl_rx_queue_update_write_ptr(struct iwl_trans *trans,
struct iwl_rx_queue *q)
{
unsigned long flags;
u32 reg;
spin_lock_irqsave(&q->lock, flags);
if (q->need_update == 0)
goto exit_unlock;
if (hw_params(trans).shadow_reg_enable) {
/* shadow register enabled */
/* Device expects a multiple of 8 */
q->write_actual = (q->write & ~0x7);
iwl_write32(bus(trans), FH_RSCSR_CHNL0_WPTR, q->write_actual);
} else {
/* If power-saving is in use, make sure device is awake */
if (test_bit(STATUS_POWER_PMI, &trans->shrd->status)) {
reg = iwl_read32(bus(trans), CSR_UCODE_DRV_GP1);
if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
IWL_DEBUG_INFO(trans,
"Rx queue requesting wakeup,"
" GP1 = 0x%x\n", reg);
iwl_set_bit(bus(trans), CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
goto exit_unlock;
}
q->write_actual = (q->write & ~0x7);
iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_WPTR,
q->write_actual);
/* Else device is assumed to be awake */
} else {
/* Device expects a multiple of 8 */
q->write_actual = (q->write & ~0x7);
iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_WPTR,
q->write_actual);
}
}
q->need_update = 0;
exit_unlock:
spin_unlock_irqrestore(&q->lock, flags);
}
MacWidget::MacWidget(GstElement * inPipeline, WindowId) :
mPipeline(inPipeline)
{
// Listen to synchronous messages
Gst::ScopedObject<GstBus> bus(gst_pipeline_get_bus(GST_PIPELINE(mPipeline)));
gst_bus_enable_sync_message_emission(bus.get());
g_signal_connect(bus.get(), "sync-message::element", G_CALLBACK(&MacWidget::OnSyncMessage), gpointer(this));
}
/* NIC configuration for 2000 series */
static void iwl2000_nic_config(struct iwl_priv *priv)
{
iwl_rf_config(priv);
if (priv->cfg->iq_invert)
iwl_set_bit(bus(priv), CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);
}
void FlowPortTest::Execute(void)
{
cout << "Executing FlowPortTest" << endl;
Simulator::Init(L"ExteriorLight.ernest");
Simulator::SetDuration(seconds(10));
BinaryTraceRecorder trace_recorder("ExteriorLight.ernest.bt1");
trace_recorder.AddEventMapping("ExteriorLight.ernest#//@structureModel.0/@modules.23/@ports.3", 0);
Simulator::SetTraceRecorder(&trace_recorder);
//
// Building the hardware topology
//
// Create ECU
Ecu ecu1("ECU1");
Ecu ecu2("ECU2");
// Create the bus
SimpleBus bus("SimpleBus");
// Adding bus interfaces to ecus
SimpleBusInterface *ecu1BusInterface = ecu1.AddHardware<SimpleBusInterface>();
SimpleBusInterface *ecu2BusInterface = ecu2.AddHardware<SimpleBusInterface>();
// Attaching the interfaces to the bus
bus.AttachInterface(ecu1BusInterface);
bus.AttachInterface(ecu2BusInterface);
//
// Configuring the software system
//
// Set scheduler
OsekOS *os1 = ecu1.GetService<OsekOS>();
OsekOS *os2 = ecu2.GetService<OsekOS>();
os1->SetScheduler<RoundRobin>();
os2->SetScheduler<RoundRobin>();
// Create one task with two SWF
Task* t1 = os1->DeclareTask<SwfA>(0,
milliseconds(0),
milliseconds(40),
new WorstCaseExecutionSpecification(milliseconds(20)));
Task* t2 = os2->DeclareTask<SwfB>(0,
milliseconds(10),
milliseconds(40),
new WorstCaseExecutionSpecification(milliseconds(20)));
SwfA* swfA = dynamic_cast<SwfA*>(t1->GetSwf());
SwfB* swfB = dynamic_cast<SwfB*>(t2->GetSwf());
connect_ports(swfA->src_counter, swfB->counter);
Simulator::Start();
}
/* initialize to default */
void iwl_power_initialize(struct iwl_priv *priv)
{
priv->power_data.bus_pm = bus_get_pm_support(bus(priv));
priv->power_data.debug_sleep_level_override = -1;
memset(&priv->power_data.sleep_cmd, 0,
sizeof(priv->power_data.sleep_cmd));
}
void SensorManager::removeSensor(const QString& id)
{
sensordLogD() << "Removing sensor: " << id;
QMap<QString, SensorInstanceEntry>::iterator entryIt = sensorInstanceMap_.find(id);
bus().unregisterObject(OBJECT_PATH + "/" + id);
delete entryIt.value().sensor_;
entryIt.value().sensor_ = 0;
}
/*
* This function handles the user application commands for SRAM data dump
*
* It retrieves the mandatory fields IWL_TM_ATTR_SRAM_ADDR and
* IWL_TM_ATTR_SRAM_SIZE to decide the memory area for SRAM data reading
*
* Several error will be retured, -EBUSY if the SRAM data retrieved by
* previous command has not been delivered to userspace, or -ENOMSG if
* the mandatory fields (IWL_TM_ATTR_SRAM_ADDR,IWL_TM_ATTR_SRAM_SIZE)
* are missing, or -ENOMEM if the buffer allocation fails.
*
* Otherwise 0 is replied indicating the success of the SRAM reading.
*
* @hw: ieee80211_hw object that represents the device
* @tb: gnl message fields from the user space
*/
static int iwl_testmode_sram(struct ieee80211_hw *hw, struct nlattr **tb)
{
struct iwl_priv *priv = hw->priv;
u32 base, ofs, size, maxsize;
if (priv->testmode_sram.sram_readed)
return -EBUSY;
if (!tb[IWL_TM_ATTR_SRAM_ADDR]) {
IWL_DEBUG_INFO(priv, "Error finding SRAM offset address\n");
return -ENOMSG;
}
ofs = nla_get_u32(tb[IWL_TM_ATTR_SRAM_ADDR]);
if (!tb[IWL_TM_ATTR_SRAM_SIZE]) {
IWL_DEBUG_INFO(priv, "Error finding size for SRAM reading\n");
return -ENOMSG;
}
size = nla_get_u32(tb[IWL_TM_ATTR_SRAM_SIZE]);
switch (priv->shrd->ucode_type) {
case IWL_UCODE_REGULAR:
maxsize = trans(priv)->ucode_rt.data.len;
break;
case IWL_UCODE_INIT:
maxsize = trans(priv)->ucode_init.data.len;
break;
case IWL_UCODE_WOWLAN:
maxsize = trans(priv)->ucode_wowlan.data.len;
break;
case IWL_UCODE_NONE:
IWL_DEBUG_INFO(priv, "Error, uCode does not been loaded\n");
return -ENOSYS;
default:
IWL_DEBUG_INFO(priv, "Error, unsupported uCode type\n");
return -ENOSYS;
}
if ((ofs + size) > maxsize) {
IWL_DEBUG_INFO(priv, "Invalid offset/size: out of range\n");
return -EINVAL;
}
priv->testmode_sram.buff_size = (size / 4) * 4;
priv->testmode_sram.buff_addr =
kmalloc(priv->testmode_sram.buff_size, GFP_KERNEL);
if (priv->testmode_sram.buff_addr == NULL) {
IWL_DEBUG_INFO(priv, "Error allocating memory\n");
return -ENOMEM;
}
base = 0x800000;
_iwl_read_targ_mem_words(bus(priv), base + ofs,
priv->testmode_sram.buff_addr,
priv->testmode_sram.buff_size / 4);
priv->testmode_sram.num_chunks =
DIV_ROUND_UP(priv->testmode_sram.buff_size, DUMP_CHUNK_SIZE);
priv->testmode_sram.sram_readed = true;
return 0;
}
AbstractSensorChannel* SensorManager::addSensor(const QString& id)
{
sensordLogD() << "Adding sensor: " << id;
clearError();
QString cleanId = getCleanId(id);
QMap<QString, SensorInstanceEntry>::const_iterator entryIt = sensorInstanceMap_.find(cleanId);
if (entryIt == sensorInstanceMap_.end()) {
sensordLogC() << QString("%1 not present").arg(cleanId);
setError( SmIdNotRegistered, QString(tr("instance for sensor type '%1' not registered").arg(cleanId)) );
return NULL;
}
const QString& typeName = entryIt.value().type_;
if ( !sensorFactoryMap_.contains(typeName) )
{
setError( SmFactoryNotRegistered, QString(tr("factory for sensor type '%1' not registered").arg(typeName)) );
return NULL;
}
AbstractSensorChannel* sensorChannel = sensorFactoryMap_[typeName](id);
if ( !sensorChannel->isValid() )
{
sensordLogC() << QString("%1 instantiation failed").arg(cleanId);
delete sensorChannel;
return NULL;
}
bool ok = bus().registerObject(OBJECT_PATH + "/" + sensorChannel->id(), sensorChannel);
if ( !ok )
{
QDBusError error = bus().lastError();
setError(SmCanNotRegisterObject, error.message());
sensordLogC() << "Failed to register sensor '" << OBJECT_PATH + "/" + sensorChannel->id() << "'";
delete sensorChannel;
return NULL;
}
return sensorChannel;
}
void
user_settings::dump_summary ()
{
int buscount = bus_count();
printf("[user-midi-bus-definitions] %d busses\n", buscount);
for (int b = 0; b < buscount; ++b)
{
const user_midi_bus & umb = bus(b);
printf(" [user-midi-bus-%d] '%s'\n", b, umb.name().c_str());
}
}
bool SensorManager::registerService()
{
clearError();
bool ok = bus().isConnected();
if ( !ok )
{
QDBusError error = bus().lastError();
setError(SmNotConnected, error.message());
return false;
}
ok = bus().registerObject( OBJECT_PATH, this );
if ( !ok )
{
QDBusError error = bus().lastError();
setError(SmCanNotRegisterObject, error.message());
return false;
}
ok = bus().registerService ( SERVICE_NAME );
if ( !ok )
{
QDBusError error = bus().lastError();
setError(SmCanNotRegisterService, error.message());
return false;
}
return true;
}
/* Free dram table */
void iwl_free_isr_ict(struct iwl_trans *trans)
{
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
if (trans_pcie->ict_tbl) {
dma_free_coherent(bus(trans)->dev, ICT_SIZE,
trans_pcie->ict_tbl,
trans_pcie->ict_tbl_dma);
trans_pcie->ict_tbl = NULL;
trans_pcie->ict_tbl_dma = 0;
}
}
u32 iwl_read_direct32(struct iwl_bus *bus, u32 reg)
{
u32 value;
unsigned long flags;
spin_lock_irqsave(&bus->reg_lock, flags);
iwl_grab_nic_access(bus);
value = iwl_read32(bus(bus), reg);
iwl_release_nic_access(bus);
spin_unlock_irqrestore(&bus->reg_lock, flags);
return value;
}
/* NIC configuration for 6000 series */
static void iwl6000_nic_config(struct iwl_priv *priv)
{
iwl_rf_config(priv);
/* no locking required for register write */
if (priv->cfg->pa_type == IWL_PA_INTERNAL) {
/* 2x2 IPA phy type */
iwl_write32(bus(priv), CSR_GP_DRIVER_REG,
CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);
}
/* do additional nic configuration if needed */
if (priv->cfg->additional_nic_config)
priv->cfg->additional_nic_config(priv);
}
