python::tuple LazyVectorMaxMinPicksWithThreshold( MaxMinPicker *picker, python::object objs, int poolSize, int pickSize, double threshold, python::object firstPicks, int seed) { std::vector<const ExplicitBitVect *> bvs(poolSize); for (int i = 0; i < poolSize; ++i) { bvs[i] = python::extract<const ExplicitBitVect *>(objs[i]); } pyBVFunctor<ExplicitBitVect> functor(bvs, TANIMOTO); RDKit::INT_VECT res; LazyMaxMinHelper(picker, functor, poolSize, pickSize, firstPicks, seed, res, threshold); return python::make_tuple(res, threshold); }
RDKit::INT_VECT LazyVectorMaxMinPicks(MaxMinPicker *picker, python::object objs, int poolSize, int pickSize, python::object firstPicks, int seed, bool useCache) { std::vector<const ExplicitBitVect *> bvs(poolSize); for (int i = 0; i < poolSize; ++i) { bvs[i] = python::extract<const ExplicitBitVect *>(objs[i]); } pyBVFunctor<ExplicitBitVect> functor(bvs, TANIMOTO, useCache); RDKit::INT_VECT firstPickVect; for (unsigned int i = 0; i < python::extract<unsigned int>(firstPicks.attr("__len__")()); ++i) { firstPickVect.push_back(python::extract<int>(firstPicks[i])); } RDKit::INT_VECT res = picker->lazyPick(functor, poolSize, pickSize, firstPickVect, seed); return res; }
RDKit::INT_VECT LazyVectorMaxMinPicks(MaxMinPicker *picker, python::object objs, int poolSize, int pickSize, python::object firstPicks, int seed, python::object useCache) { if (useCache != python::object()) { BOOST_LOG(rdWarningLog) << "the useCache argument is deprecated and ignored" << std::endl; } std::vector<const ExplicitBitVect *> bvs(poolSize); for (int i = 0; i < poolSize; ++i) { bvs[i] = python::extract<const ExplicitBitVect *>(objs[i]); } pyBVFunctor<ExplicitBitVect> functor(bvs, TANIMOTO); RDKit::INT_VECT res; double threshold = -1.; LazyMaxMinHelper(picker, functor, poolSize, pickSize, firstPicks, seed, res, threshold); return res; }
/* execute instructions on this CPU until icount expires */ static int hd6309_execute(int cycles) /* NS 970908 */ { hd6309_ICount = cycles - hd6309.extra_cycles; hd6309.extra_cycles = 0; if (hd6309.int_state & (HD6309_CWAI | HD6309_SYNC)) { CALL_MAME_DEBUG; hd6309_ICount = 0; } else { do { pPPC = pPC; CALL_MAME_DEBUG; hd6309.ireg = ROP(PCD); PC++; #ifdef BIG_SWITCH switch( hd6309.ireg ) { case 0x00: neg_di(); break; case 0x01: oim_di(); break; case 0x02: aim_di(); break; case 0x03: com_di(); break; case 0x04: lsr_di(); break; case 0x05: eim_di(); break; case 0x06: ror_di(); break; case 0x07: asr_di(); break; case 0x08: asl_di(); break; case 0x09: rol_di(); break; case 0x0a: dec_di(); break; case 0x0b: tim_di(); break; case 0x0c: inc_di(); break; case 0x0d: tst_di(); break; case 0x0e: jmp_di(); break; case 0x0f: clr_di(); break; case 0x10: pref10(); break; case 0x11: pref11(); break; case 0x12: nop(); break; case 0x13: sync(); break; case 0x14: sexw(); break; case 0x15: IIError(); break; case 0x16: lbra(); break; case 0x17: lbsr(); break; case 0x18: IIError(); break; case 0x19: daa(); break; case 0x1a: orcc(); break; case 0x1b: IIError(); break; case 0x1c: andcc(); break; case 0x1d: sex(); break; case 0x1e: exg(); break; case 0x1f: tfr(); break; case 0x20: bra(); break; case 0x21: brn(); break; case 0x22: bhi(); break; case 0x23: bls(); break; case 0x24: bcc(); break; case 0x25: bcs(); break; case 0x26: bne(); break; case 0x27: beq(); break; case 0x28: bvc(); break; case 0x29: bvs(); break; case 0x2a: bpl(); break; case 0x2b: bmi(); break; case 0x2c: bge(); break; case 0x2d: blt(); break; case 0x2e: bgt(); break; case 0x2f: ble(); break; case 0x30: leax(); break; case 0x31: leay(); break; case 0x32: leas(); break; case 0x33: leau(); break; case 0x34: pshs(); break; case 0x35: puls(); break; case 0x36: pshu(); break; case 0x37: pulu(); break; case 0x38: IIError(); break; case 0x39: rts(); break; case 0x3a: abx(); break; case 0x3b: rti(); break; case 0x3c: cwai(); break; case 0x3d: mul(); break; case 0x3e: IIError(); break; case 0x3f: swi(); break; case 0x40: nega(); break; case 0x41: IIError(); break; case 0x42: IIError(); break; case 0x43: coma(); break; case 0x44: lsra(); break; case 0x45: IIError(); break; case 0x46: rora(); break; case 0x47: asra(); break; case 0x48: asla(); break; case 0x49: rola(); break; case 0x4a: deca(); break; case 0x4b: IIError(); break; case 0x4c: inca(); break; case 0x4d: tsta(); break; case 0x4e: IIError(); break; case 0x4f: clra(); break; case 0x50: negb(); break; case 0x51: IIError(); break; case 0x52: IIError(); break; case 0x53: comb(); break; case 0x54: lsrb(); break; case 0x55: IIError(); break; case 0x56: rorb(); break; case 0x57: asrb(); break; case 0x58: aslb(); break; case 0x59: rolb(); break; case 0x5a: decb(); break; case 0x5b: IIError(); break; case 0x5c: incb(); break; case 0x5d: tstb(); break; case 0x5e: IIError(); break; case 0x5f: clrb(); break; case 0x60: neg_ix(); break; case 0x61: oim_ix(); break; case 0x62: aim_ix(); break; case 0x63: com_ix(); break; case 0x64: lsr_ix(); break; case 0x65: eim_ix(); break; case 0x66: ror_ix(); break; case 0x67: asr_ix(); break; case 0x68: asl_ix(); break; case 0x69: rol_ix(); break; case 0x6a: dec_ix(); break; case 0x6b: tim_ix(); break; case 0x6c: inc_ix(); break; case 0x6d: tst_ix(); break; case 0x6e: jmp_ix(); break; case 0x6f: clr_ix(); break; case 0x70: neg_ex(); break; case 0x71: oim_ex(); break; case 0x72: aim_ex(); break; case 0x73: com_ex(); break; case 0x74: lsr_ex(); break; case 0x75: eim_ex(); break; case 0x76: ror_ex(); break; case 0x77: asr_ex(); break; case 0x78: asl_ex(); break; case 0x79: rol_ex(); break; case 0x7a: dec_ex(); break; case 0x7b: tim_ex(); break; case 0x7c: inc_ex(); break; case 0x7d: tst_ex(); break; case 0x7e: jmp_ex(); break; case 0x7f: clr_ex(); break; case 0x80: suba_im(); break; case 0x81: cmpa_im(); break; case 0x82: sbca_im(); break; case 0x83: subd_im(); break; case 0x84: anda_im(); break; case 0x85: bita_im(); break; case 0x86: lda_im(); break; case 0x87: IIError(); break; case 0x88: eora_im(); break; case 0x89: adca_im(); break; case 0x8a: ora_im(); break; case 0x8b: adda_im(); break; case 0x8c: cmpx_im(); break; case 0x8d: bsr(); break; case 0x8e: ldx_im(); break; case 0x8f: IIError(); break; case 0x90: suba_di(); break; case 0x91: cmpa_di(); break; case 0x92: sbca_di(); break; case 0x93: subd_di(); break; case 0x94: anda_di(); break; case 0x95: bita_di(); break; case 0x96: lda_di(); break; case 0x97: sta_di(); break; case 0x98: eora_di(); break; case 0x99: adca_di(); break; case 0x9a: ora_di(); break; case 0x9b: adda_di(); break; case 0x9c: cmpx_di(); break; case 0x9d: jsr_di(); break; case 0x9e: ldx_di(); break; case 0x9f: stx_di(); break; case 0xa0: suba_ix(); break; case 0xa1: cmpa_ix(); break; case 0xa2: sbca_ix(); break; case 0xa3: subd_ix(); break; case 0xa4: anda_ix(); break; case 0xa5: bita_ix(); break; case 0xa6: lda_ix(); break; case 0xa7: sta_ix(); break; case 0xa8: eora_ix(); break; case 0xa9: adca_ix(); break; case 0xaa: ora_ix(); break; case 0xab: adda_ix(); break; case 0xac: cmpx_ix(); break; case 0xad: jsr_ix(); break; case 0xae: ldx_ix(); break; case 0xaf: stx_ix(); break; case 0xb0: suba_ex(); break; case 0xb1: cmpa_ex(); break; case 0xb2: sbca_ex(); break; case 0xb3: subd_ex(); break; case 0xb4: anda_ex(); break; case 0xb5: bita_ex(); break; case 0xb6: lda_ex(); break; case 0xb7: sta_ex(); break; case 0xb8: eora_ex(); break; case 0xb9: adca_ex(); break; case 0xba: ora_ex(); break; case 0xbb: adda_ex(); break; case 0xbc: cmpx_ex(); break; case 0xbd: jsr_ex(); break; case 0xbe: ldx_ex(); break; case 0xbf: stx_ex(); break; case 0xc0: subb_im(); break; case 0xc1: cmpb_im(); break; case 0xc2: sbcb_im(); break; case 0xc3: addd_im(); break; case 0xc4: andb_im(); break; case 0xc5: bitb_im(); break; case 0xc6: ldb_im(); break; case 0xc7: IIError(); break; case 0xc8: eorb_im(); break; case 0xc9: adcb_im(); break; case 0xca: orb_im(); break; case 0xcb: addb_im(); break; case 0xcc: ldd_im(); break; case 0xcd: ldq_im(); break; /* in m6809 was std_im */ case 0xce: ldu_im(); break; case 0xcf: IIError(); break; case 0xd0: subb_di(); break; case 0xd1: cmpb_di(); break; case 0xd2: sbcb_di(); break; case 0xd3: addd_di(); break; case 0xd4: andb_di(); break; case 0xd5: bitb_di(); break; case 0xd6: ldb_di(); break; case 0xd7: stb_di(); break; case 0xd8: eorb_di(); break; case 0xd9: adcb_di(); break; case 0xda: orb_di(); break; case 0xdb: addb_di(); break; case 0xdc: ldd_di(); break; case 0xdd: std_di(); break; case 0xde: ldu_di(); break; case 0xdf: stu_di(); break; case 0xe0: subb_ix(); break; case 0xe1: cmpb_ix(); break; case 0xe2: sbcb_ix(); break; case 0xe3: addd_ix(); break; case 0xe4: andb_ix(); break; case 0xe5: bitb_ix(); break; case 0xe6: ldb_ix(); break; case 0xe7: stb_ix(); break; case 0xe8: eorb_ix(); break; case 0xe9: adcb_ix(); break; case 0xea: orb_ix(); break; case 0xeb: addb_ix(); break; case 0xec: ldd_ix(); break; case 0xed: std_ix(); break; case 0xee: ldu_ix(); break; case 0xef: stu_ix(); break; case 0xf0: subb_ex(); break; case 0xf1: cmpb_ex(); break; case 0xf2: sbcb_ex(); break; case 0xf3: addd_ex(); break; case 0xf4: andb_ex(); break; case 0xf5: bitb_ex(); break; case 0xf6: ldb_ex(); break; case 0xf7: stb_ex(); break; case 0xf8: eorb_ex(); break; case 0xf9: adcb_ex(); break; case 0xfa: orb_ex(); break; case 0xfb: addb_ex(); break; case 0xfc: ldd_ex(); break; case 0xfd: std_ex(); break; case 0xfe: ldu_ex(); break; case 0xff: stu_ex(); break; } #else (*hd6309_main[hd6309.ireg])(); #endif /* BIG_SWITCH */ hd6309_ICount -= cycle_counts_page0[hd6309.ireg]; } while( hd6309_ICount > 0 ); hd6309_ICount -= hd6309.extra_cycles; hd6309.extra_cycles = 0; } return cycles - hd6309_ICount; /* NS 970908 */ }
/* execute instructions on this CPU until icount expires */ static CPU_EXECUTE( m6809 ) /* NS 970908 */ { m68_state_t *m68_state = get_safe_token(device); m68_state->icount = cycles - m68_state->extra_cycles; m68_state->extra_cycles = 0; check_irq_lines(m68_state); if (m68_state->int_state & (M6809_CWAI | M6809_SYNC)) { debugger_instruction_hook(device, PCD); m68_state->icount = 0; } else { do { pPPC = pPC; debugger_instruction_hook(device, PCD); m68_state->ireg = ROP(PCD); PC++; #if BIG_SWITCH switch( m68_state->ireg ) { case 0x00: neg_di(m68_state); break; case 0x01: neg_di(m68_state); break; /* undocumented */ case 0x02: IIError(m68_state); break; case 0x03: com_di(m68_state); break; case 0x04: lsr_di(m68_state); break; case 0x05: IIError(m68_state); break; case 0x06: ror_di(m68_state); break; case 0x07: asr_di(m68_state); break; case 0x08: asl_di(m68_state); break; case 0x09: rol_di(m68_state); break; case 0x0a: dec_di(m68_state); break; case 0x0b: IIError(m68_state); break; case 0x0c: inc_di(m68_state); break; case 0x0d: tst_di(m68_state); break; case 0x0e: jmp_di(m68_state); break; case 0x0f: clr_di(m68_state); break; case 0x10: pref10(m68_state); break; case 0x11: pref11(m68_state); break; case 0x12: nop(m68_state); break; case 0x13: sync(m68_state); break; case 0x14: IIError(m68_state); break; case 0x15: IIError(m68_state); break; case 0x16: lbra(m68_state); break; case 0x17: lbsr(m68_state); break; case 0x18: IIError(m68_state); break; case 0x19: daa(m68_state); break; case 0x1a: orcc(m68_state); break; case 0x1b: IIError(m68_state); break; case 0x1c: andcc(m68_state); break; case 0x1d: sex(m68_state); break; case 0x1e: exg(m68_state); break; case 0x1f: tfr(m68_state); break; case 0x20: bra(m68_state); break; case 0x21: brn(m68_state); break; case 0x22: bhi(m68_state); break; case 0x23: bls(m68_state); break; case 0x24: bcc(m68_state); break; case 0x25: bcs(m68_state); break; case 0x26: bne(m68_state); break; case 0x27: beq(m68_state); break; case 0x28: bvc(m68_state); break; case 0x29: bvs(m68_state); break; case 0x2a: bpl(m68_state); break; case 0x2b: bmi(m68_state); break; case 0x2c: bge(m68_state); break; case 0x2d: blt(m68_state); break; case 0x2e: bgt(m68_state); break; case 0x2f: ble(m68_state); break; case 0x30: leax(m68_state); break; case 0x31: leay(m68_state); break; case 0x32: leas(m68_state); break; case 0x33: leau(m68_state); break; case 0x34: pshs(m68_state); break; case 0x35: puls(m68_state); break; case 0x36: pshu(m68_state); break; case 0x37: pulu(m68_state); break; case 0x38: IIError(m68_state); break; case 0x39: rts(m68_state); break; case 0x3a: abx(m68_state); break; case 0x3b: rti(m68_state); break; case 0x3c: cwai(m68_state); break; case 0x3d: mul(m68_state); break; case 0x3e: IIError(m68_state); break; case 0x3f: swi(m68_state); break; case 0x40: nega(m68_state); break; case 0x41: IIError(m68_state); break; case 0x42: IIError(m68_state); break; case 0x43: coma(m68_state); break; case 0x44: lsra(m68_state); break; case 0x45: IIError(m68_state); break; case 0x46: rora(m68_state); break; case 0x47: asra(m68_state); break; case 0x48: asla(m68_state); break; case 0x49: rola(m68_state); break; case 0x4a: deca(m68_state); break; case 0x4b: IIError(m68_state); break; case 0x4c: inca(m68_state); break; case 0x4d: tsta(m68_state); break; case 0x4e: IIError(m68_state); break; case 0x4f: clra(m68_state); break; case 0x50: negb(m68_state); break; case 0x51: IIError(m68_state); break; case 0x52: IIError(m68_state); break; case 0x53: comb(m68_state); break; case 0x54: lsrb(m68_state); break; case 0x55: IIError(m68_state); break; case 0x56: rorb(m68_state); break; case 0x57: asrb(m68_state); break; case 0x58: aslb(m68_state); break; case 0x59: rolb(m68_state); break; case 0x5a: decb(m68_state); break; case 0x5b: IIError(m68_state); break; case 0x5c: incb(m68_state); break; case 0x5d: tstb(m68_state); break; case 0x5e: IIError(m68_state); break; case 0x5f: clrb(m68_state); break; case 0x60: neg_ix(m68_state); break; case 0x61: IIError(m68_state); break; case 0x62: IIError(m68_state); break; case 0x63: com_ix(m68_state); break; case 0x64: lsr_ix(m68_state); break; case 0x65: IIError(m68_state); break; case 0x66: ror_ix(m68_state); break; case 0x67: asr_ix(m68_state); break; case 0x68: asl_ix(m68_state); break; case 0x69: rol_ix(m68_state); break; case 0x6a: dec_ix(m68_state); break; case 0x6b: IIError(m68_state); break; case 0x6c: inc_ix(m68_state); break; case 0x6d: tst_ix(m68_state); break; case 0x6e: jmp_ix(m68_state); break; case 0x6f: clr_ix(m68_state); break; case 0x70: neg_ex(m68_state); break; case 0x71: IIError(m68_state); break; case 0x72: IIError(m68_state); break; case 0x73: com_ex(m68_state); break; case 0x74: lsr_ex(m68_state); break; case 0x75: IIError(m68_state); break; case 0x76: ror_ex(m68_state); break; case 0x77: asr_ex(m68_state); break; case 0x78: asl_ex(m68_state); break; case 0x79: rol_ex(m68_state); break; case 0x7a: dec_ex(m68_state); break; case 0x7b: IIError(m68_state); break; case 0x7c: inc_ex(m68_state); break; case 0x7d: tst_ex(m68_state); break; case 0x7e: jmp_ex(m68_state); break; case 0x7f: clr_ex(m68_state); break; case 0x80: suba_im(m68_state); break; case 0x81: cmpa_im(m68_state); break; case 0x82: sbca_im(m68_state); break; case 0x83: subd_im(m68_state); break; case 0x84: anda_im(m68_state); break; case 0x85: bita_im(m68_state); break; case 0x86: lda_im(m68_state); break; case 0x87: sta_im(m68_state); break; case 0x88: eora_im(m68_state); break; case 0x89: adca_im(m68_state); break; case 0x8a: ora_im(m68_state); break; case 0x8b: adda_im(m68_state); break; case 0x8c: cmpx_im(m68_state); break; case 0x8d: bsr(m68_state); break; case 0x8e: ldx_im(m68_state); break; case 0x8f: stx_im(m68_state); break; case 0x90: suba_di(m68_state); break; case 0x91: cmpa_di(m68_state); break; case 0x92: sbca_di(m68_state); break; case 0x93: subd_di(m68_state); break; case 0x94: anda_di(m68_state); break; case 0x95: bita_di(m68_state); break; case 0x96: lda_di(m68_state); break; case 0x97: sta_di(m68_state); break; case 0x98: eora_di(m68_state); break; case 0x99: adca_di(m68_state); break; case 0x9a: ora_di(m68_state); break; case 0x9b: adda_di(m68_state); break; case 0x9c: cmpx_di(m68_state); break; case 0x9d: jsr_di(m68_state); break; case 0x9e: ldx_di(m68_state); break; case 0x9f: stx_di(m68_state); break; case 0xa0: suba_ix(m68_state); break; case 0xa1: cmpa_ix(m68_state); break; case 0xa2: sbca_ix(m68_state); break; case 0xa3: subd_ix(m68_state); break; case 0xa4: anda_ix(m68_state); break; case 0xa5: bita_ix(m68_state); break; case 0xa6: lda_ix(m68_state); break; case 0xa7: sta_ix(m68_state); break; case 0xa8: eora_ix(m68_state); break; case 0xa9: adca_ix(m68_state); break; case 0xaa: ora_ix(m68_state); break; case 0xab: adda_ix(m68_state); break; case 0xac: cmpx_ix(m68_state); break; case 0xad: jsr_ix(m68_state); break; case 0xae: ldx_ix(m68_state); break; case 0xaf: stx_ix(m68_state); break; case 0xb0: suba_ex(m68_state); break; case 0xb1: cmpa_ex(m68_state); break; case 0xb2: sbca_ex(m68_state); break; case 0xb3: subd_ex(m68_state); break; case 0xb4: anda_ex(m68_state); break; case 0xb5: bita_ex(m68_state); break; case 0xb6: lda_ex(m68_state); break; case 0xb7: sta_ex(m68_state); break; case 0xb8: eora_ex(m68_state); break; case 0xb9: adca_ex(m68_state); break; case 0xba: ora_ex(m68_state); break; case 0xbb: adda_ex(m68_state); break; case 0xbc: cmpx_ex(m68_state); break; case 0xbd: jsr_ex(m68_state); break; case 0xbe: ldx_ex(m68_state); break; case 0xbf: stx_ex(m68_state); break; case 0xc0: subb_im(m68_state); break; case 0xc1: cmpb_im(m68_state); break; case 0xc2: sbcb_im(m68_state); break; case 0xc3: addd_im(m68_state); break; case 0xc4: andb_im(m68_state); break; case 0xc5: bitb_im(m68_state); break; case 0xc6: ldb_im(m68_state); break; case 0xc7: stb_im(m68_state); break; case 0xc8: eorb_im(m68_state); break; case 0xc9: adcb_im(m68_state); break; case 0xca: orb_im(m68_state); break; case 0xcb: addb_im(m68_state); break; case 0xcc: ldd_im(m68_state); break; case 0xcd: std_im(m68_state); break; case 0xce: ldu_im(m68_state); break; case 0xcf: stu_im(m68_state); break; case 0xd0: subb_di(m68_state); break; case 0xd1: cmpb_di(m68_state); break; case 0xd2: sbcb_di(m68_state); break; case 0xd3: addd_di(m68_state); break; case 0xd4: andb_di(m68_state); break; case 0xd5: bitb_di(m68_state); break; case 0xd6: ldb_di(m68_state); break; case 0xd7: stb_di(m68_state); break; case 0xd8: eorb_di(m68_state); break; case 0xd9: adcb_di(m68_state); break; case 0xda: orb_di(m68_state); break; case 0xdb: addb_di(m68_state); break; case 0xdc: ldd_di(m68_state); break; case 0xdd: std_di(m68_state); break; case 0xde: ldu_di(m68_state); break; case 0xdf: stu_di(m68_state); break; case 0xe0: subb_ix(m68_state); break; case 0xe1: cmpb_ix(m68_state); break; case 0xe2: sbcb_ix(m68_state); break; case 0xe3: addd_ix(m68_state); break; case 0xe4: andb_ix(m68_state); break; case 0xe5: bitb_ix(m68_state); break; case 0xe6: ldb_ix(m68_state); break; case 0xe7: stb_ix(m68_state); break; case 0xe8: eorb_ix(m68_state); break; case 0xe9: adcb_ix(m68_state); break; case 0xea: orb_ix(m68_state); break; case 0xeb: addb_ix(m68_state); break; case 0xec: ldd_ix(m68_state); break; case 0xed: std_ix(m68_state); break; case 0xee: ldu_ix(m68_state); break; case 0xef: stu_ix(m68_state); break; case 0xf0: subb_ex(m68_state); break; case 0xf1: cmpb_ex(m68_state); break; case 0xf2: sbcb_ex(m68_state); break; case 0xf3: addd_ex(m68_state); break; case 0xf4: andb_ex(m68_state); break; case 0xf5: bitb_ex(m68_state); break; case 0xf6: ldb_ex(m68_state); break; case 0xf7: stb_ex(m68_state); break; case 0xf8: eorb_ex(m68_state); break; case 0xf9: adcb_ex(m68_state); break; case 0xfa: orb_ex(m68_state); break; case 0xfb: addb_ex(m68_state); break; case 0xfc: ldd_ex(m68_state); break; case 0xfd: std_ex(m68_state); break; case 0xfe: ldu_ex(m68_state); break; case 0xff: stu_ex(m68_state); break; } #else (*m6809_main[m68_state->ireg])(m68_state); #endif /* BIG_SWITCH */ m68_state->icount -= cycles1[m68_state->ireg]; } while( m68_state->icount > 0 ); m68_state->icount -= m68_state->extra_cycles; m68_state->extra_cycles = 0; } return cycles - m68_state->icount; /* NS 970908 */ }
/** * @brief emulate instruction * @return returns false if something goes wrong (e.g. illegal instruction) * * Current limitations: * * - Illegal instructions are not implemented * - Excess cycles due to page boundary crossing are not calculated * - Some known architectural bugs are not emulated */ bool Cpu::emulate() { /* fetch instruction */ uint8_t insn = fetch_op(); bool retval = true; /* emulate instruction */ switch(insn) { /* BRK */ case 0x0: brk(); break; /* ORA (nn,X) */ case 0x1: ora(load_byte(addr_indx()),6); break; /* ORA nn */ case 0x5: ora(load_byte(addr_zero()),3); break; /* ASL nn */ case 0x6: asl_mem(addr_zero(),5); break; /* PHP */ case 0x8: php(); break; /* ORA #nn */ case 0x9: ora(fetch_op(),2); break; /* ASL A */ case 0xA: asl_a(); break; /* ORA nnnn */ case 0xD: ora(load_byte(addr_abs()),4); break; /* ASL nnnn */ case 0xE: asl_mem(addr_abs(),6); break; /* BPL nn */ case 0x10: bpl(); break; /* ORA (nn,Y) */ case 0x11: ora(load_byte(addr_indy()),5); break; /* ORA nn,X */ case 0x15: ora(load_byte(addr_zerox()),4); break; /* ASL nn,X */ case 0x16: asl_mem(addr_zerox(),6); break; /* CLC */ case 0x18: clc(); break; /* ORA nnnn,Y */ case 0x19: ora(load_byte(addr_absy()),4); break; /* ORA nnnn,X */ case 0x1D: ora(load_byte(addr_absx()),4); break; /* ASL nnnn,X */ case 0x1E: asl_mem(addr_absx(),7); break; /* JSR */ case 0x20: jsr(); break; /* AND (nn,X) */ case 0x21: _and(load_byte(addr_indx()),6); break; /* BIT nn */ case 0x24: bit(addr_zero(),3); break; /* AND nn */ case 0x25: _and(load_byte(addr_zero()),3); break; /* ROL nn */ case 0x26: rol_mem(addr_zero(),5); break; /* PLP */ case 0x28: plp(); break; /* AND #nn */ case 0x29: _and(fetch_op(),2); break; /* ROL A */ case 0x2A: rol_a(); break; /* BIT nnnn */ case 0x2C: bit(addr_abs(),4); break; /* AND nnnn */ case 0x2D: _and(load_byte(addr_abs()),4); break; /* ROL nnnn */ case 0x2E: rol_mem(addr_abs(),6); break; /* BMI nn */ case 0x30: bmi(); break; /* AND (nn,Y) */ case 0x31: _and(load_byte(addr_indy()),5); break; /* AND nn,X */ case 0x35: _and(load_byte(addr_zerox()),4); break; /* ROL nn,X */ case 0x36: rol_mem(addr_zerox(),6); break; /* SEC */ case 0x38: sec(); break; /* AND nnnn,Y */ case 0x39: _and(load_byte(addr_absy()),4); break; /* AND nnnn,X */ case 0x3D: _and(load_byte(addr_absx()),4); break; /* ROL nnnn,X */ case 0x3E: rol_mem(addr_absx(),7); break; /* RTI */ case 0x40: rti(); break; /* EOR (nn,X) */ case 0x41: eor(load_byte(addr_indx()),6); break; /* EOR nn */ case 0x45: eor(load_byte(addr_zero()),3); break; /* LSR nn */ case 0x46: lsr_mem(addr_zero(),5); break; /* PHA */ case 0x48: pha(); break; /* EOR #nn */ case 0x49: eor(fetch_op(),2); break; /* BVC */ case 0x50: bvc(); break; /* JMP nnnn */ case 0x4C: jmp(); break; /* EOR nnnn */ case 0x4D: eor(load_byte(addr_abs()),4); break; /* LSR A */ case 0x4A: lsr_a(); break; /* LSR nnnn */ case 0x4E: lsr_mem(addr_abs(),6); break; /* EOR (nn,Y) */ case 0x51: eor(load_byte(addr_indy()),5); break; /* EOR nn,X */ case 0x55: eor(load_byte(addr_zerox()),4); break; /* LSR nn,X */ case 0x56: lsr_mem(addr_zerox(),6); break; /* CLI */ case 0x58: cli(); break; /* EOR nnnn,Y */ case 0x59: eor(load_byte(addr_absy()),4); break; /* EOR nnnn,X */ case 0x5D: eor(load_byte(addr_absx()),4); break; /* LSR nnnn,X */ case 0x5E: lsr_mem(addr_absx(),7); break; /* RTS */ case 0x60: rts(); break; /* ADC (nn,X) */ case 0x61: adc(load_byte(addr_indx()),6); break; /* ADC nn */ case 0x65: adc(load_byte(addr_zero()),3); break; /* ROR nn */ case 0x66: ror_mem(addr_zero(),5); break; /* PLA */ case 0x68: pla(); break; /* ADC #nn */ case 0x69: adc(fetch_op(),2); break; /* ROR A */ case 0x6A: ror_a(); break; /* JMP (nnnn) */ case 0x6C: jmp_ind(); break; /* ADC nnnn */ case 0x6D: adc(load_byte(addr_abs()),4); break; /* ROR nnnn */ case 0x6E: ror_mem(addr_abs(),6); break; /* BVS */ case 0x70: bvs(); break; /* ADC (nn,Y) */ case 0x71: adc(load_byte(addr_indy()),5); break; /* ADC nn,X */ case 0x75: adc(load_byte(addr_zerox()),4); break; /* ROR nn,X */ case 0x76: ror_mem(addr_zerox(),6); break; /* SEI */ case 0x78: sei(); break; /* ADC nnnn,Y */ case 0x79: adc(load_byte(addr_absy()),4); break; /* ADC nnnn,X */ case 0x7D: adc(load_byte(addr_absx()),4); break; /* ROR nnnn,X */ case 0x7E: ror_mem(addr_absx(),7); break; /* STA (nn,X) */ case 0x81: sta(addr_indx(),6); break; /* STY nn */ case 0x84: sty(addr_zero(),3); break; /* STA nn */ case 0x85: sta(addr_zero(),3); break; /* STX nn */ case 0x86: stx(addr_zero(),3); break; /* DEY */ case 0x88: dey(); break; /* TXA */ case 0x8A: txa(); break; /* STY nnnn */ case 0x8C: sty(addr_abs(),4); break; /* STA nnnn */ case 0x8D: sta(addr_abs(),4); break; /* STX nnnn */ case 0x8E: stx(addr_abs(),4); break; /* BCC nn */ case 0x90: bcc(); break; /* STA (nn,Y) */ case 0x91: sta(addr_indy(),6); break; /* STY nn,X */ case 0x94: sty(addr_zerox(),4); break; /* STA nn,X */ case 0x95: sta(addr_zerox(),4); break; /* STX nn,Y */ case 0x96: stx(addr_zeroy(),4); break; /* TYA */ case 0x98: tya(); break; /* STA nnnn,Y */ case 0x99: sta(addr_absy(),5); break; /* TXS */ case 0x9A: txs(); break; /* STA nnnn,X */ case 0x9D: sta(addr_absx(),5); break; /* LDY #nn */ case 0xA0: ldy(fetch_op(),2); break; /* LDA (nn,X) */ case 0xA1: lda(load_byte(addr_indx()),6); break; /* LDX #nn */ case 0xA2: ldx(fetch_op(),2); break; /* LDY nn */ case 0xA4: ldy(load_byte(addr_zero()),3); break; /* LDA nn */ case 0xA5: lda(load_byte(addr_zero()),3); break; /* LDX nn */ case 0xA6: ldx(load_byte(addr_zero()),3); break; /* TAY */ case 0xA8: tay(); break; /* LDA #nn */ case 0xA9: lda(fetch_op(),2); break; /* TAX */ case 0xAA: tax(); break; /* LDY nnnn */ case 0xAC: ldy(load_byte(addr_abs()),4); break; /* LDA nnnn */ case 0xAD: lda(load_byte(addr_abs()),4); break; /* LDX nnnn */ case 0xAE: ldx(load_byte(addr_abs()),4); break; /* BCS nn */ case 0xB0: bcs(); break; /* LDA (nn,Y) */ case 0xB1: lda(load_byte(addr_indy()),5); break; /* LDY nn,X */ case 0xB4: ldy(load_byte(addr_zerox()),3); break; /* LDA nn,X */ case 0xB5: lda(load_byte(addr_zerox()),3); break; /* LDX nn,Y */ case 0xB6: ldx(load_byte(addr_zeroy()),3); break; /* CLV */ case 0xB8: clv(); break; /* LDA nnnn,Y */ case 0xB9: lda(load_byte(addr_absy()),4); break; /* TSX */ case 0xBA: tsx(); break; /* LDY nnnn,X */ case 0xBC: ldy(load_byte(addr_absx()),4); break; /* LDA nnnn,X */ case 0xBD: lda(load_byte(addr_absx()),4); break; /* LDX nnnn,Y */ case 0xBE: ldx(load_byte(addr_absy()),4); break; /* CPY #nn */ case 0xC0: cpy(fetch_op(),2); break; /* CMP (nn,X) */ case 0xC1: cmp(load_byte(addr_indx()),6); break; /* CPY nn */ case 0xC4: cpy(load_byte(addr_zero()),3); break; /* CMP nn */ case 0xC5: cmp(load_byte(addr_zero()),3); break; /* DEC nn */ case 0xC6: dec(addr_zero(),5); break; /* INY */ case 0xC8: iny(); break; /* CMP #nn */ case 0xC9: cmp(fetch_op(),2); break; /* DEX */ case 0xCA: dex(); break; /* CPY nnnn */ case 0xCC: cpy(load_byte(addr_abs()),4); break; /* CMP nnnn */ case 0xCD: cmp(load_byte(addr_abs()),4); break; /* DEC nnnn */ case 0xCE: dec(addr_abs(),6); break; /* BNE nn */ case 0xD0: bne(); break; /* CMP (nn,Y) */ case 0xD1: cmp(load_byte(addr_indy()),5); break; /* CMP nn,X */ case 0xD5: cmp(load_byte(addr_zerox()),4); break; /* DEC nn,X */ case 0xD6: dec(addr_zerox(),6); break; /* CLD */ case 0xD8: cld(); break; /* CMP nnnn,Y */ case 0xD9: cmp(load_byte(addr_absy()),4); break; /* CMP nnnn,X */ case 0xDD: cmp(load_byte(addr_absx()),4); break; /* DEC nnnn,X */ case 0xDE: dec(addr_absx(),7); break; /* CPX #nn */ case 0xE0: cpx(fetch_op(),2); break; /* SBC (nn,X) */ case 0xE1: sbc(load_byte(addr_indx()),6); break; /* CPX nn */ case 0xE4: cpx(load_byte(addr_zero()),3); break; /* SBC nn */ case 0xE5: sbc(load_byte(addr_zero()),3); break; /* INC nn */ case 0xE6: inc(addr_zero(),5); break; /* INX */ case 0xE8: inx(); break; /* SBC #nn */ case 0xE9: sbc(fetch_op(),2); break; /* NOP */ case 0xEA: nop(); break; /* CPX nnnn */ case 0xEC: cpx(load_byte(addr_abs()),4); break; /* SBC nnnn */ case 0xED: sbc(load_byte(addr_abs()),4); break; /* INC nnnn */ case 0xEE: inc(addr_abs(),6); break; /* BEQ nn */ case 0xF0: beq(); break; /* SBC (nn,Y) */ case 0xF1: sbc(load_byte(addr_indy()),5); break; /* SBC nn,X */ case 0xF5: sbc(load_byte(addr_zerox()),4); break; /* INC nn,X */ case 0xF6: inc(addr_zerox(),6); break; /* SED */ case 0xF8: sed(); break; /* SBC nnnn,Y */ case 0xF9: sbc(load_byte(addr_absy()),4); break; /* SBC nnnn,X */ case 0xFD: sbc(load_byte(addr_absx()),4); break; /* INC nnnn,X */ case 0xFE: inc(addr_absx(),7); break; /* Unknown or illegal instruction */ default: D("Unknown instruction: %X at %04x\n", insn,pc()); retval = false; } return retval; }